Hyuck Soo
Hyuck Soo Jeon, Daejeon KR
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20120186442 | Double Cylinder Type Hydraulic Mechanism - A hydraulic mechanism includes an outer cylinder having an expansion side working port and a contraction side working port respectively formed on a top of the outer cylinder; an inner cylinder insertedly installed inside the outer cylinder to come in and out toward a bottom of the outer cylinder; an inner rod having two flow paths respectively connected to the expansion side working port and the contraction side working port, one end of which is fixed to an inner top surface of the outer cylinder, and the other end of which passes through a top of the inner cylinder and protrudes to be positioned inside the inner cylinder; and a piston combined with the other end of the inner rod to be positioned inside the inner cylinder and formed with a hole connected to the flow path of the inner rod connected to the expansion side working port. | 07-26-2012 |
Hyuck Soo Yoon, Ichon-Si KR
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20100296349 | NON-VOLATILE SEMICONDUCTOR MEMORY CIRCUIT WITH IMPROVED RESISTANCE DISTRIBUTION - Disclosed is a non-volatile semiconductor memory circuit with an improved resistance spread characteristic distinguishing set data and reset data. The non-volatile semiconductor memory circuit includes a memory cell array, and a read/write circuit block configured to differentiate the current drivability based on the mode of operation, wherein the current drivability is provided in response to a bias signal based on set or reset state of data. | 11-25-2010 |
Hyuck Soo Yoon, Chungcheongbuk-Do KR
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20090161418 | PHASE CHANGE MEMORY DEVICE HAVING DECENTRALIZED DRIVING UNITS - A phase change memory device includes a plurality of intersecting bit lines and word lines. A cell array including a plurality of unit phase change resistance cells is formed at intersections of the plurality of bit lines and the plurality of word lines. A plurality of sub word line driving units are configured to drive the word lines in response to a plurality of sub word line signals. A plurality of main word line driving units are configured to drive the sub word line driving units in response to a main word line signal. A precharge unit is configured to precharge the word lines. In the phase change memory device, the driving units are decentralized. | 06-25-2009 |
20100271869 | PHASE CHANGE MEMORY DEVICE HAVING DECENTRALIZED DRIVING UNITS - A phase change memory device includes a plurality of intersecting bit lines and word lines. A cell array including a plurality of unit phase change resistance cells is formed at intersections of the plurality of bit lines and the plurality of word lines. A plurality of sub word line driving units are configured to drive the word lines in response to a plurality of sub word line signals. A plurality of main word line driving units are configured to drive the sub word line driving units in response to a main word line signal. A precharge unit is configured to precharge the word lines. In the phase change memory device, the driving units are is decentralized. | 10-28-2010 |
Hyuck Soo Yoon, Ichon KR
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20080279018 | REDUNDANCY CIRCUIT CAPABLE OF REDUCING TIME FOR REDUNDANCY DISCRIMINATION - A redundancy circuit in a semiconductor memory apparatus includes a comparison signal receiving unit to receive a plurality of comparison signals and a fuse enable signal in parallel, wherein the comparison signals are generated by comparing a plurality of row address signals to a plurality of fuse address signals; and a redundancy control signal generating unit for providing a redundancy control signal by controlling an output signal path of the comparison signal receiving unit in response to a signal level of a row address enable signal. The comparison signal receiving unit receives the plurality of the comparison signals and the fuse enable signal while the row address enable signal is activated. | 11-13-2008 |
Hyuck Soo Yoon, Cheongju KR
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20110182113 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device prevents a faulty operation of a program operation, and increases the reliability of operation. The semiconductor memory device includes a unit cell including a memory element configured to have a different resistance value in response to data, and a write driver configured to output a program current and voltage for programming the unit cell in response to a test signal. | 07-28-2011 |
20110292720 | PHASE-CHANGE MEMORY DEVICE - A phase-change memory device includes: a unit cell including a phase-change resistor; a sense amplifier applying a sensing current to the phase-change resistor; and a switching unit operating in a standby mode or a read mode according to a global line signal and controlling passing presence of the sensing current passing through the phase-change resistor according to an active signal in the standby mode. | 12-01-2011 |