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Hyuck Soo
Hyuck Soo Yoon, Ichon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100296349 | NON-VOLATILE SEMICONDUCTOR MEMORY CIRCUIT WITH IMPROVED RESISTANCE DISTRIBUTION - Disclosed is a non-volatile semiconductor memory circuit with an improved resistance spread characteristic distinguishing set data and reset data. The non-volatile semiconductor memory circuit includes a memory cell array, and a read/write circuit block configured to differentiate the current drivability based on the mode of operation, wherein the current drivability is provided in response to a bias signal based on set or reset state of data. | 11-25-2010 |
Hyuck Soo Yoon, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090161418 | PHASE CHANGE MEMORY DEVICE HAVING DECENTRALIZED DRIVING UNITS - A phase change memory device includes a plurality of intersecting bit lines and word lines. A cell array including a plurality of unit phase change resistance cells is formed at intersections of the plurality of bit lines and the plurality of word lines. A plurality of sub word line driving units are configured to drive the word lines in response to a plurality of sub word line signals. A plurality of main word line driving units are configured to drive the sub word line driving units in response to a main word line signal. A precharge unit is configured to precharge the word lines. In the phase change memory device, the driving units are decentralized. | 06-25-2009 |
| 20100271869 | PHASE CHANGE MEMORY DEVICE HAVING DECENTRALIZED DRIVING UNITS - A phase change memory device includes a plurality of intersecting bit lines and word lines. A cell array including a plurality of unit phase change resistance cells is formed at intersections of the plurality of bit lines and the plurality of word lines. A plurality of sub word line driving units are configured to drive the word lines in response to a plurality of sub word line signals. A plurality of main word line driving units are configured to drive the sub word line driving units in response to a main word line signal. A precharge unit is configured to precharge the word lines. In the phase change memory device, the driving units are is decentralized. | 10-28-2010 |
Hyuck Soo Yoon, Ichon KR
| Patent application number | Description | Published |
|---|---|---|
| 20080279018 | REDUNDANCY CIRCUIT CAPABLE OF REDUCING TIME FOR REDUNDANCY DISCRIMINATION - A redundancy circuit in a semiconductor memory apparatus includes a comparison signal receiving unit to receive a plurality of comparison signals and a fuse enable signal in parallel, wherein the comparison signals are generated by comparing a plurality of row address signals to a plurality of fuse address signals; and a redundancy control signal generating unit for providing a redundancy control signal by controlling an output signal path of the comparison signal receiving unit in response to a signal level of a row address enable signal. The comparison signal receiving unit receives the plurality of the comparison signals and the fuse enable signal while the row address enable signal is activated. | 11-13-2008 |
Hyuck Soo Yoon, Cheongju KR
| Patent application number | Description | Published |
|---|---|---|
| 20110182113 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device prevents a faulty operation of a program operation, and increases the reliability of operation. The semiconductor memory device includes a unit cell including a memory element configured to have a different resistance value in response to data, and a write driver configured to output a program current and voltage for programming the unit cell in response to a test signal. | 07-28-2011 |