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Hye-Young Park

Hye-Young Park, Seoul KR

Patent application numberDescriptionPublished
20080293205METHOD OF FORMING METAL SILICIDE LAYER, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME - A method of forming a metal silicide layer includes sequentially forming a metal layer and a first capping layer on a substrate, performing a first heat treatment on the substrate to cause the substrate to react to the metal layer, removing the first, capping layer and an unreacted metal layer, forming a second capping layer on the substrate, and performing a second heat treatment on the substrate to form a metal silicide layer on the substrate.11-27-2008
20100200945Schottky diode and method of fabricating the same - A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.08-12-2010

Patent applications by Hye-Young Park, Seoul KR

Hye-Young Park, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20080272355PHASE CHANGE MEMORY DEVICE AND METHOD FOR FORMING THE SAME - A memory device using a phase change material and a method for forming the same are disclosed. One embodiment of a memory device includes a first insulating layer provided on a substrate and defining an opening; a first conductor including a first portion and a second portion, the first portion provided on a bottom of the opening, the second portion being continuously provided along a sidewall of the opening; a variable resistor connected to the second portion of the first conductor and provided along the sidewall of the opening; and a second conductor provided on the variable resistor.11-06-2008
20080308785PHASE CHANGE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a phase change memory device and a method for forming the phase change memory device. The method includes forming a phase change material layer by providing reactive radicals to a substrate. The reactive radicals may comprise precursors for a phase change material and nitrogen.12-18-2008
20090233421Methods of Fabricating Semiconductor Device Including Phase Change Layer - Provided are methods of fabricating a semiconductor device including a phase change layer. Methods may include forming a dielectric layer on a substrate, forming an opening in the dielectric layer and depositing, on the substrate having the opening, a phase change layer that contains an element that lowers a process temperature of a thermal treatment process to a temperature that is lower than a melting point of the phase change layer. Methods may include migrating a portion of the phase change layer from outside the opening, into the opening by the thermal treatment process that includes the process temperature that is lower than the melting point of the phase change layer.09-17-2009
20090285986METHODS OF FORMING A MATERIAL LAYER AND METHODS OF FABRICATING A MEMORY DEVICE - Provided are methods of forming a material layer by chemically adsorbing metal atoms to a substrate having anions formed on the surface thereof, and a method of fabricating a memory device by using the material layer forming method. Accordingly, a via hole with a small diameter can be filled with a material layer without forming voids or seams. Thus, a reliable memory device can be obtained.11-19-2009

Hye-Young Park, Seongnam-Si KR

Patent application numberDescriptionPublished
20080265236VARIABLE RESISTANCE NON-VOLATILE MEMORY CELLS AND METHODS OF FABRICATING SAME - Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. Formation of an integrated circuit memory cell include forming a first electrode on a substrate. An insulation layer is formed on the substrate with an opening that exposes at least a portion of a first electrode. An amorphous variable resistivity material is formed on the first electrode and extends away from the first electrode along sidewalls of the opening. A crystalline variable resistivity material is formed in the opening on the amorphous variable resistivity material. A second electrode is formed on the crystalline variable resistivity material.10-30-2008
20090075420METHOD OF FORMING CHALCOGENIDE LAYER INCLUDING TE AND METHOD OF FABRICATING PHASE-CHANGE MEMORY DEVICE - The method of forming a Te-containing chalcogenide layer includes radicalizing a first source that contains Te to form a radicalized Te source, and forming a Te-containing chalcogenide layer by supplying the radicalized Te source into a reaction chamber. A method fabricating a phase change memory device includes loading a substrate on which a lower electrode is formed into a reaction chamber, radicalizing a first source that contains Te to form a radicalized Te source, forming a phase change material film containing Te on the lower electrode by supplying the radicalized Te source into the reaction chamber, and forming an upper electrode on the phase change material film.03-19-2009
20090097305METHOD OF FORMING PHASE CHANGE MATERIAL LAYER USING GE(II) SOURCE, AND METHOD OF FABRICATING PHASE CHANGE MEMORY DEVICE - In one aspect, a method of forming a phase change material layer is provided. The method includes supplying a reaction gas including the composition of Formula 1 into a reaction chamber, supplying a first source which includes Ge(II) into the reaction chamber, and supplying a second source into the reaction chamber. Formula 1 is NR04-16-2009
20090278107Phase change memory device - The phase change memory device includes a first electrode and a second electrode and a first phase change material pattern and a second phase change material pattern interposed between the first electrode and the second electrode, wherein the first and second phase change material patterns have respectively different electrical characteristics.11-12-2009
20090280599PHASE CHANGE MEMORY DEVICE AND METHOD OF FABRICATION - A phase change memory device includes a bottom electrode on a substrate, a phase change material pattern on the bottom electrode, and a top electrode on the phase change material pattern. The phase change material pattern includes at least 50 percent antimony (Sb).11-12-2009
20110155985PHASE CHANGE STRUCTURE, AND PHASE CHANGE MEMORY DEVICE - A phase change structure includes a first phase change material layer pattern and a second phase change material layer pattern. The first phase change material layer pattern may partially fill a high aspect ratio structure, and the second phase change material layer pattern may fully fill the high aspect ratio structure. The first phase change material layer pattern may include a first phase change material, and the second phase change material layer pattern may include a second phase change material having a composition substantially different from a composition of the first phase change material.06-30-2011

Patent applications by Hye-Young Park, Seongnam-Si KR

Hye-Young Park, Yongin Si Suji-Gu KR

Patent application numberDescriptionPublished
20090017562RAMAN-ACTIVE REAGENTS - Raman Active Reagents (ERLs) are developed which use a nanoparticle substrate substantially covered with a mixed monolayer derived from a Raman active reporter molecule and an analyte binding molecule that both bind to the surface of the nanoparticle and thereby avoid the necessity for separate synthesis of a bifunctional linker molecule in making the ERL.01-15-2009

Hye-Young Park, Yongin Shi KR

Patent application numberDescriptionPublished
20080226917CORE-SHELL NANOPARTICLES WITH MULTIPLE CORES AND A METHOD FOR FABRICATING THEM - The present invention is directed toward core-shell nanoparticles, each comprising a ligand-capped metal shell surrounding a plurality of discrete, nonconcentric, metal-containing cores. Methods of making and using these nanoparticles are also disclosed.09-18-2008