| Patent application number | Description | Published |
| 20090210691 | Memory System and Memory Management Method Including the Same - A booting method of a digital processing having a first processor and a second processor is provided. An interface between the first processor and the outside is stopped. A second processor program code is transmitted to a second memory from a first memory. A second stage loader (SSL) for the first processor is transmitted to a buffer of the second processor from the first memory. A first processor program code is transmitted to the second memory from the first memory under the control of the second processor and an interface between the first processor and the outside is resumed. The first processor program code is downloaded fast into the second memory to decrease booting time of the digital processing system. | 08-20-2009 |
| 20100153637 | Arbitration for memory device with commands - A plurality of masters arbitrate for access to a shared memory device, such as a SDRAM (synchronous dynamic random access memory), amongst themselves using software and arbitration interfaces. The masters generate additional commands upon arbitration, such as MRS and PALL commands, for prevention of collision of commands, refresh starvation, and/or a missing pre-charge operation in the shared memory device. | 06-17-2010 |
| 20110119477 | MEMORY SYSTEM AND MEMORY MANAGEMENT METHOD INCLUDING THE SAME - A multi-processor system includes a first processor, a second processor communicable with the first processor, a first non-volatile memory for storing first codes and second codes to respectively boot the first and second processors, the first memory communicable with the first processor, a second volatile memory designated for the first processor, a third volatile memory designated for the second processor, and a fourth volatile memory shared by the first and second processors. | 05-19-2011 |
| 20120011323 | MEMORY SYSTEM AND MEMORY MANAGEMENT METHOD INCLUDING THE SAME - A multi-processor system includes a first processor, a second processor communicable with the first processor, a first non-volatile memory for storing first codes and second codes to respectively boot the first and second processors, the first memory communicable with the first processor, a second volatile memory designated for the first processor, a third volatile memory designated for the second processor, and a fourth volatile memory shared by the first and second processors. | 01-12-2012 |
| Patent application number | Description | Published |
| 20080205219 | JITTER MEASURING APPARATUS AND METHOD, SIGNAL PERIOD MEASURING APPARATUS AND METHOD, AND OPTICAL DISK PLAYER - An apparatus to measure jitter of a signal read from an optical disk includes a binarization unit to binarize an input signal to generate a binary signal, an ideal signal generator to generate a noise-free ideal signal based on channel characteristics of the optical disk, and a jitter measurement unit to measure jitter of the input signal based on the binary signal and the ideal signal. | 08-28-2008 |
| 20080298199 | WRITING STRATEGY PARAMETERS INDEXING METHOD AND RECORDING APPARATUS THEREFOR - A writing strategy parameters indexing method and a recording apparatus therefor. The writing strategy parameters indexing method includes operations of receiving an NRZ sequence; moving the NRZ sequence by as much as a bit with respect to a channel block using a slide-window having a length of N bits; determining whether a bit pattern of the NRZ sequence in the window-slide has a predetermined bit pattern; extracting writing strategy parameters corresponding to the predetermined bit pattern when the bit pattern of the NRZ sequence in the window-slide has the predetermined pattern; and generating recording pulses using the writing strategy parameters. | 12-04-2008 |
| 20090135692 | APPARATUS AND METHOD FOR DETERMINING WRITE STRATEGY, AND APPARATUS AND METHOD FOR RECORDING DATA - An apparatus and method for determining an optimal write strategy when recording data onto an optical disk, and an apparatus and method for recording data, the method of determining a write strategy including: recording test data for each size of marks and spaces based on a plurality of write strategies; reproducing the recorded test data; measuring jitter values of the reproduced test data based on the plurality of write strategies; and determining an optimal write strategy according to the measured jitter values. | 05-28-2009 |
| 20100238989 | SIGNAL QUALITY MEASURING APPARATUS AND METHOD THEREOF - A signal quality measuring apparatus includes a binary signal generating unit to generate a binary signal from an input signal; a level information extracting unit to extract level information from a relationship between the input signal and the binary signal using at least two window lengths; and a quality calculating unit to calculate a quality of the input signal based on the level information. | 09-23-2010 |
| 20110010604 | INFORMATION ENCODING METHOD, INFORMATION DECODING METHOD, RECORDING/REPRODUCING APPARATUS, AND INFORMATION STORAGE MEDIUM - A method of encoding information and a method of decoding information, and an apparatus to perform one or both methods, and an information storage medium on which to store the information, the method of encoding the information including encrypting data between two ECC-encoding operations, and the method of decoding the information including decrypting data between two ECC-decoding operations | 01-13-2011 |
| 20110194393 | RECORDABLE OPTICAL DISK, RECORDING DEVICE, RECORDING METHOD, AND REPRODUCTION DEVICE - The present invention is to realize a proper inner zone layout in an optical disk having at least three layers. A test area is provided in the inner zone (inner circumference side area) in each of recording layers. The test areas of each layer are so disposed as to be prevented from overlapping with each other in the layer direction. Furthermore, the number of management information recording/reproduction areas overlapping with the test area in the layer direction at a position closer to the laser-incident surface than this test area is set equal to or smaller than one in each test area of each recording layer. The management information recording/reproduction areas are each so disposed as to be prevented from overlapping with the test areas in the respective recording layers in the layer direction on the disk substrate side of the test areas. | 08-11-2011 |
| 20110305126 | INFORMATION STORAGE MEDIUM, RECORD REPRODUCTION APPARATUS, AND RECORD REPRODUCTION METHOD - Provided is an information storage medium that has a plurality of recording layers, a recording/reproducing method, and a recording/reproducing apparatus. In the information storage medium, each of the plurality of recording layers includes an inner circumference zone and a data zone, and at least one of the recording layers includes, in the inner circumference zone, a temporary disc management area (TDMA) for recording information about a defect detected in the data zone, wherein a size of a TDMA allocated on an upper layer is greater than a size of a TDMA allocated on a lower layer. | 12-15-2011 |
| 20110310715 | INFORMATION STORAGE MEDIUM, RECORD REPRODUCING DEVICE, AND RECORD REPRODUCING METHOD - Provided is an information recording medium including a plurality of recording layers. Each recording layer may comprise at least one optical power control (OPC) area, and each OPC area is allocated so as not to overlap an adjacent layer in a given radius. | 12-22-2011 |
| 20120026848 | INFORMATION STORAGE MEDIUM, RECORDING AND REPRODUCING APPARATUS, AND RECORDING AND REPRODUCING METHOD - An information storage medium is provided. The information storage medium includes a user data area on which user data is recorded, and a temporary disc management area on which a space bitmap representing a recording status of at least one recording/reproducing unit block of the user data area is recorded. The temporary disc management area including information about an additional space bitmap which is assigned to provide additional space to represent the recording status of the at least one recording/reproducing unit block of the user data area. | 02-02-2012 |
| Patent application number | Description | Published |
| 20100038150 | PASSENGER DISTINGUISHING APPARATUS - A passenger distinguishing apparatus is provided. The passenger distinguishing apparatus includes: a plurality of lower brackets that are fixed to a floor of a vehicle room; upper brackets that assist mounting of a passenger seat disposed at an upper part of the lower brackets; and a plurality of sensors that are disposed between the lower brackets and the upper brackets to detect a weight of a passenger seated in the passenger seat, wherein in an upper end part and a lower end part of the sensors, male screw threads for bolt-fastening to fastening holes formed at each of the lower bracket and the upper bracket are formed, and in at least one of the upper end part and the lower end part of the sensors, dampers for absorbing assembling tolerance of the sensors while being fixed due to a contact with nuts tightened and fixed to a portion in which the male screw threads are formed, are formed. Therefore, an assembling process can be improved, a cost can be reduced, and durability of the sensor can be improved. | 02-18-2010 |
| 20100038940 | PASSENGER DISTINGUISHING APPARATUS - A passenger distinguishing apparatus is provided. The passenger distinguishing apparatus includes: a weight detection sensor that is assembled in a vehicle seat to detect a passenger's weight; and a first bracket and a second bracket that assemble the weight detection sensor in the seat, wherein the weight detection sensor has a length direction in a horizontal direction of the seat, and a first damper for absorbing assembling tolerance of the weight detection sensor is disposed between the first bracket and the weight detection sensor. Therefore, assembling tolerance can be absorbed with minimum parts, production can be improved, contact noise can be reduced, and a weight and cost can be reduced. | 02-18-2010 |
| 20110221453 | OCCUPANT CLASSIFYING DEVICE FOR AN AUTOMOBILE - Provided is an occupant classifying device which can detect an occupant sitting on a seat by a change in an electric field between first and second electrodes that is caused by the occupant sitting on the seat. The occupant classifying device includes: a seat for an occupant to sit on; a first electrode disposed in the seat; a second electrode disposed in the seat, spaced apart from the first electrode, and forming an electric field between the first and second electrodes; and a current measuring device for measuring a variation in current value corresponding to changes in the electric field caused by the occupant sitting on the seat. | 09-15-2011 |
| Patent application number | Description | Published |
| 20090056866 | SUBSTRATE BONDING APPARATUS AND METHOD - A substrate bonding apparatus including a first chamber including a first surface plate on which a first substrate is received, a surface plate lift for lifting the first surface plate, a second chamber including a second surface plate on which a second substrate to be bonded to the first substrate is received, at least one adhesive included with the first surface plate to adhere to the first substrate, and an adhesive lift for independently lifting the adhesive. | 03-05-2009 |
| 20090065152 | ADHESIVE CHUCK AND SUBSTRATE BONDING APPARATUS - A substrate bonding apparatus includes a first chamber including a first surface plate on which a first substrate is supported, a second chamber spaced from the first chamber and including a second surface plate on which a second substrate to be bonded to the first substrate is supported, an adhesive module provided on the first surface plate and including a plurality of adhesive rubber areas holding the first substrate, and a lift module for lifting at least one of the plurality of adhesive rubber areas. | 03-12-2009 |
| 20090114348 | SUBSTRATE BONDING APPARATUS - A substrate bonding apparatus and method are provided. The substrate bonding apparatus may include a board having a receiving surface opposite to a substrate fixed at one side thereof, a plurality of chucking members located between the receiving surface of the board and the substrate, and a substrate separation device to separate the substrate from the chucking members. The substrate separation device includes a pusher for pushing the substrate to separate the substrate from the chucking members, and a base plate installed at the receiving surface of the board, the base plate having an installation space to install the pusher formed therein. The pusher protrudes out of the base plate through an inlet and outlet port located at one end of the installation space to pressurize the substrate. | 05-07-2009 |
| 20090141418 | ELECTROSTATIC CHUCK AND APPARATUS HAVING THE SAME - An electrostatic chuck and an apparatus having the electrostatic chuck are provided. The electrostatic chuck may attract a substrate during a substrate assembling process for manufacturing a flat display panel. An elastic layer made of an elastic material may be provided in a base part of the electrostatic chuck, thus preventing non-uniform stress from being distributed on the substrate due to external force, therefore maintaining the flatness of the substrate and improving the quality of assembled substrates. The electrostatic chuck may include an electrostatic force generating part provided on an upper surface of the base part, the force generating part including an insulating layer, an electrode layer, a dielectric layer. The base part may be provided with the elastic layer made of the elastic material having elastic restoring force. | 06-04-2009 |
| 20110067805 | APPARATUS AND METHOD FOR ATTACHING SUBSTRATES - An apparatus for attaching substrates includes an upper chamber for holding an upper substrate and a lower chamber for holding a lower substrate which is to be attached to the upper substrate. The lower chamber is moved up and down so as to come together with the upper chamber to form a sealed attaching space. A substrate receiving part is fixed to a frame of the apparatus so that it does not move as the lower chamber is raised and lowered. The substrate receiving part alternatively projects from the lower chamber is the lower chamber is moved down, or is recessed into the top of the lower chamber when the lower chamber is lifted up. | 03-24-2011 |
| Patent application number | Description | Published |
| 20080207194 | Apparatus and method for beamforming using sector common antenna in wireless communication system - An apparatus and method for beamforming in a wireless communication system are provided. The base station apparatus includes a calculator, a plurality of formers, and a plurality of adders. The calculator calculates a beam coefficient considering interference to a neighbor sector to be applied to transmission signals to mobile stations. The plurality of formers performs beamforming for a transmission signal to each mobile station within a corresponding sector using the beam coefficient. The plurality of adders adds the sector-based beamformed signals each provided from the plurality of formers, on a per-transmission-antenna basis. | 08-28-2008 |
| 20090061842 | Apparatus and method for interference cancellation in wireless communication system - An apparatus and a method for interference cancellation in a wireless communication system are provided. The method includes receiving channel information from one or more terminals; classifying the terminals into terminals interfered by a neighbor cell and terminals not interfered by the neighbor cell based on the channel information of the terminals; and allocating the terminals interfered by the neighbor cell and the terminals not interfered by the neighbor cell into different resource regions. The transmitter forms the beam taking into consideration the neighbor-cell interference by acquiring the channel information of the neighbor-cell terminals interfered by the transmitter and the scheduled terminal information during beamforming. | 03-05-2009 |
| 20090168911 | APPARATUS AND METHOD FOR CHANNEL INFORMATION FEEDBACK IN MULTIPLE ANTENNA SYSTEM - An apparatus and method for channel information feedback in a multiple antenna system are provided. The method includes selecting at least one code for at least one Eigen vector based on channel information with a serving node from a codebook including at least one code, constructing a set of codes orthogonal to a first code including the at least one selected code, and indicating the first code using an amount of information that enables expression of the codes of the codebook, indicating codes, other than the first code, in the constructed set using an amount of information that enables expression of the codes included in the set and performing feedback to the serving node. | 07-02-2009 |
| 20090190687 | METHOD AND APPARATUS FOR ALLOCATING FEEDBACK CHANNEL IN MULTIPLE ANTENNA COMMUNICATION SYSTEM - A method and apparatus for allocating a feedback channel in a multiple antenna communication system are provided. In a method of operating a Base Station (BS) for allocating a feedback channel in a Multi-User Multiple-Input Multiple-Output (MU-MIMO) communication system, the method includes measuring a MIMO transmission environment, determining an amount of feedback according to the MIMO transmission environment, and allocating a feedback channel according to an amount of the feedback. | 07-30-2009 |
| 20090191819 | APPARATUS AND METHOD FOR CALIBRATION IN MULTI-ANTENNA SYSTEM - Apparatus and method for calibration in a multi-antenna system are provided. The method includes setting at least two transmission paths connected to antennas, respectively, as reference transmission paths, when receiving compensation signals transmitted in the reference transmission paths in at least two reception paths connected to the antennas, respectively, determining a phase difference of the reception paths using the received compensation signals, and calibrating the reception paths using the phase difference of the reception paths. | 07-30-2009 |
| Patent application number | Description | Published |
| 20100048012 | Method for fabricating nonvolatile memory device - Provided is a method for fabricating a nonvolatile memory device capable of improving charge retention characteristics. The method for fabricating a nonvolatile memory device includes forming a charge trapping layer with a memory region and a charge blocking region on a semiconductor substrate, and trapping charges in the charge blocking region of the charge trapping layer. | 02-25-2010 |
| 20100062595 | Nonvolatile memory device and method of forming the same - A nonvolatile memory device and a method of forming the nonvolatile memory device, the method including forming a tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes forming a multi-element insulating layer by a process including sequentially supplying a first element source, a second element source, and a third element source to the substrate, forming a charge storage layer on the tunnel insulating layer, forming a blocking insulating layer on the charge storage layer, and forming a control gate electrode on the blocking insulating layer. | 03-11-2010 |
| 20100123181 | NONVOLATILE MEMORY DEVICES INCLUDING MULTIPLE CHARGE TRAPPING LAYERS - A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the substrate and the gate electrode; a charge tunneling layer between the charge trapping layer and the substrate; and a charge blocking layer between the gate electrode and the charge trapping layer. The charge trapping layer includes a first charge trapping layer having a first energy band gap and a second charge trapping layer having a second energy band gap that is different than the first energy band gap. The first and second charge trapping layers are repeatedly stacked and the first and second energy band gaps are smaller than energy band gaps of the charge tunneling layer and the charge blocking layer. | 05-20-2010 |
| 20100163968 | SEMICONDUCTOR MEMORY DEVICE HAVING INSULATION PATTERNS AND CELL GATE PATTERNS - Semiconductor memory devices and methods of forming semiconductor memory devices are provided. The methods may include forming insulation layers and cell gate layers that are alternately stacked on a substrate, forming an opening by successively patterning through the cell gate layers and the insulation layers, and forming selectively conductive barriers on sidewalls of the cell gate layers in the opening. | 07-01-2010 |
| 20110001181 | Nonvolatile Memory Devices - Provided is a nonvolatile memory device. The nonvolatile memory device includes: a tunnel insulation layer on a semiconductor substrate; a floating gate electrode including a bottom gate electrode doped with carbon and contacting the tunnel insulation layer and a top gate electrode on the bottom gate electrode; a gate interlayer insulation layer on the floating gate electrode; and a control gate electrode on the gate interlayer insulation layer. | 01-06-2011 |
| 20110049610 | NONVOLATILE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a nonvolatile memory device and a method of forming the same. The nonvolatile memory device includes: a semiconductor substrate including a device isolation layer defining an active region; a tunnel insulating layer on the active region; a charge trapping layer on the tunnel insulating layer; a blocking insulating layer on the charge trapping layer and the device isolation layer; a gate electrode on the blocking insulating layer; and a barrier capping layer formed between the device isolation layer and the blocking insulating layer. | 03-03-2011 |
| 20110101443 | NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - Provided are a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a stacked structure, a semiconductor pattern, an information storage layer, and a fixed charge layer. The stacked structure may be disposed over a semiconductor substrate. The stacked structure may include conductive patterns and interlayer dielectric patterns alternately stacked therein. The semiconductor pattern may be connected to the semiconductor substrate by passing through the stacked structure. The information storage layer may be disposed between the semiconductor pattern and the conductive patterns. The fixed charge layer may be disposed between the semiconductor pattern and the interlayer dielectric pattern. The fixed charge layer may include fixed charges. Electrical polarity of the fixed charges may be equal to electrical polarity of majority carriers of the semiconductor pattern. | 05-05-2011 |
| 20110143524 | Methods of Manufacturing Rewriteable Three-Dimensional Semiconductor Memory Devices - Methods of forming nonvolatile memory devices include forming a vertical stack of nonvolatile memory cells on a substrate. This is done by forming a vertical stack of spaced-apart gate electrodes on a first sidewall of a vertical silicon active layer and treating a second sidewall of the vertical silicon active layer in order to reduce crystalline defects within the active layer and/or reduce interface trap densities therein. This treating can include exposing the second sidewall with an oxidizing species that converts a surface of the second sidewall into a silicon dioxide passivation layer. A buried insulating pattern may also be formed directly on the silicon dioxide passivation layer. | 06-16-2011 |
| 20110147825 | NONVOLATILE MEMORY DEVICES INCLUDING DEEP AND HIGH DENSITY TRAPPING LAYERS - A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the gate electrode and the substrate, the charge trapping layer having trap sites configured to trap charges; a charge tunneling layer between the trapping layer and the semiconductor substrate; and a charge blocking layer between the gate electrode and the trapping layer. The charge trapping layer comprises a deep trapping layer having a plurality of energy barriers and a high density trapping layer having a trap site density higher than a trap site density of the deep trapping layer. | 06-23-2011 |
| 20110186851 | MULTILAYER SEMICONDUCTOR DEVICES WITH CHANNEL PATTERNS HAVING A GRADED GRAIN STRUCTURE - Memory devices include a stack of interleaved conductive patterns and insulating patterns disposed on a substrate. A semiconductor pattern passes through the stack of conductive patterns and insulating patterns to contact the substrate, the semiconductor pattern having a graded grain size distribution wherein a mean grain size in a first portion of the semiconductor pattern proximate the substrate is less than a mean grain size in a second portion of the semiconductor pattern further removed from the substrate. The graded grain size distribution may be achieved, for example, by partial laser annealing. | 08-04-2011 |
| 20110207303 | Methods of Fabricating Semiconductor Devices - Methods for fabricating a semiconductor device are provided. In the methods, first material layers and second material layers may be alternatingly and repeatedly stacked on a substrate. An opening penetrating the first material layers and the second material layers may be formed. A semiconductor solution may be formed in the opening by using a spin-on process. | 08-25-2011 |
| 20110215392 | Semiconductor Devices and Methods of Manufacturing the Same - Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration. | 09-08-2011 |
| 20110233648 | Three-Dimensional Semiconductor Memory Devices And Methods Of Fabricating The Same - Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns. | 09-29-2011 |
| 20110248327 | Three-Dimensional Semiconductor Memory Devices and Methods of Forming the Same - Nonvolatile memory devices include a string of nonvolatile memory cells on a substrate. This string of nonvolatile memory cells includes a first vertical stack of nonvolatile memory cells on the substrate and a string selection transistor on the first vertical stack of nonvolatile memory cells. A second vertical stack of nonvolatile memory cells is also provided on the substrate and a ground selection transistor is provided on the second vertical stack of nonvolatile memory cells. This second vertical stack of nonvolatile memory cells is provided adjacent the first vertical stack of nonvolatile memory cells. A conjunction doped semiconductor region is provided in the substrate. This conjunction doped region electrically connects the first vertical stack of nonvolatile memory cells in series with the second vertical stack of nonvolatile memory cells so that these stacks can operate as a single NAND-type string of memory cells. | 10-13-2011 |
| 20110298038 | THREE DIMENSIONAL SEMICONDUCTOR DEVICE - Provided are a three-dimensional semiconductor memory device and manufacturing method of the three-dimensional semiconductor memory device. The three-dimensional semiconductor memory device may include a gate structure on a substrate with the gate structure including a plurality of gate electrodes. Conductive lines are disposed between the gate structure and the substrate. A horizontal semiconductor pattern is disposed between the gate structure and the conductive line. And a vertical semiconductor pattern penetrating the gate structure is connected to the horizontal semiconductor pattern. | 12-08-2011 |
| 20110303971 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a three-dimensional semiconductor memory includes forming a plurality of stacked structures disposed on a substrate to be spaced apart from each other, each of the stacked structures including a plurality of dielectric patterns and a plurality of polysilicon patterns alternately stacked, forming a metal layer to cover sidewalls of the stacked structures and a top surface of the substrate exposed between the stacked structures, and forming stacked gate electrodes on the substrate and a conductive line in the substrate by performing a silicidation process between the metal layer and each of the polysilicon patterns and the substrate. | 12-15-2011 |
| 20110316064 | Semiconductor Memory Devices And Methods Of Forming The Same - Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include gate patterns and insulation patterns repeatedly and alternatingly stacked on a substrate. The semiconductor devices may also include a through region penetrating the gate patterns and the insulation patterns. The semiconductor devices may further include a channel structure extending from the substrate through the through region. The channel structure may include a first channel pattern having a first shape. The first channel pattern may include a first semiconductor region on a sidewall of a portion of the through region, and a buried pattern dividing the first semiconductor region. The channel structure may also include a second channel pattern having a second shape. The second channel pattern may include a second semiconductor region in the through region. A grain size of the second semiconductor region may be larger than that of the first semiconductor region. | 12-29-2011 |
| 20120001345 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a three dimensional semiconductor device. The device may include mold layers vertically and sequentially stacked, a conductive pattern between the stacked mold layers, a plugging pattern vertically penetrating the stacked mold layers, an intermediate pattern between the conductive pattern and the plugging pattern, and protective layer patterns between the mold layers and the plugging pattern, wherein the protective layer patterns are separated by the intermediate pattern. | 01-05-2012 |
| 20120032250 | SEMICONDUCTOR DEVICES - A semiconductor device can include a first substrate and conductive patterns on the first substrate, where the conductive patterns are disposed in stacks vertically extending from the substrate. An active pillar can be on the first substrate vertically extend from the first substrate through the conductive patterns to provide vertical string transistors on the first substrate. A second substrate can be on the conductive patterns and the active pillar opposite the first substrate. A peripheral circuit transistor can be on the second substrate opposite the first substrate, where the peripheral circuit transistor can be adjacent to and overlap an uppermost pattern of the conductive patterns. | 02-09-2012 |
| 20120064681 | Semiconductor Memory Device And Method Of Forming The Same - Semiconductor memory devices and methods of forming semiconductor memory devices are provided. The methods may include forming insulation layers and cell gate layers that are alternately stacked on a substrate, forming an opening by successively patterning through the cell gate layers and the insulation layers, and forming selectively conductive barriers on sidewalls of the cell gate layers in the opening. | 03-15-2012 |
| 20120104485 | Nonvolatile Memory Devices And Methods Of Manufacturing The Same - A method of manufacturing a nonvolatile memory device includes forming a tunnel dielectric layer, a charge storage layer, and a hard mask layer on a substrate in sequential order. Active portions are defined by forming trenches in the substrate. A tunnel dielectric pattern, a preliminary charge storage pattern, and a hard mask pattern are formed on each of the active portions in sequential order by sequentially patterning the hard mask layer, the charge storage layer, the tunnel dielectric layer, and the substrate. A capping pattern is formed covering an upper surface of the trenches such that a first void remains in a lower portion of the trenches, the capping pattern including etch particles formed by etching the hard mask pattern through a sputtering etch process. | 05-03-2012 |
| 20120112260 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES - Provided are three-dimensional semiconductor devices. The device includes conductive patterns stacked on a substrate, and an active pattern penetrating the conductive patterns to be connected to the substrate. The active pattern includes a first doped region disposed adjacent to at least one of the conductive patterns, and a diffusion-resistant doped region overlapped with at least a portion of the first doped region. The diffusion-resistant doped region may be a region doped with carbon. | 05-10-2012 |
| Patent application number | Description | Published |
| 20090011772 | MOBILE TERMINAL APPARATUS, METHOD, AND SERVER FOR SHARING CONTENTS - A mobile terminal apparatus and method for sharing contents are provided. The mobile terminal apparatus includes a storage unit storing location information on an area; a location determination unit for determining a location of the mobile terminal apparatus; a network unit forming a network with one or more other mobile terminal apparatuses in the area; a control unit checking whether the mobile terminal apparatus has entered the area, based on the location information on the area and the determined location; and a screen configuration unit configuring a screen for providing information indicating locations of the one or more other mobile terminal apparatuses; wherein the control unit controls the network unit whereby the network unit obtains contents contained in one of the one or more other mobile terminal apparatuses, wherein the one mobile terminal apparatus is selected based on the information displayed on the screen and indicating the locations of the one or more other mobile terminal apparatuses. According to the apparatus and method, it is possible for users to share and watch user-created private media in real-time using bidirectional networking. Therefore, efficiency of media usage is increased. | 01-08-2009 |
| 20100077333 | METHOD AND APPARATUS FOR NON-HIERARCHICAL INPUT OF FILE ATTRIBUTES - The present invention discloses a method and an apparatus to manage files by storing attribute information of the files in a non-hierarchical structure. At least one file and an attribute input window may be displayed on a display unit. At least one file attribute may be input through the window and displayed in the form of a graphical user interface object, such as an icon. By dragging and dropping either the file to the icon or the icon to the file, the file attribute may be input into the file in a non-hierarchical structure. | 03-25-2010 |
| 20100077337 | ELECTRONIC DEVICE MANAGEMENT METHOD, AND ELECTRONIC DEVICE MANAGEMENT SYSTEM AND HOST ELECTRONIC DEVICE USING THE METHOD - An electronic device managing method and system, and a host electronic device using the method are disclosed. A plurality of client electronic devices may be connected to the host electronic device. The host electronic device may perform file storage state management, remaining battery capacity management, and file reproduction management, thereby integrally and efficiently managing the plurality of client electronic devices. The file storage state management may include managing file storage states corresponding to the memories of the plurality of client electronic devices, respectively. The remaining battery capacity management may include managing the remaining capacity of the batteries of the plurality of client electronic devices. The file reproduction management may include reproducing at least one of the files stored in the plurality of client electronic devices. | 03-25-2010 |
| 20100145948 | METHOD AND DEVICE FOR SEARCHING CONTENTS - Disclosed are a method and a device for searching contents by using time information or spatial information. The device for contents search includes a memory unit configured to store contents having spatial information and time information as search information and to further store groups into which the contents are classified by the spatial information or the time information. The device further includes a display unit configured to display a time information search tool and a spatial information search tool in response to receipt of a request for a contents search is received, and to further display the contents belonging to a searched group. Also the device includes an input unit configured to receive an input of search information and a control unit configured to search a group having the selected search information. | 06-10-2010 |