Patent application number | Description | Published |
20120072809 | DECODER, METHOD OF OPERATING THE SAME, AND APPARATUSES INCLUDING THE SAME - A decoder, a method of decoding and systems implementing the same are disclosed. In one example, the method includes calculating syndrome values from input codewords, generating an error location polynomial about the codewords using the syndrome values, determining an error count in the codewords using the error location polynomial, and adjusting power consumption of a circuit in response to the determined error count in the codewords. In one example, a frequency of a clock signal to be provided to a search circuit may be determined based on the error count, and the clock signal may be provided having the determined frequency to a search circuit, such as a Chien search circuit. | 03-22-2012 |
20130013854 | MEMORY CONTROLLER, METHOD THEREOF, AND ELECTRONIC DEVICES HAVING THE MEMORY CONTROLLER - A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed. | 01-10-2013 |
20130013855 | MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME - A memory controller may include a cell state generator that is configured to generate a cell state for each of a plurality of multi-level cells included in a non-volatile memory device, using data of pages. The memory controller may also include a pseudo-random number generator that is configured to generate a pseudo-random number. The memory controller may further include an operator that is configured to change the cell state of each multi-level cell using the pseudo-random number, and that is configured to output a changed cell state for each multi-level cell. | 01-10-2013 |
20130015897 | DUTY RATIO CORRECTION CIRCUITAANM KIM; Young-wookAACI Gunpo-siAACO KRAAGP KIM; Young-wook Gunpo-si KRAANM JANG; Soon-bokAACI SeoulAACO KRAAGP JANG; Soon-bok Seoul KRAANM SONG; Jong-ukAACI SeoulAACO KRAAGP SONG; Jong-uk Seoul KRAANM OH; Hwa-seokAACI Yongin-siAACO KRAAGP OH; Hwa-seok Yongin-si KRAANM KIM; Sung-haAACI SeoulAACO KRAAGP KIM; Sung-ha Seoul KR - A duty ratio correction circuit for correcting a duty ratio of a clock signal. The duty ratio correction circuit includes an asymmetry buffer that receives a clock signal and adjusts a duty ratio of the clock signal in response to control signals; a clock generating circuit that i s connected to the asymmetry buffer and detects the duty ratio of the clock signal; and a controller that generates the control signals according to the duty ratio of the clock signal. An operation of the controller is recorded as a program on a computer-readable recording medium. | 01-17-2013 |
20130094312 | VOLTAGE SCALING DEVICE OF SEMICONDUCTOR MEMORY - A voltage scaling device of a semiconductor memory device, the voltage scaling device including: a delay tester for determining the number of delay cells of a delay locked loop (DLL) required to cumulatively delay a clock signal having a constant frequency, and which is input to the DLL, by one clock period; a temperature sensor for measuring the temperature of the semiconductor memory device; and a voltage regulator for regulating a supply voltage of a voltage source which provides a chip voltage to the semiconductor memory device in response to the temperature measured by the temperature sensor and a locking value corresponding to the number of delay cells calculated by the delay tester. | 04-18-2013 |
20140082397 | EMBEDDED MULTIMEDIA CARD USING UNIDIRECTIONAL DATA STROBE SIGNAL, HOST FOR CONTROLLING THE SAME, AND RELATED METHODS OF OPERATION - An embedded multimedia card (eMMC) comprises a clock channel configured to receive a clock signal from a host, a command channel configured to receive a command from the host, a plurality of data channels configured to transmit data to the host, a data strobe channel configured to transmit a data strobe signal synchronized with the data to the host, and a data strobe control unit configured to selectively enable or generate the data strobe signal according to a protocol control signal. | 03-20-2014 |
20140082405 | EMBEDDED MULTIMEDIA CARD (eMMC), HOST CONTROLLING eMMC, AND METHOD OPERATING eMMC SYSTEM - An embedded multimedia card (eMMC) includes a clock channel that receives a clock signal from a host, a command channel that receives a command from the host, a plurality of data channels that transmit data to the host, and a return clock channel that transmits a return clock synchronized with the data to the host. | 03-20-2014 |
20150199137 | EMBEDDED MULTIMEDIA CARD AND METHOD OF OPERATING THE SAME - An embedded multimedia card (eMMC) and a method of operating the same are provided. The eMMC includes a flash memory and a device controller configured to control the flash memory. The device controller includes a command storage unit configured to receive a command transmitted from a host regardless of a state of a data bus and to store task information by task ID; and a status storage unit configured to store status information based on task status by task ID. | 07-16-2015 |