Patent application number | Description | Published |
20080198056 | Analog to digital converter - An analog to digital converter is provided in which the outputs of first and second digital to analog converters DAC | 08-21-2008 |
20100277231 | FILTERING ON CURRENT MODE DAISY CHAIN INPUTS - Embodiments may include a data receiver having input for a current signal. The data receiver may further include a current generator to generate a reference current for comparison against the input current signal. The data receiver may also include a data converter having an input coupled to an intermediate node of the data receiver, the data converter comprising a plurality of cascaded stages with intermediate nodes among the stages. | 11-04-2010 |
20110215957 | PIPELINE ANALOG TO DIGITAL CONVERTER AND A RESIDUE AMPLIFIER FOR A PIPELINE ANALOG TO DIGITAL CONVERTER - A pipeline analog to digital converter comprising: a first analog to digital converter for determining a first part of an analog to digital conversion result, and for forming a residue signal; an amplifier for amplifying the residue signal, the amplifier including at least one offset sampling capacitor for sampling an offset of the amplifier, wherein at least one resistance is associated with the at least one capacitor so as to form a filter, and the at least one resistor is variable such that an amplifier bandwidth can be switched between a first bandwidth and a second bandwidth less than the first bandwidth during sampling of the offset. | 09-08-2011 |
20120007660 | Bias Current Generator - A bias current generator comprising at least one field effect transistor operating as a current source or sink, a capacitive store for storing a first control voltage, and a first switch for selectively connecting the capacitive store to a gate of the at least one field effect transistor. | 01-12-2012 |
20130249727 | REFERENCE CIRCUIT SUITABLE FOR USE WITH AN ANALOG TO DIGITAL CONVERTER AND AN ANALOG TO DIGITAL CONVERTER INCLUDING SUCH A REFERENCE CIRCUIT - A reference circuit for use with a charge redistribution analog to digital converter, having a capacitor array, the reference circuit comprising: an input for receiving a signal; an output for supplying a reference voltage to at least one capacitor of the charge redistribution capacitor array; a storage capacitor for storing the reference voltage; a voltage modification circuit for comparing the reference voltage stored on the storage capacitor with the reference signal, and based on the comparison to supply a correction so as to reduce a difference between the reference voltage and the reference signal, the correction being applied during a correction phase; and a first switch for selectively connecting the storage capacitor to the input during an acquisition phase. | 09-26-2013 |
20140253237 | Amplifier, a Residue Amplifier, and an ADC including a Residue Amplifier - An amplifier, comprising: an input node; an output node; a gain stage having a gain stage inverting input, a gain stage non-inverting input and a gain stage output; a feedback capacitor connected in a signal path between the gain stage output and the gain stage inverting input; a sampling capacitor connected between the input node and the gain stage non-inverting input, and a controllable impedance in parallel with the feedback capacitor, wherein the controllable impedance is operable to switch between a first impedance state in which it does not affect current flow through the feedback capacitor, and a second impedance state in which it cooperates with the feedback capacitor form a bandwidth limiting circuit. | 09-11-2014 |
Patent application number | Description | Published |
20100097256 | Apparatus for and Method of Performing an Analog to Digital Conversion - An analog to digital converter adapted to perform a first, more significant, part of a conversion as a successive approximation conversion, a pipeline conversion or a flash conversion and a second, least significant, part of a conversion as a sigma-delta conversion. | 04-22-2010 |
20100176979 | ANALOG TO DIGITAL CONVERTER - An analog to digital converter comprising an Nth analog to digital converter and an N+1th analog to digital converter arranged in series such that a residue signal from the Nth analog to digital converter is provided as an input to the N+1th analog to digital converter, characterised in that a bandwidth control means is provided in a signal path for the residue signal and the bandwidth control means is controlled so as to have a first bandwidth during a first period following generation of a conversion result from the Nth analog to digital converter, and a second bandwidth less than the first bandwidth in a second period following the first period. | 07-15-2010 |
20100315278 | MOST SIGNIFICANT BITS ANALOG TO DIGITAL CONVERTER, AND AN ANALOG TO DIGITAL CONVERTER INCLUDING A MOST SIGNIFICANT BITS ANALOG TO DIGITAL CONVERTER - A most significant bits analog to digital converter for determining a first P bits of an N bit analog to digital conversion, the most significant bits analog to digital converter comprising: a digital to analog converter a capacitive attenuator, and a switching arrangement for inhibiting action of the attenuator during sampling and enabling the attenuator during conversion. | 12-16-2010 |
20120001673 | LOW POWER FAST LEVEL SHIFTER - A lever shifter is provided for receiving a signal in a first voltage domain and providing an output signal in a second voltage domain. The level shifter reduces propagation delay and power consumption by mitigating contention between NFETs and PFETs during signal propagation. | 01-05-2012 |
20140070976 | ANALOG TO DIGITAL CONVERTER INCLUDING A PRE-CHARGE CIRCUIT - An analog to digital converter comprising at least one sampling capacitor connected to a sample node, and a pre-charge circuit arranged to cause the voltage on the sample node to substantially match the input voltage prior to the analog to digital converter entering an acquire mode in which the sample node is connected to the input node by a sample switch. | 03-13-2014 |
20140085117 | SAMPLING CIRCUIT, A METHOD OF REDUCING DISTORTION IN A SAMPLING CIRCUIT, AND AN ANALOG TO DIGITAL CONVERTER INCLUDING SUCH A SAMPLING CIRCUIT - A sampling circuit comprising: an input node; a first signal path comprising a first sampling capacitor and a first signal path switch in a signal path between the input node and a first plate of the first sampling capacitor; a second signal path comprising a second sampling capacitor and a second signal path switch in a signal path between the input node and a first plate of the second sampling capacitor, and a signal processing circuit for forming a difference between a signal sampled onto the first sampling capacitor and a signal sampled onto the second sampling capacitor. | 03-27-2014 |
20140253223 | METHOD OF IMPROVING NOISE IMMUNITY IN A SIGNAL PROCESSING APPARATUS, AND A SIGNAL PROCESSING APPARATUS HAVING IMPROVED NOISE IMMUNITY - A signal processing apparatus that includes a circuit in which a signal processing function is performed during a first time period, the signal processing apparatus including or being associated with a switch or a filter in a power supply to the signal processing apparatus so as to disconnect the signal processing apparatus from the power supply or to filter the power supply during a second time period that is coincident with at least part of the first time period. | 09-11-2014 |