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Huo, KR
Dongim Huo, Gumi-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090153771 | Liquid crystal display module - A liquid crystal display module includes: a liquid crystal display panel; a plurality of lamps that irradiates light to the liquid crystal display panel; a bottom cover that receives the plurality of lamps; a diffusion plate on the plurality of lamps, the diffusion plate diffusing the light irradiated by the lamps toward the liquid crystal display panel; and a pair of lamp guides each including a first frame member positioned perpendicular to the lamps on the bottom cover and at least one second frame member forming a predetermined angle with the first frame member, wherein a plurality of supports for supporting the diffusion plate are fastened on each of the first frame member and the second frame member. | 06-18-2009 |
Dong Im Huo, Gyenongsangbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090073341 | Liquid crystal module - A liquid crystal module includes: a first support part for receiving and affixing ends of a plurality of lamps; an optical plate disposed above an upper surface of the first support part; a second support part for retaining the optical plate and having a lower surface above the optical plate, wherein the upper surface of the first support part or the lower surface of the second support part has a recessed portion contacting the optical plate such that a gap is formed between the optical plate, and one of the upper surface of the first support part and the lower surface of the second support part. | 03-19-2009 |
Dong Im Huo, Gyeongbuk KR
| Patent application number | Description | Published |
|---|---|---|
| 20100283716 | BACKLIGHT UNIT AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME - A backlight unit adapted to prevent a combination defect is disclosed. The backlight unit includes: a plurality of light sources arranged in fixed intervals; first and second light source printed-circuit-boards configured to apply driving signals to the plurality of light sources; a plurality of grips disposed on the first and second light source printed-circuit-boards and engaged with both ends of the light sources; and at least two support sides disposed on both ends of the light sources and configured to each include a protrusion which is united with the support side and is configured to prevent a separation of the light sources. | 11-11-2010 |
Dong-Im Huo, Gumi-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110296663 | LIQUID CRYSTAL DISPLAY MODULE WITH REFLECTOR HAVING RAISED LAMP GUIDE - A liquid crystal display module displays an image on a liquid crystal panel. The liquid crystal module includes a liquid crystal panel and a backlight assembly. The backlight assembly includes a reflecting sheet having a raised portion that receives a light source and supports a diffusing sheet and/or optical sheet positioned between the liquid crystal panel and the light source. | 12-08-2011 |
Zhongliang Huo, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110073841 | NANO LINE STRUCTURES IN MICROELECTRONIC DEVICES - A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed. | 03-31-2011 |
Zongliang Huo, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110101443 | NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - Provided are a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a stacked structure, a semiconductor pattern, an information storage layer, and a fixed charge layer. The stacked structure may be disposed over a semiconductor substrate. The stacked structure may include conductive patterns and interlayer dielectric patterns alternately stacked therein. The semiconductor pattern may be connected to the semiconductor substrate by passing through the stacked structure. The information storage layer may be disposed between the semiconductor pattern and the conductive patterns. The fixed charge layer may be disposed between the semiconductor pattern and the interlayer dielectric pattern. The fixed charge layer may include fixed charges. Electrical polarity of the fixed charges may be equal to electrical polarity of majority carriers of the semiconductor pattern. | 05-05-2011 |
Zong-Liang Huo, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080246067 | Dram device and method of manufacturing the same - In a DRAM device and a method of manufacturing the same, a multiple tunnel junction (MTJ) structure is provided, which includes conductive patterns and nonconductive patterns alternately stacked on each other. The nonconductive patterns have a band gap larger than a band gap of the conductive patterns. A gate insulation layer and a gate electrode are formed on a sidewall of the MTJ structure. A word line is connected with the MTJ structure, and a bit line is connected with one of top and bottom surfaces of the MTJ structure. A capacitor is connected with one of top and bottom surfaces of the MTJ structure that is not connected with the bit line. Current leakage in the DRAM device is reduced and a unit cells may be vertically stacked on the substrate, so a smaller surface area of the substrate is required for the DRAM device. | 10-09-2008 |
| 20080246078 | Charge trap flash memory device and memory card and system including the same - A charge trap flash memory device and method of making same are provided. The device includes: a tunnel insulating layer, a charge trap layer; a blocking insulating layer; and a gate electrode sequentially formed on a substrate. The charge trap layer includes: plural trap layers comprising a first material having a first band gap energy level; spaced apart nanodots, each nanodot being at least partially surrounded by at least one of the trap layers, wherein the nanodots comprise a second material having a second band gap energy level that is lower than the first band gap energy level; and an intermediate blocking layer comprising a third material having a third band gap energy level that is higher than the first band gap energy level, formed between at least two of the trap layers. This structure prevents loss of charges from the charge trap layer and improves charge storage capacity. | 10-09-2008 |
| 20090239367 | Nonvolatile memory device and method of fabricating the same - A method of fabricating a nonvolatile memory device includes forming a tunnel insulating layer on a semiconductor substrate, forming a charge storage layer on the tunnel insulating layer, forming a dielectric layer on the charge storage layer, the dielectric layer including a first aluminum oxide layer, a silicon oxide layer, and a second aluminum oxide layer sequentially stacked on the charge storage layer, and forming a gate electrode on the dielectric layer, the gate electrode directly contacting the second aluminum oxide layer of the dielectric layer. | 09-24-2009 |
| 20110267903 | SEMICONDUCTOR MEMORY DEVICE HAVING DRAM CELL MODE AND NON-VOLATILE MEMORY CELL MODE AND OPERATION METHOD THEREOF - A semiconductor memory device may have a DRAM cell mode and a non-volatile memory cell mode without a capacitor, including multiple transistors arranged in an array and having floating bodies, word lines connected to gate electrodes of the transistors, bit lines at a first side of the gate electrodes connected to drains of the transistors, source lines at a second side of the gate electrodes, different from the first side, and connected to sources of the transistors on the semiconductor substrate, and charge storage regions between the gate electrodes and the floating bodies. | 11-03-2011 |
Zong-Liang Huo, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20120061752 | SINGLE TRANSISTOR FLOATING-BODY DRAM DEVICES HAVING VERTICAL CHANNEL TRANSISTOR STRUCTURES - Single transistor floating-body DRAM devices have a vertical channel transistor structure. The DRAM devices include a substrate, and first and second floating bodies disposed on the substrate and isolated from each other. A source region and a drain region are disposed under and above each of the first and second floating bodies. A gate electrode is disposed between the first and second floating bodies. Methods of fabricating the single transistor floating-body DRAM devices are also provided. | 03-15-2012 |