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Hung-Pin
Hung-Pin Chang, Taipei County TW
| Patent application number | Description | Published |
|---|---|---|
| 20100244247 | VIA STRUCTURE AND VIA ETCHING PROCESS OF FORMING THE SAME - A via etching process forms a through-substrate via having a round corner and a tapered sidewall profile. A method includes providing a semiconductor substrate; forming a hard mask layer and a patterned photoresist layer on the semiconductor substrate; forming an opening in the hard mask and exposing a portion of the semiconductor substrate; forming a via passing through at least a part of the of semiconductor substrate using the patterned photoresist layer and hard mask layer as a masking element; performing a trimming process to round the top corner of the via; and removing the photoresist layer. | 09-30-2010 |
| 20110241040 | NOVEL SEMICONDUCTOR PACKAGE WITH THROUGH SILICON VIAS - The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns. | 10-06-2011 |
| 20110241061 | HEAT DISSIPATION BY THROUGH SILICON PLUGS - The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip. | 10-06-2011 |
Hung-Pin Chang, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20090008794 | Thickness Indicators for Wafer Thinning - A wafer thinning system and method are disclosed that includes grinding away substrate material from a backside of a semiconductor device. A current change is detected in a grinding device responsive to exposure of a first set of device structures through the substrate material, where the grinding is stopped in response to the detected current change. Polishing repairs the surface and continues to remove an additional amount of the substrate material. Exposure of one or more additional sets of device structures through the substrate material is monitored to determine the additional amount of substrate material to remove, where the additional sets of device structures are located in the semiconductor device at a known depth different than the first set. | 01-08-2009 |
| 20090283871 | System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack - A method of manufacturing a semiconductor substrate structure for use in a semiconductor substrate stack system is presented. The method includes a semiconductor substrate which includes a front-face, a backside, a bulk layer, an interconnect layer that includes a plurality of inter-metal dielectric layers sandwiched between conductive layers, a contact layer that is between the bulk layer and the interconnect layer, and a TSV structure commencing between the bulk layer and the contact layer and terminating at the backside of the substrate. The TSV structure is electrically coupled to the interconnect layer and the TSV structure is electrically coupled to a bonding pad on the backside. | 11-19-2009 |
| 20100140805 | Bump Structure for Stacked Dies - A bump structure that may be used for stacked die configurations is provided. Through-silicon vias are formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-silicon vias. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-silicon vias. The isolation film is thinned to re-expose the through-silicon vias. Bump pads and redistribution lines are formed on the backside of the semiconductor substrate providing an electrical connection to the through-silicon vias. Another isolation film is deposited and patterned, and a barrier layer is formed to provide contact pads for connecting to an external device, e.g., another die/wafer or circuit board. | 06-10-2010 |
| 20100171197 | Isolation Structure for Stacked Dies - An isolation structure for stacked dies is provided. A through-silicon via is formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-silicon via. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-silicon via. The isolation film is thinned to re-expose the through-silicon via, and conductive elements are formed on the through-silicon via. The conductive element may be, for example, a solder ball or a conductive pad. The conductive pad may be formed by depositing a seed layer and an overlying mask layer. The conductive pad is formed on the exposed seed layer. Thereafter, the mask layer and the unused seed layer may be removed. | 07-08-2010 |
| 20110241217 | Multi-Layer Interconnect Structure for Stacked Dies - A multi-layer interconnect structure for stacked die configurations is provided. Through-substrate vias are formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-substrate vias. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-substrate vias. A first conductive element is formed electrically coupled to respective ones of the through-substrate vias and extending over the isolation film. One or more additional layers of isolation films and conductive elements may be formed, with connection elements such as solder balls being electrically coupled to the uppermost conductive elements. | 10-06-2011 |
Hung-Pin Chen, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090240862 | System Design for a Digital Electronic Sign Board - A system design for a digital electronic sign board comprises a main circuit module, an adapter module and a computer module; wherein the adapter module is fixed between the main circuit module and the computer module. The main circuit module and the adapter module are fixed in the digital electronic sign board. The computer module is externally inserted into the digital electronic sign board. Therefore the computer module and the main circuit module are electrically connected through the adapter module. The system design of the present invention removable and attached the computer module with the main circuit module. As a result, when a maintenance worker needs to perform maintenance on the computer module, he or she can conveniently pull out the computer module from the digital electronic sign board and insert the computer module back to the digital electronic sign board after maintenance is done so as to improve the efficiency and quality of maintenance. | 09-24-2009 |
| 20110250414 | TCO COATING WITH A SURFACE PLASMA RESONANCE EFFECT AND MANUFACTURING METHOD THEREOF - A novel TCO coating and its manufacturing method are disclosed. The TCO coating of the present invention consists of titanium oxide, silicon oxide and metal. The TCO coating is manufactured according to electromagnetic field simulation software basing on the Maxwell Equations. Because the manufacturing method (including steam plating and sputter plating) of the present invention may be carried out under the room temperature, base boards that are made of polymer and that can not withstand high temperatures may be used and hence base boards may have wider applications. Also, less time is needed in the production, production cost is lowered and mass-production may be achieved. | 10-13-2011 |
Hung-Pin Chen, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090185345 | Computer Module Replacement of Digital Signage - The invention provides a computer module replacement design of a digital signage. The digital signage has a main circuit board and a plug-board disposed therein and connected to each other. The plug-board has a plug-card with a plug-slot, and a track disposed on each side thereof. The digital signage is covered up by a back cover so that an opening can be formed at one side edge of the digital signage. The computer module has a frame and a motherboard. The frame has a rail disposed on each side thereof and the motherboard has a slot and a connecting terminal disposed thereon. The slot has an interface socket card. The computer module can be placed into the digital signage through the opening with the rail placed into the track. Therefore, the connecting terminal is connected to the plug-slot and the computer module can be drawn out for maintenance. | 07-23-2009 |
| 20090185347 | HEAT DISSIPATION SYSTEM FOR DIGITAL ELECTRONIC SIGNBOARD - A heat dissipation system for digital electronic signboard includes a first heat dissipation subsystem disposed in a main circuit board area of a digital electronic signboard, and a second heat dissipation subsystem disposed in a computer mainboard area of the digital electronic signboard. The main circuit board area has a plurality of heat dissipation fans disposed therein, wherein one heat dissipation fan is disposed at a side of the main circuit board area, while another heat dissipation fan is disposed at a side of a power supply and can be externally connected to an air guide pipe. The computer mainboard area can also have a plurality of heat dissipation fans disposed therein, wherein one heat dissipation fan is disposed at a side of the computer mainboard, while another heat dissipation fan is disposed on the top of a microprocessor of the computer mainboard. | 07-23-2009 |
Hung-Pin Kuo, Sigang Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20100118550 | Rotary-clasp type LED package - A LED lens and a LED package using the LED lens are disclosed. The LED lens includes a holder and a lens. The holder has a frame and a plurality of arms extending from bottoms of the frame. The lens is mounted on the frame of the holder. In particular, the holder is capable of clasping a mounting base of the LED assembly by the arms when the holder is placed upon the LED assembly and rotated with respect to the LED assembly by an angle. | 05-13-2010 |
Hung-Pin Liu, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110304426 | Security recognition system - A security recognition system comprises an electronic card, a card reading module, a biological feature capturing module and a comparison module. The electronic card has a biological feature storage module containing signature data. The card reading module reads a biological feature accessed by the electronic card. The biological feature capturing module captures the biological feature and transmits the feature to the comparison module for comparing. A rear bank mainframe or a credit card center connected to the security recognition module can determine whether a transaction is performed or a credit card is swiped according to the comparison result to enhance the security and anti-counterfeit for the electronic card. | 12-15-2011 |
Hung-Pin Shih, Miaoli County TW
| Patent application number | Description | Published |
|---|---|---|
| 20100225686 | PRINT SIGNAL GENERATION SYSTEM - An embodiment of a print signal generation system is provided. The system comprises a sensor, a divisor processing unit, a reference signal generator, and a print trigger signal generator. The sensor detects a first offset of a first location of a medium being printed. The divisor processing unit generates a first divisor according to the first offset and a predetermined divisor. The reference signal generator generates a reference signal. The print trigger signal generator generates a print trigger signal according to the first divisor and the reference signal. | 09-09-2010 |
Hung-Pin Yang, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090317033 | INTEGRATED CIRCUIT AND PHOTONIC BOARD THEREOF - An integrated circuit (IC) including at least a first and a second logical blocks and a photonic board is provided. The photonic board connects with the first and the second logical blocks through a eutectic bonding technology, and communicates at least a logical signal of the first logical block to the second logical block by light conduction. | 12-24-2009 |