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Hung, Kaohsiung
Chang-Ning Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20090309542 | Multi-input charger - A charger has a converter, a cigarette lighter adapter and a charger plug. The converter converts AC power to DC power and regulates a voltage range of the DC power to an appropriate range for charging portable electronic devices such as cell and smart phones and the like and has an output port and a plug. The cigarette lighter adapter has a cord extending from the cigarette lighter adapter and being electrically connected to the converter. The charger plug is detachably connected to the converter and has a cord extending from the charger plug and a connector being formed on the cord, corresponding to and being selectively mounted in the output port or in a socket of a computer. Therefore, a user can charge portable electronic devices in an automobile, electric socket or computer without carrying different chargers. | 12-17-2009 |
Chang Ying Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20100007004 | WAFER AND SEMICONDUCTOR PACKAGE - A wafer defines a plurality of chips arranged in array manner. Each chip includes at least one aluminum pad and a middle material. The middle material covers the aluminum pad and is mounted on the aluminum pad. | 01-14-2010 |
| 20100007009 | SEMICONDUCTOR PACKAGE AND METHOD FOR PROCESSING AND BONDING A WIRE - A copper bonding wire includes a line portion and a non-spherical block portion. The non-spherical block portion is physically connected to the line portion, and the cross-sectional area of the non-spherical block portion is bigger than that of the line portion. | 01-14-2010 |
| 20100007010 | SEMICONDUCTOR PACKAGE, METHOD FOR ENHANCING THE BOND OF A BONDING WIRE, AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE - A wire bonding structure of a semiconductor package includes a bonding wire, a pad and a non-conductive adhesive material. The bonding wire includes a line portion and a block portion, wherein the block portion is physically connected to the line portion, and the sectional area of the block portion is bigger than that of the line portion. The pad is bonded to the block portion. The non-conductive adhesive material covers the pad and seals the whole block portion of the bonding wire. | 01-14-2010 |
| 20100007011 | SEMICONDUCTOR PACKAGE AND METHOD FOR PACKAGING A SEMICONDUCTOR PACKAGE - A wire bonding structure includes a chip and a bonding wire. The chip includes a base material, at least one first metallic pad, a re-distribution layer and at least one second metallic pad. The first metallic pad is disposed on the base material. The re-distribution layer has a first end and a second end, and the first end is electrically connected to the first metallic pad. The second metallic pad is electrically connected to the second end of the re-distribution layer. The bonding wire is bonded to the second metallic pad. | 01-14-2010 |
Cheng-Hui Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20100230760 | Silicon Wafer Having Interconnection Metal - The present invention relates to a silicon wafer having interconnection metal. The silicon wafer includes a silicon substrate, at least one electrical device, a barrier layer, a metal layer, at least one first interconnection metal and at least one second interconnection metal. The electrical device is disposed in the silicon substrate, and exposed to a first surface of the silicon substrate. The barrier layer is disposed on the first surface of the silicon substrate. The metal layer is disposed on a surface of the barrier layer. The first interconnection metal penetrates the barrier layer, and is disposed on the electrical device. The first interconnection metal connects the metal layer and the electrical device. The second interconnection metal penetrates the barrier layer, and is disposed at a corresponding position on the outside of the electrical device. The second interconnection metal connects the metal layer. Thus, after a silicon through via is formed, the silicon through via is connected to the metal layer by the second interconnection metal, so the yield rate is raised. | 09-16-2010 |
Chia-Lin Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110300669 | Method for Making Die Assemblies - The present invention relates to a method for making chip assemblies, including the following steps of: (a) providing a tested upper wafer and at least one tested lower wafer; (b) sawing the at least one tested lower wafer to form a plurality of lower dice, the lower dice including a plurality of know good lower dice; (c) picking up and rearranging the know good lower dice on a carrier according to the wafer map of the upper wafer; (d) bonding the upper wafer and the carrier; (e) removing the carrier; and (f) proceeding sawing step. Whereby, the dice of the die assembly are both known good dice, thus the yield loss caused by the different yields between the upper wafer and the lower wafer will not occur. | 12-08-2011 |
Chih-Hsin Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110217268 | THERAPY OR PROPHYLAXIS OF KLEBSIELLA PNEUMONIAE INFECTIONS WITH A LYTIC BACTERIOPHAGE SPECIFICALLY AGAINST THE K. PNEUMONIAE - A therapy or prophylaxis of | 09-08-2011 |
| 20110217756 | NEWLY ISOLATED BACTERIOPHAGE SPECIFIC TO KLEBSIELLA PNEUMONIAE - A newly isolated lytic bacteriophage specifically against | 09-08-2011 |
Chih-Pin Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20090256244 | SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING - Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of an internal grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield. | 10-15-2009 |
| 20100207259 | SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING - Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes a grounding element disposed adjacent to a periphery of a substrate unit and at least partially extending between an upper surface and a lower surface of the substrate unit. The grounding element includes an indented portion that is disposed adjacent to a lateral surface of the substrate unit. The semiconductor device package also includes an EMI shield that is electrically connected to the grounding element and is inwardly recessed adjacent to the indented portion of the grounding element. | 08-19-2010 |
| 20110260301 | SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING - Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of an internal grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield. | 10-27-2011 |
Ching-Sheng Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20120086379 | ROTATION DIRECTION CONTROL METHOD FOR A COOLING FAN AND ROTATION DIRECTION CONTROL CIRCUIT THEREOF - A rotation direction control method of a cooling fan is disclosed. The rotation direction control method includes a detection step, a determination step and a driving step. The detection step receives a temperature control signal from a temperature detection unit by a rotation direction control unit when a predetermined dust-expelling time period begins. The determination step determines whether a detected temperature is higher than a predetermined value based on the temperature control signal by the rotation direction control unit. The driving step controls the rotation direction control unit to keep outputting a cooling signal so as to drive a motor of the cooling fan for a cooling operation when the determination of the determination step is positive. | 04-12-2012 |
Chun-Cheng Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20100313791 | CALCIUM PHOSPHATE BONE CEMENT, PRECURSOR THEREOF AND FABRICATION METHOD THEREOF - The invention provides a calcium phosphate bone cement, a precursor and a fabrication method thereof. The fabrication method comprises: (a) dissolving a calcium phosphate with a low Ca/P atomic ratio in an acid solution, wherein the Ca/P atomic ratio is less than 1.33; (b) adding a calcium phosphate compound into the acid solution to obtain a reaction solution; (c) allowing the reaction solution to stand to grow nanocrystallites on surfaces of the calcium phosphate with low Ca/P atomic ratio; (d) filtering and drying the solution of step (c) to obtain a calcium phosphate powder with low Ca/P atomic ratio having nanocrystallites on the surface; and (e) mixing the powder of step (d) and a calcium phosphate powder with a high Ca/P atomic ratio. | 12-16-2010 |
Guo-Zhi Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20120007788 | ANTENNA MODULE - An antenna module is provided. The antenna module is disposed in an electronic device. The antenna module includes an antenna, a signal processing unit, a first differential mode transformer, a first coaxial cable, and a second coaxial cable. The differential mode transformer is electrically connected between the antenna and the signal processing unit. The first coaxial cable includes first conductive core and first tubular conductor which encompasses the first conductive core. The signals received by the antenna are fed into first end of the first conductive core, and second end of the first conductive core is coupled to the differential mode transformer. The first tubular conductor is grounded. The second coaxial cable includes a second conductive core and a second tubular conductor which encompasses the second conductive core. A second end of the second conductive core is connected to the differential mode transformer. The second tubular conductor is grounded. | 01-12-2012 |
Huang-Chiang Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20090309542 | Multi-input charger - A charger has a converter, a cigarette lighter adapter and a charger plug. The converter converts AC power to DC power and regulates a voltage range of the DC power to an appropriate range for charging portable electronic devices such as cell and smart phones and the like and has an output port and a plug. The cigarette lighter adapter has a cord extending from the cigarette lighter adapter and being electrically connected to the converter. The charger plug is detachably connected to the converter and has a cord extending from the charger plug and a connector being formed on the cord, corresponding to and being selectively mounted in the output port or in a socket of a computer. Therefore, a user can charge portable electronic devices in an automobile, electric socket or computer without carrying different chargers. | 12-17-2009 |
Kun-Ting Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20100176516 | Substrate having optional circuits and structure of flip chip bonding - The present invention relates to a substrate having optional circuits and a structure of flip chip bonding. The substrate includes a substrate body, at least one substrate pad, a first conductive trace and a second conductive trace. The substrate body has a surface. The substrate pad is disposed on the surface of the substrate body. The first conductive trace is connected to a first circuit, and has a first breaking area so it forms a discontinuous line. The second conductive trace is connected to a second circuit, and has a second breaking area so tit forms a discontinuous line. The second conductive trace and the first conductive trace are connected to the same substrate pad. Thus, the substrate can choose to connect different circuits, so the substrate can be applied to different products by connecting the desired circuit, thus reducing the manufacturing cost. | 07-15-2010 |
Kuo-Chen Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110189480 | Magnesium Fastener Manufacturing Method and A Magnesium Fastener Member Produced Thereby - A magnesium fastener manufacturing method includes the steps of: using a magnesium or a magnesium alloy to form a magnesium wire or a magnesium rod; processing cold forging, warm forging or hot forging the magnesium wire or the magnesium rod to form a magnesium fastener member. When processing warm or hot forging, a directly heating treatment, a thermal isolating and directly heating treatment, or a directly heating and thermal isolating treatment is selectively applied to heat the magnesium wire or a magnesium rod to a predetermined temperature. | 08-04-2011 |
Sung-Ching Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110193209 | SEMICONDUCTOR PACKAGE - The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced. | 08-11-2011 |
Tzu-Ching Hung, Kaohsiung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110111191 | LOW THERMAL-IMPEDANCE INSULATED METAL SUBSTRATE AND METHOD FOR MAUFACTURING THE SAME - A method for manufacturing a low thermal-impedance insulated metal substrate has steps of providing an electrical-conductive metal layer; forming a first thermal-conductive polymeric composite layer on the electrical-conductive metal layer; forming a second thermal-conductive polymeric composite layer on the first thermal-conductive polymeric composite layer; and adhere a thermal-conductive metal layer on the second thermal-conductive polymeric composite layer by hot-pressing process. Therefore, the low thermal-impedance insulated metal substrate of the present invention has lower thermal-impedance, lower coefficient of thermal expansion and higher electrical reliability. | 05-12-2011 |
