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Hung, Hsinchu
Che-Lun Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20120074401 | TEST PATTERN FOR DETECTING PIPING IN A MEMORY ARRAY - A method of detecting manufacturing defects at a memory array may include disposing an active area of a first width in communication with a first conductive member of the memory array to define a grounded conductive member, disposing an isolation structure of a second width in communication with a second conductive member of the memory array to define a floating conductive member, and providing an alternating arrangement of floating and grounded conductive members including arranging a plurality of the grounded and floating conductive members adjacent to each other to define a sequence of alternating floating and grounded conductive members. A corresponding test device is also provided. | 03-29-2012 |
Cheng-Chou Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110068415 | Radio Frequency Device and Method for Fabricating the Same - A radio frequency (RF) device that can achieve high frequency response while maintaining high output impedance and high breakdown voltage includes a substrate, a gate, at least a dummy gate, at least a doped region, a source region and a drain region. The substrate includes a well of first type and a well of second type. The well of second type is adjacent to the well of first type. | 03-24-2011 |
Cheng-Hsien Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080205178 | DRAM writing ahead of sensing scheme - This invention discloses a write-sensing circuit for a semiconductor memory having at least one memory block with a continuous word-line being coupled to all the memory cells in a column of the memory block and a continuous bit-line being coupled to all the memory cells in a row of the memory block, the write-sensing circuit comprising a first and a second sense amplifier belonging to the same memory block, a first switching device coupled between the first sense amplifier and a first power supply, the first switching device being controlled by a first signal, and a second switching device coupled between the second sense amplifier and the first power supply, the second switching device being controlled by a second signal different from the first signal, wherein when the first sense amplifier is activated, the second sense amplifier can remain de-activated. | 08-28-2008 |
Chen-Ming Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110037399 | DIMMER CIRCUIT OF LIGHT EMITTING DIODE AND ISOLATED VOLTAGE GENERATOR AND DIMMER METHOD THEREOF - An isolated configuration dimmer circuit of a light emitting diode (LED) applied to a conventional triac dimmer and a dimmer method are provided. When a dimmer phase angle of the triac dimmer is regulated, a second side winding of a transformer of the isolated configuration produces a pulse width corresponding to a modulated alternating current (AC) voltage, so as to regulate the pulse width of a driving signal output by the second side winding of the transformer. In addition, the dimmer circuit regulates the magnitude of a current flowing through the light emitting diode (LED) according to the pulse width corresponding to the modulated AC voltage. Accordingly, the dimmer circuit regulates the pulse width and the magnitude of the current flowing through the LED according to the dimmer phase angle of the triac dimmer. Therefore, a dimmer range of the LED can be increased. | 02-17-2011 |
Che-Pin Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090185395 | BACK-LIGHT MODULE - A back-light module includes a light-guiding plate and a light source. The light-guiding plate has a lateral inlet surface. The light source is arranged at one side of the lateral inlet surface. The light source has a plurality of light-emitting diodes which are disposed in a line and at interval. A gap is formed between the adjacent light-emitting diodes. The lateral inlet surface dispose a plurality of convex lenses, each of the convex lenses has a convex surface facing to the corresponding gap between the adjacent light-emitting diodes. | 07-23-2009 |
Chia-Chien Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090277480 | METHOD OF REDUCING SURFACE RESIDUAL DEFECT - A method of reducing residual defect on a dielectric surface includes performing a treatment process of the dielectric surface prior to a lithograph process. The treatment process includes at least a first wet chemical treatment step and a second wet chemical treatment step. | 11-12-2009 |
Chia-Hung Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080280384 | SOLID-STATE LIGHT EMITTING DISPLAY AND FABRICATION METHOD THEREOF - A solid-state light emitting display and a fabrication method thereof are proposed. The light emitting display includes a metallic board formed with conductive circuits, and a plurality of luminous microcrystals disposed on a surface of the metallic board and electrically connected to the conductive circuits. The metallic board provides the features of lightness and thinness, and flexibility, and the luminous microcrystals are in the form of light emitting components, so as to improve the luminous efficiency of display and attain the effect of environmental protection and energy saving, thereby providing display technology with performance satisfactory for various display requirements. | 11-13-2008 |
Chia-Lung Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080290375 | INTEGRATED CIRCUIT FOR VARIOUS PACKAGING MODES - The present invention provides an integrated circuit suitable for various packaging modes. This integrated circuit includes: a core circuit, a plurality of pads, and a selection circuit. The selection circuit is coupled between the core circuit and the pads for determining the connection state between the core circuit and the pads based on a control signal. When the control signal provides a first value, the core circuit and the pads will be in a first connection state, and the integrated circuit will be applied with a single-die package. However, when the control signal provides a second value, the core circuit and the pads will be in the second connection state, and the integrated circuit will be applied with a multi-die package. | 11-27-2008 |
| 20100188574 | DEVICE AND METHOD FOR CONTROLLING FRAME INPUT AND OUTPUT - A device and method for controlling frame input and output are applied to the reception of image data from a source device and output of the image data to a destination device, the device includes a buffer, a buffer control circuit, and a frame write controller. The input pixel clock is not equal to the output pixel clock. The frame write controller generates a write permission signal according to the Input DE and the Output DE. The buffer control circuit generates a write control signal according to the Input DE and the write permission signal, and generates a read control signal according to the Output DE. The buffer receives the image data from the source device according to the write control signal and the input pixel clock, and outputs the image data to the destination device according to the read control signal and the output pixel clock. | 07-29-2010 |
Chia-Yu Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080272480 | Land grid array semiconductor package - An LGA (Land Grid Array) semiconductor package mainly comprises a substrate, a chip, a soldering layer and a foot stand. The chip is disposed on a top surface of the substrate and is electrically connected to a plurality of metal pads formed on a bottom surface of the substrate. The soldering layer is disposed on the metal pads with a first thickness slightly protruded from the bottom surface of the substrate. Additionally, the foot stand is disposed under the substrate with a second thickness protruded from the bottom surface of the substrate, wherein the second thickness is greater than the first thickness. Therefore, the soldering layer of the LGA semiconductor package is free from scratches and damages during shipping and handling processes. Moreover, the LGA semiconductor package can be surface-mounted to a printed circuit board with pre-applied solder or pre-mounted solder balls to increase the implementations of LGA semiconductor packages. | 11-06-2008 |
Chi-Chang Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080304484 | METHOD FOR OPERATING MULTIPOINT CONTROL SYSTEM - The present invention provides method for operating a multipoint control system. It utilizes start packets pass through every one of controlled units which could be modified and transmitted to the next stage to achieve addressing for all of the system. The method comprises providing the multipoint control system, wherein the multipoint control system includes a plurality of controlled units serially connected, each of the controlled units has a execution unit and an interpretive unit, each of the interpretive unit has a data processing unit and a memory unit; transmitting an information stream by a controller, wherein the information stream includes a first start packet and a plurality of first data packets, the first start packet includes a first leading message, a first address, and a first length message; modifying the first address by each of the data processing units included in each of the interpretive units according to the first leading message and transmitting to the next stage; retrieving the first data packet corresponding to the first address by each of the interpretive units according to the first address, the first length message; and enabling each of the execution units included in each of the interpretive units according to content of each of the first data packets. | 12-11-2008 |
Chien-Chung Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090003043 | Method for switching magnetic moment in magnetoresistive random access memory with low current - A method for writing a memory cell of a magnetoresistive random access memory (MRAM) device includes, sequentially, providing a first magnetic field in a first direction, providing a second magnetic field in a second direction substantially perpendicular to the first direction, turning off the first magnetic field, providing a third magnetic field in a third direction opposite to the first direction, turning off the second magnetic field, and turning off the third magnetic field. A method for switching magnetic moments in an MRAM memory cell includes providing a magnetic field in a direction forming a blunt angle with a direction of a bias magnetic field. A method for reading an MRAM device includes partially switching magnetic moments in a reference memory cell to generate a reference current; measuring a read current through a memory cell to be read; and comparing the read current with the reference current. | 01-01-2009 |
| 20090010087 | DATA WRITE IN CONTROL CIRCUIT FOR TOGGLE MAGNETIC RANDOM ACCESS MEMORY - A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in. | 01-08-2009 |
Chih-Hung Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100059718 | Fabrication of carbon nanotubes reinforced polymer composite bipolar plates for fuel cell - A composite bipolar plate for a polymer electrolyte membrane fuel cell (PEMFC) is prepared as follows: a) compounding vinyl ester and graphite powder to form bulk molding compound (BMC) material, the graphite powder content ranging from 60 wt % to 95 wt % based on the total weight of the graphite powder and vinyl ester, wherein carbon nanotubes together with a polyether amine dispersant or modified carbon nanotubes 0.05-10 wt %, based on the weight of the vinyl ester resin, are added during the compounding; b) molding the BMC material from step a) to form a bipolar plates having a desired shaped at 80-200° C. and 500-4000 psi. | 03-11-2010 |
Ching-Wei Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090230543 | Semiconductor package structure with heat sink - A semiconductor package structure with a heat sink is disclosed herein. The semiconductor package structure includes a substrate having a chip mounting area and a plurality of through holes surrounding the chip mounting area; a chip set on the chip mounting area and electrically connected to the substrate; a heat sink covering the chip, wherein the heat sink has a plurality of support portions extending from the upper surface to the lower surface of the substrate via those through holes; and a molding compound covering the chip, a portion of the substrate and the heat sink. Those support portions of the heat sink are utilized to improve the heat dissipation efficiency and the warpage issue of the package. | 09-17-2009 |
| 20090236739 | SEMICONDUCTOR PACKAGE HAVING SUBSTRATE ID CODE AND ITS FABRICATING METHOD - A semiconductor package with a substrate ID code and its manufacturing method are revealed. A circuit and a solder mask are formed on the bottom surface of a substrate where the solder mask covers most of the circuit and a circuit-free zone of the substrate. A chip is disposed on the top surface of the substrate. A substrate ID code consisting of a plurality of laser marks is inscribed in the solder mask or in a portion of an encapsulant on the bottom surface away from the circuit to show the substrate lot number on the bottom surface. Therefore, quality control and failure tracking and management can easily be implemented by tracking the substrate ID code from the semiconductor package without changing the appearance of the semiconductor package. Furthermore, the substrate ID code can be implemented by the existing laser imprinting machines for semiconductor packaging processes and be formed at the same time of formation of a product code. The complexity of the semiconductor packaging processes is not increased and the circuits of the substrates are not easily damaged. | 09-24-2009 |
| 20110062577 | SUBSTRATE AND PACKAGE WITH MICRO BGA CONFIGURATION - A substrate of a micro-BGA package is revealed, primarily comprising a substrate core, a first trace, and a second trace where the substrate core has a slot formed between a first board part and a second board part. The first trace is disposed on the first board part and has a suspended inner lead extended into the slot where the inner lead has an assumed broken point. The second trace is disposed on the second board part and is integrally connected to the inner lead at the assumed broken point. More particularly, a non-circular through hole is formed at the assumed broken point and has two symmetric V-notches away from each other and facing toward two opposing external sides of the inner lead so that the inner lead at two opposing external sides does not have the conventional V-notches cutting into the inner lead from outside. Moreover, the inner lead will not unexpectedly be broken and the inner lead can easily and accurately be broken at the assumed broken point during thermal compression processes. | 03-17-2011 |
Chung-Chih Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110175763 | DIGITAL-TO-ANALOG CONVERTER - The present invention relates to a digital-to-analog converter comprising a differentiation circuit, a conversion circuit, and an integration circuit. The differentiation circuit receives and differentiates a digital signal for producing a differentiation signal. The conversion circuit is coupled to the differentiation circuit. It receives the differentiation signal and produces a conversion signal according to a clock signal and the differentiation signal. The integration circuit is coupled to the conversion circuit. It receives and integrates the conversion signal for producing an analog signal. Thereby, the purpose of reducing distortion noises can be achieved. | 07-21-2011 |
Chung-Hsiung Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110173512 | MEMORY AND METHOD FOR CHECKING READING ERRORS THEREOF - A method for checking reading errors of a memory includes the following steps. A first data fragment is received. A first count index according to the first data fragment is generated, wherein the first count index is corresponding to a quantity of one kind of binary value in the first data fragment. The first data fragment is written into the memory. The first data fragment is read from the memory as a second data fragment. A second count index is generated according to the second data fragment. The first count index is compared with the second count index. | 07-14-2011 |
Chung Pei Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110016047 | FINANCIAL TRANSACTION SYSTEM, AUTOMATED TELLER MACHINE (ATM), AND METHOD FOR OPERATING AN ATM - A financial transaction system is provided. The financial transaction system includes a server and at least one automated teller machine (ATM). In response to a request from a user, the server issues a one-time password (OTP) to the user's mobile device. The ATM receives an OTP from the user and sends the received OTP to the server for verification, in order to perform a financial transaction operation. | 01-20-2011 |
| 20110149533 | INTEGRATED CIRCUIT FILM FOR SMART CARD - An integrated circuit (IC) film for a smart card is provided. The IC film includes a flexible printed circuit (FPC) board, first electrical contacts, second electrical contacts, and an IC chip. The first electrical contacts are disposed on a first side of the FPC board, and the second electrical contacts are disposed on a second side of the FPC board. The IC chip is disposed on the FPC board and bonded to the leads of the FPC board to thereby form electrical connection. The total thickness of the FPC board and the chip is not larger than 0.5 mm. | 06-23-2011 |
I-Peng Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090002989 | INTEGRALLY FORMED REFLECTOR STRUCTURE, BACKLIGHT MODULE USING THE SAME REFLECTOR STRUCTURE AND METHOD FOR ASSEMBLING THE SAME BACKLIGHT MODULE - The present invention discloses an integrally formed reflector structure, a backlight module using the same reflector structure and a method for assembling the same module. An accommodation spacer and a plurality of lamp-support members are formed on a reflector baseplate with a vacuum-forming method, and a plurality of extension portions extend from the edges of the accommodation space. Further, pluralities of support pins, reflecting members, lamp-fixing members, positioning members, bent portions, etc. are formed in the appropriate positions of the reflector baseplate or the extension portions with a vacuum-forming method. Besides, the extension portions are bent from the bent portions to form a plurality of grooves, which are used to secure optical films in cooperation with the positioning members. | 01-01-2009 |
Jui-Pin Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080295412 | APPARATUS FOR STORING SUBSTRATES - An apparatus includes an enclosure and a door configured to seal the enclosure. The door includes a plate. A rotational apparatus is disposed over the plate. At least one first member with a first arm extends from a first rib of the first member. At least one second member with a second arm extends from a second rib of the second member. The first and second arms are connected to the rotational apparatus. At least one corner member has a first edge. The first edge has a shape corresponding to a shape of a corner of the frame. The corner member is connected to a first end of the third arm. A second end of the third arm is connected to the rotational apparatus. A sealing material is disposed along a first longitudinal side of the first rib and a second longitudinal side of the second rib. | 12-04-2008 |
| 20080298933 | SUBSTRATE CARRIER, PORT APPARATUS AND FACILITY INTERFACE AND APPARATUS INCLUDING SAME - An apparatus includes a first enclosure, a first door, at least one first valve, at least one inlet diffuser and at least one substrate holder. The first enclosure has a first opening. The first door is configured to seal the first opening. The first valve is coupled to the first enclosure. The inlet diffuser is coupled to the first valve and configured to provide a first gas with a temperature substantially higher than a temperature of an environment around the first enclosure. Each substrate holder disposed within the first enclosure supports at least one substrate. | 12-04-2008 |
| 20090142903 | CHIP ON WAFER BONDER - The present disclosure provides a bonding apparatus. The bonding apparatus includes a cleaning module designed for cleaning chips; and a chip-to-wafer bonding chamber configured to receive the chips from the cleaning module and designed for bonding the chips to a wafer. | 06-04-2009 |
| 20090317214 | NOVEL WAFER'S AMBIANCE CONTROL - A semiconductor manufacturing system, an interface system, a carrier, and a method for providing an ambient controlled environment is disclosed. The semiconductor manufacturing system comprises a plurality of process chambers; at least one interface system, wherein the interface system includes a first ambient control element; at least one carrier, wherein the carrier comprises a second ambient control element; and a control module coupled to the plurality of process chambers, the at least one interface system, and the at least one carrier. | 12-24-2009 |
| 20110241040 | NOVEL SEMICONDUCTOR PACKAGE WITH THROUGH SILICON VIAS - The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns. | 10-06-2011 |
| 20110241061 | HEAT DISSIPATION BY THROUGH SILICON PLUGS - The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip. | 10-06-2011 |
Jui-Ping Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20120068218 | THERMALLY EFFICIENT PACKAGING FOR A PHOTONIC DEVICE - The present disclosure provides a method of packaging for a photonic device, such as a light-emitting diode device. The packaging includes an insulating structure. The packaging includes first and second conductive structures that each extend through the insulating structure. A substantial area of a bottom surface of the light-emitting diode device is in direct contact with a top surface of the first conductive structure. A top surface of the light-emitting diode device is bonded to the second conductive structure through a bonding wire. | 03-22-2012 |
Jui-Yi Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090209756 | Emissive transition-metal complexes with both carbon-phosphorus ancillary and chromophoric chelates, synthetic method of preparing the same and phosphorescent organic light emitting diode thereof - The present invention discloses a phosphorescent tris-chelated transition metal complex comprising i) two identical carbon-nitrogen (ĈN) or nitrogen-nitrogen (N̂N) chromophoric ligands being incorporated into a coordination sphere thereof with a transition metal, and one carbon-phosphorus (ĈP) chelate being incorporated into the coordination sphere; or ii) one carbon-nitrogen (ĈN) or nitrogen-nitrogen (N̂N) chromophoric ligand forming a coordination sphere thereof with a transition metal, and two identical carbon-phosphorus (ĈP) chelates being incorporated into the coordination sphere, wherein the metal is iridium, platinum, osmium or ruthenium, and the chromophoric ligands possess a relatively lower energy gap in comparison with that of the non-chromophoric chelate, the latter afforded an effective barrier for inhibiting the ligand-to-ligand charge transfer process, so that bright phosphorescence can be observed. The architecture and energy gap of the present molecular designs are suitable for generation of high efficiency blue, green and even red emissions. | 08-20-2009 |
| 20110204770 | Phosphorescent transition metal complex having a facially arranged carbon-phosphorus-carbon (C+e,cir +0 +ee P+e,cir +0 +ee C) tridentate chelate and organic light emitting diode containing the same - The present invention provides a series of phosphorescent transition metal complexes having a facially arranged, carbon-phosphorus-carbon (ĈP̂C) tridentate chelate, alone with one monoanionic bidentate chromophoric chelate (either ĈN or ÂN) and one arbitrary charge neutral chelate (L), or with one charge neutral bidentate chromophoric chelate (N̂N) and one arbitrary anionic ligand (X); all of them can be used to generate high efficiency photo-induced phosphorescence at room temperature, as well as bright electroluminescence upon employment of these materials in the fabrication of organic light-emitting devices. | 08-25-2011 |
Ju-Pin Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110081749 | SURFACE MODIFICATION FOR HANDLING WAFER THINNING PROCESS - A wafer is provided with a through via extending a portion of a substrate, an interconnect structure electrically connecting the through via, and a polyimide layer formed on the interconnect structure. Surface modification of the polyimide layer is the formation of a thin dielectric film on the polyimide layer by coating, plasma treatment, chemical treatment, or deposition methods. The thin dielectric film is adhered strongly to the polyimide layer, which can reduce the adhesion between the wafer surface and an adhesive layer formed in subsequent carrier attaching process. | 04-07-2011 |
Kun-Chien Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090067517 | Preamble sequence detection and integral carrier frequency offset estimation method for OFDM/OFDMA wireless communication system - In multi-cell OFDM/OFDMA wireless communication systems, any subscriber station (SS) or mobile station (MS) that intends to enter the system needs to establish time and frequency synchronization with the base station (BS) and obtain the identification code of the BS, where in frequency synchronization one usually needs to estimate the fractional carrier frequency offset (CFO) and the integral CFO. (“Fractional” and “integral” refer to, respectively, the fractional and the integral parts of the ratio of the CFO to subcarrier spacing.) The present invention assumes that the SS or MS first does timing and fractional CFO synchronization and then conducts integral CFO estimation and BS identity detection. The present invention considers integral CFO estimation and BS identity detection jointly, i.e., it proposes solutions that address these topics jointly. The present invention formulates the problem as a signal detection problem in multi-channel interference and obtains the theoretically optimal solution first, and then derives simplified, approximately optimal solutions, in which the present invention employs frequency-domain filtering to calculate the required correlation values which can drastically reduce the high computational complexity of the original theoretically optimal solution but results in little impact on precision. In addition, the present invention proposes several further simplified algorithms, some of which can even eliminate the use of multipliers. The above proposition of frequency-domain filtering has high extensibility in application to related signal sequence detection problems. | 03-12-2009 |
| 20090232230 | METHOD FOR OFDM AND OFDMA CHANNEL ESTIMATION - This invention discloses a method for OFDM and OFDMA channel estimation via phase-rotated polynomial interpolation and extrapolation (inter/extra-polation). For complexity reason, polynomial inter/extra-polation is an often considered method for channel estimation in orthogonal frequency-division multiplexing (OFDM) and orthogonal frequency-division multiple access (OFDMA) systems, in which the simplest choice is linear inter/extra-polation. But the performance of this method depends on the accuracy of symbol timing estimation as well as the channel delay spread. The invention mitigates the problem by adding a linear phase factor to polynomial inter/extra-polation, which corresponds to adding a delay (also called delay shift) in the time domain. | 09-17-2009 |
Kuo-Chung Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100232079 | SMALL AREA IO CIRCUIT - A small area IO circuit is provided. The IO circuit has one or more parallel circuit unit(s) and an ESD protector set between a core circuit/pre-driver and an IO pad. Each circuit unit includes an off-chip driver and an output resistor, wherein the ESD protector protects ESD event occurred at the IO pad, and the resistor in each circuit unit acts as an ESD block circuit to block ESD current from corresponding off-chip driver. Therefore, transistors in each off-chip driver do not have to be restricted by strict ESD design rules, such that at least a transistor of the off-chip driver(s) is implemented in a single finger layout to lower equivalent capacitance of the off-chip driver(s), and layout areas of the off-chip driver(s) as well as the whole IO circuit can be reduced to achieve a small area IO circuit. | 09-16-2010 |
Kuo-Shu Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100139898 | PRESSURE-ADJUSTABLE MULTI-TUBE SPRAYING DEVICE - A multi-tube spraying device is provided. The multi-tube spraying device includes a body having a closed vessel, wherein a plurality of spraying tubes are disposed in the upper part of the closed vessel and a plurality of heat exchanging tubes are disposed in the lower part of the closed vessel. The device further includes an outlet pipe for discharging refrigerant vapor contained therein and a connecting pipe for introducing the refrigerant vapor from a source to the vessel. In addition, a liquid-vapor separator connected to the refrigerant source separates the refrigerant into vapor and liquid for introducing the liquid refrigerant to the spraying tubes in the vessel while introducing the refrigerant vapor into the vessel. Therefore, a heat exchange is performed between the refrigerant and the heat exchanging tubes. | 06-10-2010 |
Kuo-Tai Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100261086 | Fuel Cell System and Power Management Method thereof - A fuel cell system and a power management method thereof are provided. The fuel cell system includes a fuel cell power generation part, a switch circuit, a load supply circuit, a status detector, an electronic load circuit, and a control circuit. An input terminal and an output terminal of the switch circuit are respectively coupled to the power generation part and the load supply circuit. The status detector is coupled to a node between the power generation part and the input terminal to detect an output voltage of the power generation part. The electronic load circuit is coupled to a node between the power generation part and the input terminal to perform a current-sinking operation. The control circuit is for generating a first and a second control signals respectively for switching the on-off states of the switch circuit and controlling the current-sinking value of the electronic load circuit. | 10-14-2010 |
Lee Cheng Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080258813 | Sense Amplifiers Operated Under Hamming Distance Methodology - A semiconductor device includes a first sense amplifier coupled to an input for generating a first output; a second sense amplifier couple to the input for generating a second output; and a third sense amplifier coupled to the input for generating a third output, wherein a fourth output amplifying the input is generated based on combinations of logic states of the first, second and third outputs. | 10-23-2008 |
| 20100271898 | ACCESS TO MULTI-PORT DEVICES - Mechanisms for improving static noise margin and/or reducing misread current in multi-port devices are disclosed. In some embodiments related to dual port SRAM a suppress device (e.g., transistor) is provided at each word line port. When both ports are activated, both suppress devices are on and lower the voltage level of these ports, which in turn lower the voltage level at the node storing the data for the memory. As the voltage level at the data node is lowered, noise margin is improved and read disturb can be avoided. | 10-28-2010 |
| 20110194362 | WORD-LINE DRIVER USING LEVEL SHIFTER AT LOCAL CONTROL CIRCUIT - A representative circuit device includes a local control circuit having a level shifter, wherein in response to receipt of a first address signal the level shifter shifts the first address signal from a first voltage level to a second voltage level, providing a level shifted first address signal; and a word-line driver having at least one input for receiving a plurality of address signals, wherein the at least one input includes a first input that is coupled to the local control circuit to receive the level shifted first address signal, and an output that is electrically coupled to a word line of a memory cell array. | 08-11-2011 |
Lei-Ken Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100327769 | Light plate - A light plate includes a light guide plate and four light source modules. The light source modules are disposed around the light guide plate. Each of the light source modules includes a first white light emitting element and a second white light emitting element. The first white light emitting element is capable of emitting a first white beam. The second white light emitting element disposed beside the first white light emitting element is capable of emitting a second white beam. The first white light emitting elements of the light source modules are mirror-symmetrical with respect to a first reference plane and a second reference plane. The second white light emitting elements of the light source modules are mirror-symmetrical with respect to the first reference plane and the second reference plane. The correlated colour temperature (CCT) of the first white beam is greater than the CCT of the second white beam. | 12-30-2010 |
Ming-Che Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090169188 | Apparatus and method for fan auto-detection - An apparatus for detecting a type of fan and controlling the fan, the fan providing during operation a tachometer signal indicating a speed of the fan, the apparatus includes: a direct current (DC) generator for coupling to the fan and configured to provide a first voltage to the fan; a resistor for providing, while the DC generator provides the first voltage, a sensed voltage relating to the type of the fan, wherein the resistor is connected to a reference voltage and for coupling to a pulse-width modulation (PWM) control terminal of the fan; an input judgment component coupled to the resistor to receive the sensed voltage, the input judgment component being configured to determine whether the fan is a 4-wire PWM fan with an internal pull-up resistor based on the sensed voltage and to provide a judgment signal indicating the determination; a PWM generator coupled to the input judgment component to receive the judgment signal, the PWM generator being configured to provide to the fan a PWM control signal to control the fan if the judgment signal indicates that the fan is the 4-wire PWM fan with an internal pull-up resistor; and a tachometer coupled to the DC generator and the PWM generator, the tachometer being configured to receive the tachometer signal to detect a change in the speed of the fan. | 07-02-2009 |
Ming-Chi Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090213050 | IMAGE OVER-DRIVING DEVICES AND IMAGE OVER-DRIVING CONTROLLING METHODS - An image over-driving device is provided. An image detection device detects a size and a moving speed of an object according to an image signal and outputs an over-driving control signal according to the detected size and moving speed. A first image register receives and temporarily stores first image data of the image signal in a first frame period, and receives second image data of the image signal and outputs the first image data as a buffer data in a sequential second frame period. A first over-driving unit includes first and second lookup tables recording different over-driving parameters. The first over-driving unit generates first and second over-driving signals according to the buffer data and the second image data respectively by using the first and second lookup tables. The first multiplexer selects the first or second over-driving signal according to the over-driving control signal to drive a display device. | 08-27-2009 |
Ming-Lang Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20120073309 | THERMOELECTRIC DRINKING APPARATUS AND THERMOELECTRIC HEAT PUMP - A thermoelectric drinking apparatus has a feeding pipe, a cooling-gain circulating loop, a heating-gain circulating loop, an outlet pipe, and a thermoelectric heat pump. The thermoelectric heat pump has a cooling unit attached to the cold side of a thermoelectric chip, which has a cooling channel in its interior, and a heating unit attached to the hot side of the thermoelectric chip and provided with a heating channel in its interior. The feeding pipe conducts fluid into the cooling channel and the heating channel respectively. The cooling-gain and heating-gain circulating loop respectively cause fluids in the cooling channel and heating channel to create circular flows, such that the cold side and hot side of the thermoelectric chip respectively cool and heat the fluids via the cooling channel and heating channel. The outlet pipe discharges the cooled and/or heated fluids respectively from the cooling-gain circulating loop and heating-gain circulating loop. | 03-29-2012 |
Shao Hsiu Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090119760 | METHOD FOR RECONFIGURING SECURITY MECHANISM OF A WIRELESS NETWORK AND THE MOBILE NODE AND NETWORK NODE THEREOF - A method for reconfiguring the security mechanism of a wireless network system includes steps of: sending a packet from a network node to a mobile node; sending a negotiation packet from the mobile node to the network node according to a selected authentication protocol; the mobile node and the network node proceeding the authentication process if the received negotiation packet is valid; the mobile node and the network node generating a security association after the authentication process is completed. | 05-07-2009 |
Shao-Kang Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20120037815 | TEM PHASE PLATE LOADING SYSTEM - A phase plate loading system, which can be installed on any commercial TEM (transmission electron microscope) without modifying its optical or lens design, includes an airlock chamber and a transport unit. The airlock chamber is disposed adjacent to the specimen section of the TEM. The transport unit transfers a phase plate into the TEM through the airlock chamber. | 02-16-2012 |
Shao-Lun Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110310718 | METHOD AND APPARATUS FOR JUDGING BLANK AREA AND DATA RECORDED-AREA OF OPTICAL DISC - An apparatus for judging an optical disc includes a gain controller, an amplitude detecting unit and an amplitude comparing unit. The gain controller is used for receiving a radio frequency signal from an optical pickup head; and processing the radio frequency signal into an amplified radio frequency signal with a target amplitude according to an amplitude feedback signal. The amplitude detecting unit is used for receiving the amplified radio frequency signal, generating the amplitude feedback signal to the gain controller, and outputting a top envelope amplitude according to an top envelope signal of the amplified radio frequency signal. The amplitude comparing unit is used for comparing the top envelope amplitude with a threshold value to generate a resulting signal, and judging whether the laser beams emitted from the optical pickup head are irradiated on a blank area or a data-recorded area according to the resulting signal. | 12-22-2011 |
Sheng-Che Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090267704 | CAPACITOR DEVICES WITH A FILTER STRUCTURE - A capacitor device is provided. The capacitor device includes at least one capacitor. The capacitor device also includes a first capacitor and a first filter coupling the first capacitor and a conductive region, wherein the first capacitor has a first resonance frequency and the first filter is configured to operate at a first frequency band covering the first resonance frequency. | 10-29-2009 |
Shuo-Nan Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100192039 | MEMORY DEVICE AND OPERATION METHOD THEREOF - A method for operating a memory device is provided and includes the following steps. A first error correction code is generated according to user data. Then, the user data is written to the memory device. Moreover, the user data in the memory device is read, and a second error correction code is generated according to the read user data. Further, the first and the second error correction codes are written to the memory device. | 07-29-2010 |
Shuo-Yen Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080246167 | Layout Structure for Chip Coupling - A layout structure disposed on the substrate of the liquid crystal display (LCD) for chip coupling is provided. The first and second orientations that are substantially perpendicular to the first orientation can be defined on the substrate. The layout structure includes a plurality of lines, which extend along the second orientation, and a plurality of conductive pads that are respectively disposed on the lines. The conductive pads are distributed along the first orientation and staggered along the second orientation. Each line can shift away from the adjacent conductive pad on the first orientation. Thus, the LCD chip has a better conductivity and a thinner dimension under the precision of the conventional machines. | 10-09-2008 |
Ta Chun Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110049830 | Cycle propelling mechanism - A cycle propelling mechanism includes a rail disposed on a cycle frame, two cranks rotatably coupled to the cycle frame with a main drive shaft, two levers each include one end pivotally coupled to the crank and the other end slidably coupled to the rail for allowing the levers to be moved cyclically relative to the cycle frame, and two foot pedals pivotally attached to the levers for being stepped and operated by user's feet and for allowing the cranks and the lever to be rotated relative to the cycle frame in an elliptical moving stroke and for allowing the foot pedals to be stepped and moved for a longer stepping or moving stroke by the user, and for effectively exercising the more or bigger muscle groups of the user, and for applying bigger power to the cycle propelling mechanism. | 03-03-2011 |
Ta-Kuang Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110179926 | PROTECTION STRUCTURE FOR CUTTING ELECTRODE STRIP - The present invention discloses a protection structure for cutting an electrode strip, which comprises an electrode strip having at least one cutting channel; and two adhesive tapes respectively stuck to the upper and lower surfaces of the cutting channel, and which can effectively prevent from the formation of burrs and the shattering of solidified compounds in cutting the electrode strips, whereby are promoted the quality, stability and reliability of products. Further, the protection structure for cutting an electrode strip of the present invention also functions as an indicator to identify the cutting site. | 07-28-2011 |
Tsung-Yu Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080259138 | APPARATUS FOR REGULATING AIR PRESSURE IN INK TANK AND INK-SUPPLYING SYSTEM HAVING THE SAME - The present invention relates to an apparatus ( | 10-23-2008 |
| 20110012966 | APPARATUS FOR REGULATING AIR PRESSURE IN INK TANK AND INK-SUPPLYING SYSTEM HAVING THE SAME - The present invention relates to an ink-supplying system. The ink-supplying system includes an ink tank for receiving ink therein, a vacuum pump configured for providing a pressure below atmospheric pressure in the ink tank, a first regulating unit, at least one second regulating unit, and a third regulating unit disposed between the vacuum pump and the ink tank, and in communication with each other. The first regulating unit and the third regulating unit each includes a pressure regulating valve and a buffer tank connected therewith, and the at least one second regulating unit comprises a closed-loop pressure regulating valve and a buffer tank connected with the closed-loop pressure regulating valve. | 01-20-2011 |
| 20110261109 | INKJET PRINTING APPARATUS - An inkjet printing apparatus includes an inkjet print-head, an ink inlet conduit, a vacuum device, and a cleaning assembly. The inkjet print-head defines a number of nozzles. The ink inlet conduit is connected to the inkjet print-head and communicates with the nozzles. The cleaning assembly includes a cleaning member defining a cleaning groove. The vacuum device is connected to the inkjet print-head to impel cleaner received in the cleaning groove to flow through the nozzles along a direction reverse of a direction the ink is jetted. | 10-27-2011 |
Tun-Fu Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080280430 | METHOD OF FORMING FILMS IN A TRENCH - A method of forming films in a trench is applied to the manufacturing process of a power MOS device. In one embodiment, the method comprises providing a semiconductor substrate, forming a trench in the semiconductor substrate, forming a first dielectric layer on sidewalls of the trench, forming a second dielectric layer on the first dielectric layer, and forming a polysilicon layer in the trench. The method of forming films in a trench of the present invention can reduce or eliminate the thermal stress resulting from the different thermal expansion coefficients of different material layers after high temperature process. | 11-13-2008 |
Yen-Hsiang Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090251667 | Projector and color adjusting method thereof - A color adjusting method is applied to a projector. The projector has a light emitting element and a color wheel. The light emitting element supplies light, and makes the light pass through the color wheel so as to generate a plurality of different color lights. These different color lights are used to form a color image. The color adjusting method includes the steps of providing a plurality of driving waveforms which is dynamically switched for driving the light emitting element; defining a major color light of the color image, which is selected from the different color lights; and switching to one of these driving waveforms when the major color light is generated by the light passing through the color wheel. Thus, the light energy of the major color light is enhanced by means of driving the light emitting element through the switched driving waveform. | 10-08-2009 |
Yi-Hsuan Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090150016 | VEHICLE HYBRID POWER SYSTEM AND METHOD FOR CREATING SIMULATED EQUIVALENT FUEL CONSUMPTION MULTIDIMENSIONAL DATA APPLICABLE THERETO - A vehicle hybrid power system is provided according to the present invention. The hybrid power system is characterized by applying the concept of minimum equivalent fuel consumption, and then simulating equivalent fuel consumptions based on respective energy consumption or increase of motor and generator of a motor vehicle, and also defining simulated equivalent fuel consumption formula and making a list of system state parameters, system control parameters, and system negative load parameters, thereby obtaining simulated equivalent fuel consumption multidimensional data by entering the system parameters derived from a discretization/transformation process in the defined simulated equivalent fuel consumption formula; wherein, the simulated equivalent fuel consumption multidimensional data are revised to comprise subsystems, such as system engine, motor, generator, and others to determine a system control strategy of holistic optimization, thereby achieving the objective of saving energy. The present invention further provides a method for creating simulated equivalent fuel consumption multidimensional data, which is applicable to the hybrid power system of the present invention. | 06-11-2009 |
Yung-Tai Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090023289 | CONDUCTOR REMOVAL PROCESS - A conductor removal process is described, which is applied to a substrate that has thereon a plurality of patterns and a blanket conductor layer covering the patterns. An upper portion of the blanket conductor layer entirely over the patterns is oxidized to form a dielectric layer. A CMP step is performed to remove the dielectric layer and a portion of the remaining conductor layer in turn and thereby expose the patterns. | 01-22-2009 |
| 20100244180 | METHOD FOR FABRICATING DEVICE ISOLATION STRUCTURE - A method of a fabricating a semiconductor device includes providing a substrate having a first region and a second region. A pad layer is formed overlying the substrate in both the first region and the second region. A mask layer is then formed overlying the pad layer. Thereafter, the mask layer, the pad layer and the substrate are patterned to form a plurality of first trenches in the first region and a plurality of second trenches in the second region. A trimming process is then performed on the mask layer to remove a portion of the mask layer. An insulation layer is formed over the substrate and fills the plurality of the first trenches and the plurality of the second trenches. Ultimately, a planarization process is performed on the insulation layer. | 09-30-2010 |
Zi-Shun Hung, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110071112 | Compositions and Methods for Preserving Colors and Patterns of Plants - The present invention relates to a composition for preserving plants, which comprises 5 carbon alcohol, at least one alcohol selected from the group consisting of 3 carbon alcohol and 4 carbon alcohol, a thiourea and at least one acid selected from the group consisting of tartaric acid and boric acid. The composition is used to preserve colors, patterns and DNA of plants. The composition can also be used to change colors of flowers. The present invention also relates to a method for preserving plants, which comprises soaking the plants in the composition of the present invention. | 03-24-2011 |