Patent application number | Description | Published |
20110211366 | BACKLIGHT MODULE - A backlight module includes a light guide plate having a light incident surface, a light source module, at least one catch member, and a cushion member. The light source module is disposed adjacent to the light incident surface and has at least one light-emitting element, wherein a light beam emitted by the light-emitting element is capable of entering the light guide plate through the light incident surface. The catch member engages with one end of the light source module, wherein the catch member has at least one extension part extending towards the light incident surface of the light guide plate, and the extension part has an end surface facing the light incident surface. The cushion member is disposed between the light guide plate and the light source module and is adjacent to the light incident surface of the light guide plate and the end surface of the catch member. | 09-01-2011 |
20110242793 | BACKLIGHT MODULE - A backlight module includes a heat-dissipating element, at least one light-emitting element disposed on a first side of the heat-dissipating element, a back plate, and a heat-insulation element. The back plate has at least one opening and is disposed on the first side of the heat-dissipating element, and the back plate is not overlapped with the light-emitting element. The heat-insulation element is disposed between the back plate and the heat-dissipating element for reducing heat conduction between the back plate and the heat-dissipating element so as to prevent the heat generated by the light-emitting element from being conducted to the back plate. | 10-06-2011 |
20110249470 | BACKLIGHT MODULE - A backlight module includes a light guide plate, a back plate, a heat-dissipating element, a light-emitting element, and at least one high-performance heat sink. The heat-dissipating element is disposed adjacent to a light incident surface of the light guide plate, and the heat-dissipating element has a bottom portion and a side portion forming an angle with the bottom portion. The light-emitting element is disposed on one side of the heat-dissipating element facing the light guide plate. The high-performance heat sink is disposed on the back plate, one end of the high-performance heat sink overlaps the heat-dissipating element, and another end of the high-performance heat sink extends away from the light-emitting element. | 10-13-2011 |
20120097944 | TEST STRUCTURES FOR THROUGH SILICON VIAS (TSVs) OF THREE DIMENSIONAL INTEGRATED CIRCUIT (3DIC) - A plurality of through silicon vias (TSVs) on a substrate or in a 3 dimensional integrated circuit (3DIC) are chained together. TSVs are chained together to increase the electrical signal. A plurality of test pads are used to enable the testing of the TVSs. One of the test pads is grounded. The remaining test pads are either electrically connected to TSVs in the chain or grounded. | 04-26-2012 |
20130099809 | METHODS AND SYSTEMS FOR PROBING SEMICONDUCTOR WAFERS - A wafer probing method includes calibrating a wafer probing system, checking continuity between probe pins of the wafer probing system and respective conductors of a wafer under test, and identifying at least an interconnect structure in the wafer under test to determine whether a fault exists. | 04-25-2013 |
20130147505 | TEST PROBING STRUCTURE - A testing probe structure for wafer level testing semiconductor IC packaged devices under test (DUT). The structure includes a substrate, through substrate vias, a bump array formed on a first surface of the substrate for engaging a probe card, and at least one probing unit on a second surface of the substrate. The probing unit includes a conductive probe pad formed on one surface of the substrate and at least one microbump interconnected to the pad. The pads are electrically coupled to the bump array through the vias. Some embodiments include a plurality of microbumps associated with the pad which are configured to engage a mating array of microbumps on the DUT. In some embodiments, the DUT may be probed by applying test signals from a probe card through the bump and microbump arrays without direct probing of the DUT microbumps. | 06-13-2013 |
20130196458 | METHOD OF TESTING THROUGH SILICON VIAS (TSVS) OF THREE DIMENSIONAL INTEGRATED CIRCUIT (3DIC) - In a method of testing a plurality of through silicon vias (TSVs) chained together by interconnect on a substrate, a test signal is applied to a first test pad among a plurality of test pads, and a return signal is measured at a second test pad among the plurality of test pads. At least one test pad of the plurality of test pads is grounded to the substrate. The remaining test pads of the plurality of test pads are either connected to the plurality of chained TSVs or are grounded. | 08-01-2013 |
20140167799 | THREE DIMENSIONAL INTEGRATED CIRCUIT ELECTROSTATIC DISCHARGE PROTECTION AND PREVENTION TEST INTERFACE - The present disclosure provides a system and method for providing electrostatic discharge protection. A probe card assembly is provided which is electrically connected to a plurality of input/output channels. The probe card assembly can be contacted with a secondary assembly having an interposer electrically connected to one or more wafers each wafer having a device under test. Voltage can be forced on ones of the plural input/output channels of the probe card assembly to slowly dissipate charges resident on the wafer to thereby provide electrostatic discharge protection. A socket assembly adaptable to accept a 3DIC package is also provided, the assembly having a loadboard assembly electrically connected to a plurality of input/output channels. Once the 3DIC package is placed within the socket assembly, voltage is forced on ones of the input/output channels to slowly dissipate charges resident on the 3DIC package to thereby provide electrostatic discharge protection. | 06-19-2014 |
20140253162 | INTEGRATED CIRCUIT TEST SYSTEM AND METHOD - A system for testing a device under test (DUT) includes a probe card and a test module. The probe card includes probe beds electrically coupled to a circuit board and a first plurality of electrical contacts coupled to the circuit board, which are for engaging respective ones of a plurality of electrical contacts of a test equipment module. Probes are coupled to respective probe beds and are disposed to engage electrical contacts of the DUT. The probe card includes a second plurality of electrical contacts coupled to the circuit board. The first and second pluralities of contacts are mutually exclusive. The test module includes a memory, a processor, and a plurality of electrical contacts electrically coupled to respective ones of the second plurality of electrical contacts of the probe card. The circuit board includes a first electrical path for electrically coupling the test equipment module to the test module. | 09-11-2014 |
20140266273 | TEST-YIELD IMPROVEMENT DEVICES FOR HIGH-DENSITY PROBING TECHNIQUES AND METHOD OF IMPLEMENTING THE SAME - A testing apparatus with reduced warping of the probe card and a method of reducing warping of a probe card of a testing apparatus are disclosed. The testing apparatus can include a testing head and a platform opposite the testing head, where the testing head and platform move relative to one another to bring a sample into contact with probing tips of the testing apparatus. The testing head can include a probe card printed circuit board, a stiffener, a discontinuous backer and a plurality of probing tips. The stiffener can be coupled to and reinforcing the probe card. The discontinuous backer can extend from the probe card to the stiffener, and can include at least one unfilled void extending from the stiffener to the probe card. The plurality of probing tips can extend from a distal end of the testing head. | 09-18-2014 |