Patent application number | Description | Published |
20100225509 | ANALOG-DIGITAL CONVERTER WITH PIPELINE ARCHITECTURE ASSOCIATED WITH A PROGRAMMABLE GAIN AMPLIFIER - A device may include a programmable gain amplifier and an analog-digital converter with pipeline architecture having several stages. The first stage of the analog-digital converter may incorporate the programmable gain amplifier and an analog-digital conversion circuit with a programmable threshold. | 09-09-2010 |
20100308904 | DEVICE FOR GENERATING A REFERENCE VOLTAGE DESIGNED FOR A SYSTEM OF THE SWITCHED-CAPACITOR TYPE - The device generates a reference voltage, in particular designed for a system of the switched-capacitor type, based on a setpoint voltage. It includes a regulation loop having a first input to receive the setpoint voltage, and an output stage arranged as a voltage follower and looped to a second input of the loop. An additional stage is configured to deliver the reference voltage to the switched-capacitor system, this additional stage, coupled to the output stage, also being arranged as a voltage follower and paired with the output stage. | 12-09-2010 |
20100321082 | METHOD AND DEVICE FOR CONTROLLING A COMMON-MODE VOLTAGE OF A SWITCHED-CAPACITOR SYSTEM, IN PARTICULAR AN ANALOG-TO-DIGITAL CONVERTER - The common-mode voltage of a switched-capacitor system is controlled by determining a current common-mode voltage of the switched-capacitor system, converting (in a flow-through conduction cell) the difference between the current common-mode voltage and a desired common-mode voltage into a resultant current, and reinjecting this resultant current into the switched-capacitor system via a resistive path. | 12-23-2010 |
20110205098 | SWITCHED CAPACITOR AMPLIFIER - A switched capacitor amplifier having an amplification unit adapted to amplify a differential signal; a first switched capacitor block including a first plurality of capacitors operable to sample a first differential input signal during a first sampling phase and to drive the amplification unit during a first drive phase; and a second switched capacitor block including a second plurality of capacitors operable to sample a second differential input signal during a second sampling phase and to drive the amplification unit during a second drive phase. | 08-25-2011 |
20120098684 | Device and Method for Processing an Analogue Signal - Device for processing an analogue signal, comprising an analogue-digital converter with a pipelined architecture having an offset, and compensation means configured to compensate for the said offset, the said compensation means comprising digital correction means configured to correct the integer portion of the offset based on the digital signal delivered by the analogue-digital converter, and analogue correction means included in the last stage of the analogue-digital converter and configured to correct the decimal portion of the offset. | 04-26-2012 |
20130043938 | LOW VOLTAGE ANALOG SWITCH - A switch for an analog signal may include a main MOS transistor whose source forms an input terminal of the switch and whose drain forms an output terminal of the switch, a capacitor having a first terminal permanently connected to the source of the main transistor, a circuit for charging the capacitor, and a first auxiliary transistor configured to connect the second terminal of the capacitor to the gate of the main transistor in response to a control signal. The charge circuit may include a resistor permanently connecting the second terminal of the capacitor to a power supply line. The capacitor and the resistor may form a high-pass filter having a cutoff frequency lower than the frequency of the analog signal. | 02-21-2013 |
20130069624 | LOW-VOLTAGE DIFFERENTIAL SIGNAL ACTIVITY DETECTOR - An activity detector for a differential signal formed by two components may include a current source connected to a power supply line, and a first transistor has a drain being powered by the current source, and has a source that forms a first input terminal receiving a first component of the differential signal. A second transistor has a drain being powered by the current source, and has a source forms a second input terminal receiving the second component of the differential signal. A bias circuit applies a potential to the gates of the first and second transistors, establishing a balance condition where all the current from the current source is distributed between the two transistors when the first and second input terminal potential is equal to a threshold value. An activity indication terminal is taken from the drains of the first and second transistors. | 03-21-2013 |
20130106631 | INTERLEAVED ADC CALIBRATION | 05-02-2013 |
20130106632 | CALIBRATION OF INTERLEAVED ADC | 05-02-2013 |