| Patent application number | Description | Published |
|---|
| 20090296769 | CALIBRATION OF TEMPERATURE SENSING CIRCUITRY IN AN ELECTRONIC DEVICE - Temperature sensing circuitry is used for thermal management of an electronic device. The temperature sensing circuitry includes at least one thermistor placed at or near a component of the electronic device. The temperature sensing circuitry also includes a high-precision resistor for calibration purposes. The resistance of the resistor is equivalent to the resistance of the thermistor at a reference temperature. A calibration reading is obtained using a set current that is being passed through the resistor. An error present in the temperature sensing circuitry is determined based on the calibration reading and a design value. A temperature measurement associated with the component is then made using the thermistor, while the set current is being passed through the thermistor. The error is corrected in the temperature measurement of the component. Other embodiments are also described. | 12-03-2009 |
| 20100069127 | ELECTRONIC DEVICES FOR RECEIVING PUSHED DATA - Mobile devices such as cellular telephones are provided that communicate with wireless networks. Cellular telephone network equipment may communicate with a cellular telephone over a data connection. The cellular telephone may have an internet protocol (IP) address that allows data to be provided to the cellular telephone over the data connection. To conserve resources and release unused IP addresses, the cellular telephone network equipment may deactivate inactive data connections after a period of inactivity. A baseband processor within a mobile device may periodically send User Datagram Protocol (UDP) keep-alive packets over the data connection to ensure that the data connection remains active. The keep-alive packets may be directed to a packet sink server or may be associated with a black hole route. An applications processor in the telephone may remain in sleep mode during keep-alive packet transmission to conserve power. | 03-18-2010 |
| 20100079128 | LOW NOISE EXTERNAL ENABLE SWITCHER CONTROL SIGNAL USING ON-CHIP SWITCHER - A method and system is disclosed for powering device sub-circuitry of an electronic device. The sub-circuitry may be used to provide control signals to a direct current switcher on a main system board, thus eliminating passive circuitry typically associated with the sub-circuitry. Furthermore, by actively generating the control signals for the direct current switcher, explicit timing control circuitry is not required to synchronize the transmitted power to the sub-circuitry. | 04-01-2010 |
| 20100246143 | Electromagnetic Interference Shielding for Compact Electronic Devices - Improved approaches for providing electromagnetic interference shielding to one or more electrical components within a housing of a portable electronic device are disclosed. According to one aspect of certain embodiments, an electromagnetic shield can be attached to one or more edges of a substrate (e.g., printed circuit board) provided within a housing of a portable electronic device. Advantageously, this allows the substrate space to be efficiently utilized such that relatively wide electrical components can be provided on the substrate without having to further increase the width of the substrate to provide space for an EMI shielding structure and its attachment to the substrate. The housing of the portable electronic device can be compact, such as a low profile housing. | 09-30-2010 |
| 20120023346 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 01-26-2012 |
| 20120023347 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 01-26-2012 |
| 20120023348 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 01-26-2012 |
| 20120023356 | PEAK POWER VALIDATION METHODS AND SYSTEMS FOR NON-VOLATILE MEMORY - Systems and methods are disclosed for validating a non-volatile memory (NVM) package for use in an electronic device before it is incorporated into the device. A NVM package may be validated by determining its power consumption profile, and if the profile meets predetermined criteria, that NVM package may be qualified for use in an electronic system. The power consumption profile may be obtained by issuing commands, such as read commands, to the NVM package to simultaneously access each die of the NVM package to invoke a maximum power consumption event. During this event, power consumption by the NVM package can be monitored and analyzed to determine whether the NVM package qualifies for use in an electronic device. | 01-26-2012 |
