Huang, Sunnyvale
Anatole Huang, Sunnyvale, CA US
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20160075554 | INTERNAL BARRIER FOR ENCLOSED MEMS DEVICES - A MEMS device having a channel configured to avoid particle contamination is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate includes a MEMS device area, a seal ring and a channel. The seal ring provides for dividing the MEMS device area into a plurality of cavities, wherein at least one of the plurality of cavities includes one or more vent holes. The channel is configured between the one or more vent holes and the MEMS device area. Preferably, the channel is configured to minimize particles entering the MEMS device area directly. The base substrate is coupled to the MEMS device substrate. | 03-17-2016 |
An-Cheng Huang, Sunnyvale, CA US
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20100169567 | DYNAMIC DISK THROTTLING IN A WIDE AREA NETWORK OPTIMIZATION DEVICE - A network device may operate to increase application performance over a wide area network. In one particular implementation, the network device may monitor accesses to a disk drive from entities and determine whether an entity is accessing the disk drive in a manner that causes a disproportionate amount of performance degradation. If so, the network device may throttle access to the disk drive for the entity. | 07-01-2010 |
20100174823 | OPTIMIZING BATCH SIZE FOR PREFETCHING DATA OVER WIDE AREA NETWORKS - A data prefetching technique optimizes the batch size of prefetch requests. The optimized batch size may be determined based on a prefetch transfer time of a previous prefetch operation, where the prefetch transfer time is measured as an elapsed time interval from when data from the previous prefetch operation is first received to when the data from the previous prefetch operation is finished being received; | 07-08-2010 |
20110208747 | MEMORY EFFICIENT INDEXING FOR DISK-BASED COMPRESSION - A network optimization device may receive a stream of data and generate a signature for a plurality of fixed length overlapping windows of the stream of data. The device may select a predetermined number of the generated signatures for each L | 08-25-2011 |
20120191909 | DYNAMIC DISK THROTTLING IN A WIDE AREA NETWORK OPTIMIZATION DEVICE - A network device may operate to increase application performance over a wide area network. In one particular implementation, the network device may monitor accesses to a disk drive from entities and determine whether an entity is accessing the disk drive in a manner that causes a disproportionate amount of performance degradation. If so, the network device may throttle access to the disk drive for the entity. | 07-26-2012 |
Chao-Ping Huang, Sunnyvale, CA US
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20080320418 | Graphical User Friendly Interface Keypad System For CAD - The present invention offers an improved GUI interface for CAD software to allow users easy access to menus. A user can execute commands and options with little disruption and with minimal hand movement. The keypad is represented on the computer screen and is called a GUFI (Graphical User Friendly Interface) keypad system. The keypad is a menu having a matrix of graphical buttons. A user selects a computer resource with a spatial input device and clicks the proper context button, the GUFI keypad displays only the functions or commands that pertain to the computer resource selected. The unique GUFI keypad system displays functions and commands in an arrayed, not in a pop-up or pull down menu, but in a pattern relating to the keys on the keyboard. Menu items are accessed through a one to one correspondence with the represented keys mapped to similar physically represented keys. | 12-25-2008 |
20110022976 | DYNAMIC USER INTERFACE SYSTEM - A user interface system for operating software on a computer includes a pointing device operable by a user's primary dexterous hand, a keyboard operable by the user's secondary dexterous hand, a matrix of keyboard keys on the keyboard. The matrix may include a first set of functions that are selected from a plurality of functions, and can be programmed to the matrix and displayed on the computer screen as a context menu. The selection of the functions being programmed to the matrix is dynamically linked to a previously executed function. | 01-27-2011 |
Chengdu Huang, Sunnyvale, CA US
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20140282031 | Dynamic Field Extraction of Log Data - A log analytics graphical user interface enables a user to dynamically extract and define a field from unstructured log data. The log analytics module automatically determines a definition for a field based on log text selected by the user. A portion of each log message is highlighted to reflect what the extracted field may be to assist users with understanding if input parameters are selected the intended log data. Changes to the definition of the field, by the user, may cause further highlighting that to indicate an incomplete or erroneous field definition. | 09-18-2014 |
20140310225 | EFFICIENT DATA PATTERN MATCHING - Exemplary methods, apparatuses, and systems for parsing unstructured data with a plurality of pattern matching rules are disclosed. An optimized pattern matching rule for one or more respective pattern matching rules is derived from an original pattern matching rule. The optimized pattern matching rule includes an extracted text string from the respective pattern matching rule or a less complex pattern match than the respective pattern matching rule. If the extracted text string or pattern is determined to match any of the data to be parsed, application of the original pattern matching rule is bypassed. The original pattern matching rule is applied when the one or more optimized pattern matching rules match the data. | 10-16-2014 |
20140310290 | EFFICIENT DATA PATTERN MATCHING - Exemplary methods, apparatuses, and systems parse data with a plurality of pattern matching rules. Pattern matching rules are applied in an ordered sequence and a first rule is applied to the data before a second rule is applied to the data. In response to determining the second rule matches the data the second rule is determined to match the data and the sequence is reordered to apply the second rule prior to the first rule. | 10-16-2014 |
20140310291 | EFFICIENT DATA PATTERN MATCHING - Exemplary methods, apparatuses, and systems receive data as input to be parsed. The data is parsed using a plurality of pattern matching rules, the plurality of pattern matching rules organized according to a hierarchy including a parent rule and one or more child rules of the parent rule. Parsing includes applying the parent rule to the unstructured data, determining the parent rule is unable to find a pattern match in the unstructured data, and bypassing the application of each child rule to the unstructured data in response to the determination that the parent rule is unable to find a pattern match. | 10-16-2014 |
Chengkuo Huang, Sunnyvale, CA US
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20120290798 | Data Compression and Compacting for Memory Devices - Embodiments of the present disclosure provide apparatuses and methods for determining a compacting arrangement to store logical addressable units, which include compressed data sectors, into hardware addressable units of a storage device. The compacting arrangement is based on compression information associated with the logical addressable units. A write module is used to write the compressed data sectors to the storage device according to the compacting arrangement. | 11-15-2012 |
Chung-Kuang Huang, Sunnyvale, CA US
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20100289424 | Methods and Circuits for LED Drivers and for PWM Dimming Controls - The present invention relates to methods for LED driver applications, comprising the steps: providing an input voltage, V | 11-18-2010 |
Dajen Huang, Sunnyvale, CA US
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20100262945 | REPEATER DRIVEN ROUTING METHODOLOGY - A method for routing a chip, involving forming a plurality of nets configured to connect components of the chip, wherein each of the plurality of nets is included in a netlist, assigning at least one repeater to each of the plurality of nets in the netlist, wherein the repeaters are assigned prior to performing physical routing of the plurality of nets, inserting the at least one repeater in a corresponding net, wherein the insertion of the at least one repeater divides the corresponding net into at least two subnets, and performing the physical routing of the plurality of nets by connecting each of the subnets. | 10-14-2010 |
20100325600 | ROUTING NETS OVER CIRCUIT BLOCKS IN A HIERARCHICAL CIRCUIT DESIGN - Some embodiments of the present invention provide a system that routes nets over circuit blocks in a hierarchical circuit design. During operation, the system can receive a set of circuit blocks. At least some terminals of the circuit blocks may be desired to be electrically linked together using a net which is expected to be routed over one or more circuit blocks. The system may divide an area associated with a block (e.g., an area in a metal layer which is situated above the block) into a set of tiles. Next, the system may assign costs to at least some of the tiles in the set of tiles. The system can then use the costs during routing. Note that using the costs of the tiles during routing makes it more likely that buffers can be used wherever required to meet slew and timing requirements. | 12-23-2010 |
Erica Huang, Sunnyvale, CA US
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20110145899 | Single Action Authentication via Mobile Devices - A method for authenticating a user includes receiving a user identification, confirming the user identification, sending a request to the user to perform a single action on a communication device, creating a session to receive the single action from the communication device, receiving an identifier from the communication device, using the identifier to verify that the user has the communication device, and authenticating the user based on the confirmed user information and the verification that the user has the communication device. The identification can include a username and a password or can be a one time password. | 06-16-2011 |
Fei Huang, Sunnyvale, CA US
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20090193018 | Matching Engine With Signature Generation - A system and a method generates at least one signature associated with document. In one embodiment, a document comprised of text is received and parsed to generate a token set. The token set includes a plurality of tokens. Each token corresponds to the text in the document that is separated by a predefined character characteristic. A score is calculated for each token in the token set based on a frequency and distribution of the text in the document. Each token is then ranked based on the calculated score. A subset of the ranked tokes is selected and a signature is generated for each occurrence of the selected tokens. The selected list of signatures is then output. | 07-30-2009 |
Guangsong Huang, Sunnyvale, CA US
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20100281533 | METHOD AND APPARATUS FOR IMPLEMENTING A LAYER 3/LAYER 7 FIREWALL IN AN L2 DEVICE - Methods and apparatus for transferring packets in a packet switched communication system. A system is provided that includes an L | 11-04-2010 |
20130007839 | ROUTING A PACKET BY A DEVICE - Methods and apparatus for transferring packets in a packet switched communication system. A system is provided that includes an L2 device including a controller determining for each packet received whether the received packet is to be inspected, an inspection device operable to inspect and filter packets identified by the controller including using a zone specific policy and an L2 controller for transferring inspected packets in accordance with L2 header information using L2 protocols. | 01-03-2013 |
20140215598 | NETWORK SECURITY DEVICE - Methods and apparatus, including computer program products, implementing and using techniques for processing a data packet. An input port receives a data packet, a switching board classifies the data packet, determines whether the data packet should be accepted, and switches the data packet to a management board if the data packet is a first data packet in a session, and to a processing board if the data packet is not a first data packet in a session. A management board receives a data packet from the switching board, examines the data packet and forwards the data packet to one of the processing boards. One or more processing boards receives non-first data packets from the switching board and data packets from the management board and processes the data packets. A firewall and a secure gateway with firewall and virtual private network functionality for processing a data packet are also described. | 07-31-2014 |
Guolin Huang, Sunnyvale, CA US
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20130067163 | METHODS AND STRUCTURE FOR TRANSFERRING OWNERSHIP OF A LOGICAL VOLUME BY TRANSFER OF NATIVE-FORMAT METADATA IN A CLUSTERED STORAGE ENVIRONMENT - Methods and systems for transferring ownership of a logical volume in a storage system comprising multiple storage controllers is provided. According to the method, the storage controllers are coupled for communication with a logical volume, wherein at least one storage device coupled with the storage controllers implements the logical volume. The method comprises identifying, at a first storage controller, a second storage controller to receive the logical volume. The method also comprises initiating a transfer of ownership of the logical volume from the first storage controller to the second storage controller by transferring metadata stored in a memory of the first storage controller to the second storage controller, the metadata existing in a native format that describes the configuration of the logical volume on the at least one storage device. | 03-14-2013 |
20130067164 | METHODS AND STRUCTURE FOR IMPLEMENTING LOGICAL DEVICE CONSISTENCY IN A CLUSTERED STORAGE SYSTEM - Methods and system are provided for exposing logical volumes to host systems and storage controllers in a consistent manner across a clustered storage system. One embodiment is a storage controller. The storage controller is operable to communicate with other storage controllers within the clustered storage system. The storage controller is further operable to generate a proposed Logical Unit Number (LUN) for a logical volume provisioned at the storage devices, and to communicate with each of the other storage controllers within the clustered storage system requesting that the other storage controllers determine if the proposed LUN is in use. If the proposed LUN is not in use, then storage controller assigns the proposed LUN to the logical volume. If the LUN is in use, then the storage controller generates a new proposed LUN and re-tries communication with the other storage controllers until a unique LUN is found. | 03-14-2013 |
20130067274 | METHODS AND STRUCTURE FOR RESUMING BACKGROUND TASKS IN A CLUSTERED STORAGE ENVIRONMENT - Methods and structure for resuming background tasks in a storage environment. storage controller. The system is operable to receive host Input/Output (I/O) requests directed to a logical volume, and to couple with one or more of storage devices provisioning the logical volume. The system is further operable to process the host I/O requests directed to the logical volume, to initiate a background processing task distinct from the host I/O requests and related to the logical volume, and to store progress information on at least one of the one or more storage devices describing progress of the background processing task. | 03-14-2013 |
Hang Huang, Sunnyvale, CA US
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20100254206 | Cache Optimizations Using Multiple Threshold Voltage Transistors - In one embodiment, a memory circuit includes one or more memory cells that include transistors having a first nominal threshold voltage, and interface circuitry such as word line drivers and bit line control circuitry that includes one or more transistors having a second nominal threshold voltage that is lower than the first nominal threshold voltage. For example, the word line driver circuit may be driven by signals from a lower voltage domain than the memory circuit's voltage domain. Lower threshold voltage transistors may be used for those signals, in some embodiments. Similarly, lower threshold voltage transistors may be used in the write data driver circuits. Other bit line control circuits may include lower threshold voltage transistors to permit smaller transistors to be used, which may reduce power and integrated circuit area occupied by the memory circuits. | 10-07-2010 |
20100329062 | Leakage and NBTI Reduction Technique for Memory - In one embodiment, an integrated circuit includes a logic circuit and a memory circuit that includes multiple bit lines and bit line precharge circuits. The memory circuit may include level shifters for control signals generated from logic circuit inputs, and particularly there may be one or more level shifters that generate precharge enable signals to control the bit line precharge circuits. The level shifters for the bit line precharge circuits may also be controlled, during periods of time that the memory circuit is idle, by an input control signal (FloatBL herein). If the FloatBL signal is asserted, the bit line precharge circuits may be disabled to float the bit lines. In some embodiments, the FloatBL signal may also disable bit line bit line hold circuits on the bit lines. In some embodiments, when the memory circuit is exiting an idle state, the bit line precharge circuits may be enabled in a staggered fashion. | 12-30-2010 |
20110255355 | Leakage and NBTI Reduction Technique for Memory - In one embodiment, an integrated circuit includes a logic circuit and a memory circuit that includes multiple bit lines and bit line precharge circuits. The memory circuit may include level shifters for control signals generated from logic circuit inputs, and particularly there may be one or more level shifters that generate precharge enable signals to control the bit line precharge circuits. The level shifters for the bit line precharge circuits may also be controlled, during periods of time that the memory circuit is idle, by an input control signal (FloatBL herein). If the FloatBL signal is asserted, the bit line precharge circuits may be disabled to float the bit lines. In some embodiments, the FloatBL signal may also disable bit line bit line hold circuits on the bit lines. In some embodiments, when the memory circuit is exiting an idle state, the bit line precharge circuits may be enabled in a staggered fashion. | 10-20-2011 |
20120257469 | Leakage and NBTI Reduction Technique for Memory - In one embodiment, an integrated circuit includes a logic circuit and a memory circuit that includes multiple bit lines and bit line precharge circuits. The memory circuit may include level shifters for control signals generated from logic circuit inputs, including one or more level shifters that generate precharge enable signals to control the bit line precharge circuits. The level shifters for the bit line precharge circuits may also be controlled, during periods of time that the memory circuit is idle, by a control signal (FloatBL herein). If the FloatBL signal is asserted, the bit line precharge circuits may be disabled. In some embodiments, the FloatBL signal may also disable bit line bit line hold circuits on the bit lines. In some embodiments, when the memory circuit is exiting an idle state, the bit line precharge circuits may be enabled in a staggered fashion. | 10-11-2012 |
20140169075 | MEMORY ARRAY VOLTAGE SOURCE CONTROLLER FOR RETENTION AND WRITE ASSIST - A voltage source controller for a memory array includes an input coupled to a voltage source, an output coupled to one or more memory cells of a memory array, where the output is configured to provide a cell source voltage to the memory cells. The controller also includes a switch circuit configured to: receive a retention enable signal, a write assist enable signal, and a standard mode enable signal; and based on the retention enable signal, write assist enable signal, and standard mode enable signal, selectively set the cell source voltage for one or more of the memory cells to one of: a retention voltage, a write assist voltage, or a standard mode voltage, where the retention voltage and the write assist voltage are less than the standard mode voltage. | 06-19-2014 |
20140219009 | LOW VOLTAGE BOOTSTRAPPING METHOD FOR WRITE ASSIST - Embodiments of a memory are disclosed that may allow for a negative boost of data lines during a write. The memory device may include a data input circuit, an address decode circuit and a plurality of sub-arrays. Each of the sub-arrays may include a plurality of columns, a write selection circuit, a first write driver circuit, a second write driver circuit, and a boost circuit. Each of the columns may include a plurality of data storage cells. The write selection circuit may select a column of the plurality of columns. Each of the write driver circuits may configured to discharge a data line of a selected column into a common node. The boost circuit may be configured to initialize the common node to the first voltage level and couple the common node to a second voltage level, where the second voltage level is lower than the first voltage level. | 08-07-2014 |
Helen Huang, Sunnyvale, CA US
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20150277541 | L2 CACHE RETENTION MODE - Systems and methods for reducing leakage power in a L2 cache within a SoC. The L2 cache is partitioned into multiple banks, and each bank has its own separate power supply. An idle counter is maintained for each bank to count a number of cycles during which the bank has been inactive. The temperature and leaky factor of the SoC are used to select an operating point of the SoC. Based on the operating point, an idle counter threshold is set, with a high temperature and high leaky factor corresponding to a relatively low idle counter threshold, and with a low temperature and low leaky factor corresponding to a relatively high idle counter threshold. When a given idle counter exceeds the idle counter threshold, the voltage supplied to the corresponding bank is reduced to a voltage sufficient for retention of data but not for access. | 10-01-2015 |
Hui Huang, Sunnyvale, CA US
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20100094813 | REPRESENTING AND STORING AN OPTIMIZED FILE SYSTEM USING A SYSTEM OF SYMLINKS, HARDLINKS AND FILE ARCHIVES - A data de-duplication system is used with network attached storage and serves to reduce data duplication and file storage costs. Techniques utilizing both symlinks and hardlinks ensure efficient deletion file/data cleanup and avoid data loss in the event of crashes. | 04-15-2010 |
20140274752 | SET MEMBERSHIP TESTERS FOR ALIGNING NUCLEIC ACID SAMPLES - Disclosed are methods and tools for rapidly aligning reads to a reference sequence. These methods and tools employ Bloom filters or similar set membership testers to perform the alignment. The reads may be short sequences of nucleic acids or other biological molecules and the reference sequences may be sequences of genomes, chromosomes, etc. The Bloom filters include a collection of hash functions, a bit array, and associated logic for applying reads to the filter. Each filter, and there may be multiple of these used in a particular application, is used to determine whether an applied read is present in a reference sequence. Each Bloom filter is associated with a single reference sequence such as the sequence of a particular chromosome. In one example, chromosomal abundance is determined by aligning reads from a sequencer to multiple chromosomes, each having an associated Bloom filter or other set membership tester. | 09-18-2014 |
Jay Huang, Sunnyvale, CA US
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20130067240 | CONTENT PROTECTION VIA ONLINE SERVERS AND CODE EXECUTION IN A SECURE OPERATING SYSTEM - A computer system comprising a processor and a memory for storing instructions, that when executed by the processor performs a copy protection method. The copy protection method comprises executing a software loop of a first software application in a first operating system. A first call is executed in the software loop to a code portion. A decrypted code portion of the first software application is executed in a second operating system in response to the first call. The code portion is decrypted in response to a successful validation of the first software application. | 03-14-2013 |
20140157423 | CODE PROTECTION USING ONLINE AUTHENTICATION AND ENCRYPTED CODE EXECUTION - Methods for code protection are disclosed. A method includes using a security processing component to access an encrypted portion of an application program that is encrypted by an on-line server, after a license for use of the application program is authenticated by the on-line server. The security processing component is used to decrypt the encrypted portion of the application program using an encryption key that is stored in the security processing component. The decrypted portion of the application program is executed based on stored state data. Results are provided to the application program that is executing on a second processing component. | 06-05-2014 |
20150301761 | System and method of protecting data in dynamically-allocated regions of memory - Embodiments of the claimed subject matter provide systems and methods for protecting data in dynamically allocated regions of memory. The method can include receiving the read request where the read request comprises a virtual address associated with a memory and determining a physical address associated with the virtual address. The further includes determining whether the physical address associated with the virtual address is read protected and determining whether the read request is from a component allowed to access read protected memory. The read protected memory was dynamically allocated on a per page basis. The method further includes in response to determining that the read request is to a read protected physical address and determining that the component is allowed to access read protected memory, sending the data from the physical address in the memory. | 10-22-2015 |
Jay S. Huang, Sunnyvale, CA US
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20140281319 | SYSTEM AND METHOD FOR PROTECTING DATA - A system and method are provided for protecting data. In operation, a request to read data from memory is received. Additionally, it is determined whether the data is stored in a predetermined portion of the memory. If it is determined that the data is stored in the predetermined portion of the memory, the data and a protect signal are returned for use in protecting the data. In certain embodiments of the invention, data stored in the predetermined portion of the memory may be further processed and written hack to the predetermined portion of the memory. In other embodiments of the invention, such processing may involve unprotected data stored outside the predetermined portion of the memory. | 09-18-2014 |
20150149788 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR OPTIMIZING DATA ENCRYPTION AND DECRYPTION BY IMPLEMENTING ASYMMETRIC AES-CBC CHANNELS - A system, method, and computer program product are provided for implementing asymmetric AES-CBC (Advanced Encryption Standard-Cipher Block Chaining) channels usage between encryption and decryption of data. In operation, data to be written to memory is identified. In addition, the data is encrypted utilizing a first AES-CBC channel. Additionally, at least one of a plurality of AES-CBC channels is utilized to decrypt the data to achieve a determined performance target. | 05-28-2015 |
Jeff Huang, Sunnyvale, CA US
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20090164449 | SEARCH TECHNIQUES FOR CHAT CONTENT - Methods and apparatus are described for generating a searchable body of data representing a plurality of communications, and for facilitating searching of such a body of data. | 06-25-2009 |
Jianmin Huang, Sunnyvale, CA US
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20110010484 | OPTIMIZED PAGE PROGRAMMING ORDER FOR NON-VOLATILE MEMORY - During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages. | 01-13-2011 |
20110099460 | Non-Volatile Memory And Method With Post-Write Read And Adaptive Re-Write To Manage Errors - Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of lower density storage, and a second portion operating with a higher density but less robust storage. Input data is written and staged in the first portion before being copied to the second portion. An error management provides checking the quality of the copied data for excessive error bits. The copying and checking are repeated on a different location in the second portion until either a predetermined quality is satisfied or the number or repeats exceeds a predetermined limit. The error management is not started when a memory is new with little or no errors, but started after the memory has aged to a predetermined amount as determined by the number of erase/program cycling its has experienced. | 04-28-2011 |
20110149650 | Data Transfer Flows for On-Chip Folding - A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the potions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations. | 06-23-2011 |
20110153911 | METHOD AND SYSTEM FOR ACHIEVING DIE PARALLELISM THROUGH BLOCK INTERLEAVING - A method and system for achieving die parallelism through block interleaving includes non-volatile memory having a multiple non-volatile memory dies, where each die has a cache storage area and a main storage area. A controller is configured to receive data and write sequentially addressed data to the cache storage area of a first die. The controller, after writing sequentially addressed data to the cache storage area of the first die equal to a block of the main storage area of the first die, writes additional data to a cache storage area of a next die until sequentially addressed data is written into the cache area of the next die equal to a block of the main storage area. The cache storage area may be copied to the main storage area on the first die while the cache storage area is written to on the next die. | 06-23-2011 |
20110153913 | Non-Volatile Memory with Multi-Gear Control Using On-Chip Folding of Data - A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes. The modes include a first mode, where the binary write operations to the first section of the memory are interleaved with folding operations at a first rate, and a second mode, where the number of folding operations relative to the number of the binary write operations to the first section of the memory are performed at a higher than in the first mode. The memory system then operates according to determined mode. The memory system may also include a third mode, where folding operations are background operations executed when the memory system is not receiving data from the host. | 06-23-2011 |
20110271036 | PHASED NAND POWER-ON RESET - A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold. | 11-03-2011 |
20120005405 | Pre-Emptive Garbage Collection of Memory Blocks - A method and system pre-emptively perform garbage collection operations of a forced amount on update blocks in a memory device. The amount of garbage collection needed by a certain data write is monitored and adjusted to match the forced amount if necessary. Update blocks may be selected on the basis of their recent usage or the amount of garbage collection required. Another method and system may store control information about update blocks in a temporary storage area so that a greater number of update blocks are utilized. The sequential write performance measured by the Speed Class test may be optimized by using this method and system. | 01-05-2012 |
20120281479 | Detection of Broken Word-Lines in Memory Arrays - Techniques and corresponding circuitry are presented for the detection of broken wordlines in a memory array. One example considers an “inter-word-line” comparison where the program loop counts of different word-lines are compared in order to determine whether a word-line may be defective. For example, the number of programming pulses needed for the cells along a word-line WLn is compared to the number needed for a preceding word-line, such as WLn or WL(n−1), to see whether it exceeds this earlier value by a threshold value. If the word-line requires an excessive number of pulses, relative the earlier word-line, to complete programming, it is treated as defective. | 11-08-2012 |
20120284574 | Non-Volatile Memory and Method Having Efficient On-Chip Block-Copying with Controlled Error Rate - A non-volatile memory chip having SLC blocks acting as a write cache for MLC blocks for high density storage requires constant copying or folding of SLC blocks into MLC blocks. To avoid the time-consuming toggling out and in of the pages of the entire SLC block for ECC checking by a controller chip, only a small sample is checked. An optimal read point for reading the memory cells in the sample of the SLC block is dynamically determined by trying different read points so that the data is read within an error budget. Once the optimal read point is determined, it is used to read the entire SLC block without further error checking. Then the SLC block can be copied (blind folded) to the MLC block with the confidence of being within the error budget. | 11-08-2012 |
20120311244 | Balanced Performance for On-Chip Folding of Non-Volatile Memories - A non-volatile memory system receives and stores host data. As the memory system receives host data, it initially writes the data in a binary format and then subsequently performs an on-chip folding operation on the data, storing the data in a multi-state format. The memory system interleaves the phases of the folding operations so that performance is made more uniform across allocation units, where the host stores data according to allocation units. The memory system also can perform the binary and subsequent on-chip folding operations on multiple memory planes in parallel, where the controller also balances the operations so that performance is made more uniform between planes with respect to allocation units as the data is received from the host. To further maintain performance, the memory system uses a free block list having a reserve portion that is only accessible for a specified set of commands. | 12-06-2012 |
20130128666 | Scrub Techniques for Use with Dynamic Read - The decision on whether to refresh or retire a memory block is based on the set of dynamic read values being used. In a memory system using a table of dynamic read values, the table is configured to include how to handle read error (retire, refresh) in addition to the read parameters for the different dynamic read cases. In a refinement, the read case number can used to prioritize blocks selected for refresh or retire. In cases where the read scrub is to be made more precise, multiple dynamic read cases can be applied. Further, which cases are applied can be intelligently selected. | 05-23-2013 |
20130166893 | AUXILIARY CARD INITIALIZATION ROUTINE - A memory system or flash card may be initialized from a protected block of flash memory as a backup process. If there is an error during regular card initialization and the firmware for the card cannot be loaded, the card may be inaccessible to a user. Booting with a protected block of memory may be used to load a different version of the firmware that can still initialize the card despite the error from loading the other firmware. | 06-27-2013 |
20130170301 | Wordline-to-Wordline Stress Configuration - A method and system for performing wordline-to-wordline stress routines on a storage device is disclosed. Stress routines may be performed to reduce state widening in multi-level memory cells in the storage device. However, data retention problems may result if the stress routines are performed too often. In order to perform the stress routines at the proper times, a stress control variable is used. The stress control variable may be indicative of age of the storage device (such as the number of erase cycles performed on a memory block in the storage device). The stress control variable is input to a look-up table (or other logical construct), with the output of the look-up table indicating whether to perform the wordline-to-wordline stress routine. In this way, the stress routines may be performed to reduce state widening while reducing the ill effects of data retention. | 07-04-2013 |
20130205066 | ENHANCED WRITE ABORT MANAGEMENT IN FLASH MEMORY - A memory system or flash card may include safe zone blocks where data is written in case of an error condition, such as a write abort. The system may utilize predetermined risk zones when selecting the data that is written to the safe zone blocks. For example, data written to a lower page may be one example of data that is a predetermined risk. Upon receiving a write command, the data that is written to a lower page may be written to a safe zone either in parallel or after the write operation. | 08-08-2013 |
20130219107 | WRITE ABORT RECOVERY THROUGH INTERMEDIATE STATE SHIFTING - A memory system or flash card may include a multi-level cell block with multiple states. Before the upper page is written, an intermediate state may be shifted to prevent or minimize overlapping of the states from the corresponding lower page. A write abort during the writing of the upper page will not result in a loss of data from the corresponding lower page. | 08-22-2013 |
20130346805 | FLASH MEMORY WITH TARGETED READ SCRUB ALGORITHM - A method and system have been described for counteracting and correcting for read disturb effects in blocks of flash memory. The method may include the step of a controller of the memory system performing a read scrub scan on only a portion of one targeted word line in a block at desired intervals. The controller may calculate whether a read scrub scan is necessary based on a probabilistic determination that is calculated in response to each received host read command. The controller may then place a block associated with the targeted word line into a refresh queue if a number of errors are detected in the targeted word line that meets or exceeds a predetermined threshold. The block refresh process may include copying the data from the block into a new block during a background operation. | 12-26-2013 |
Jim Z. Huang, Sunnyvale, CA US
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20140253150 | Electronic Device With Liquid Contact Sensors - Electronic devices may be accidentally exposed to liquid during operation. To detect liquid intrusion events, an electronic device may be provided with one or more electronic liquid contact sensors. The liquid contact sensors may have electrodes. Control circuitry may make measurements across the electrodes such as resistance and capacitance measurements to detect the presence of liquid. Liquid contact sensor data may be maintained in a log within storage in the electronic device. The liquid contact sensor data can be used to display information for a user of the electronic device or can be loaded onto external equipment for analysis. Liquid contact sensor electrodes may be formed from metal traces on substrates such as printed circuits, from contacts in a connector, from contacts on an integrated circuit, or from other conductive electrode structures. | 09-11-2014 |
Jingyu Huang, Sunnyvale, CA US
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20130251016 | DUAL SQUELCH DETECTORS AND METHODS FOR LOW POWER STATES - Apparatus having corresponding methods comprise: a first squelch circuit configured to detect possible squelch signals in a communication signal; and a second squelch circuit configured to i) operate in a low-power state responsive to the first squelch circuit detecting none of the possible squelch signals in the communication signal, and ii) operate in a high-power state responsive to the first squelch circuit detecting one of the possible squelch signals in the communication signal. | 09-26-2013 |
Jiong Huang, Sunnyvale, CA US
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20120236949 | CONVERSION OF MULTIMEDIA DATA STREAMS FOR USE BY CONNECTED DEVICES - Embodiments of the invention are generally directed to conversion of multimedia data streams for use by connected devices. An embodiment of a method for processing data includes receiving a data stream in a first multimedia data format at a first device, and inserting a replacement video portion into the received data stream to generate a modified multimedia data stream in a second multimedia data format. The modified data stream is provided to a second device coupled to the first device. | 09-20-2012 |
20140204222 | MECHANISM FOR FACILITATING DYNAMIC PHASE DETECTION WITH HIGH JITTER TOLERANCE FOR IMAGES OF MEDIA STREAMS - A mechanism for facilitating dynamic phase detection with high jitter tolerance for images of media streams is described. In one embodiment, a method includes calculating stability optimization of an image of a media stream based on a plurality of pixels of two or more consecutive frames relating to a plurality of phases of the image, calculating sharpness optimization of the image, and selecting a best phase of the plurality of phases based on the stability and sharpness optimization of the image. The best phase may represent the image such that the image is displayed in a manner in accordance with human vision perceptions. | 07-24-2014 |
20150097972 | Mechanism for Facilitating Dynamic Phase Detection With High Jitter Tolerance for Images of Media Streams - A mechanism for facilitating dynamic phase detection with high jitter tolerance for images of media streams is described. In one embodiment, a method includes calculating stability optimization of an image of a media stream based on a plurality of pixels of two or more consecutive frames relating to a plurality of phases of the image, calculating sharpness optimization of the image, and selecting a best phase of the plurality of phases based on the stability and sharpness optimization of the image. The best phase may represent the image such that the image is displayed in a manner in accordance with human vision perceptions. | 04-09-2015 |
20160062937 | Arbitration Signaling within a Multimedia High Definition Link (MHL 3) Device - An apparatus for interfacing with a multimedia communication link comprises a half-duplex translation layer circuit operating in half-duplex and a full-duplex link layer circuit to communicate over a control bus of the multimedia communication link in full duplex. The apparatus further comprises an arbitration circuit communicatively coupled between the half-duplex translation layer circuit and the full-duplex link layer circuit, the arbitration circuit to control data flow between the half-duplex translation layer circuit and the full-duplex link layer circuit. The arbitration circuit provides interface and signaling rules for transmitting packets from the half-duplex translation layer circuit to the full-duplex link layer circuit, receiving packets via the full-duplex link layer circuit at the half-duplex translation layer circuit, and resolving conflict arising due to bidirectional data flow at the arbitration logic. | 03-03-2016 |
20160065353 | Phase Relationship Control for Control Channel of a Multimedia Communication Link - A multimedia system for data communications. A source device communicates over a full duplex control channel of a multimedia communication link using time domain multiplexed (TDM) frames having n time slots per frame. The source device allocates a first time slot position to a virtual channel for data transmission by the source device over the full duplex control channel. A sink device communicates over the full duplex control channel of the multimedia communication link. The sink device allocates a second time slot position to the virtual channel for data transmission by the sink device over the full duplex control channel. A timing of the second time slot position is offset from a timing of the first time slot position by substantially n/2 time slots. | 03-03-2016 |
20160065354 | Retry Disparity for Control Channel of a Multimedia Communication Link - A multimedia system for data communications. A source device communicates data over a full duplex control channel of a multimedia communication link. The source device has a first link layer that retries unsuccessful data communications over the full duplex control channel until a first maximum retry limit of the first link layer is reached. A sink device communicates data over the full duplex control channel of the multimedia communication link. The sink device has a second link layer that retries unsuccessful data communications over the full duplex control channel until a second maximum retry limit of the second link layer is reached, where the second maximum retry limit is different than the first maximum retry limit. | 03-03-2016 |
20160065356 | Inter-device Conflict Resolution on a Multimedia Link - A source device communicates multimedia data to a sink device over a multimedia channel of a multimedia link. The source device comprises an interface to a full duplex control channel of the multimedia link. The source device also comprises first arbitration logic to control transfer of control data with the sink device via the full duplex control channel. The first arbitration logic ignores requests to receive inbound control data from the sink device while the source device is transmitting outbound control data to the sink device. The sink device, on the other hand, comprises second arbitration logic to control transfer of control data with the source device via the full duplex control channel. The second arbitration logic stops transmitting outbound control data via the full duplex control channel responsive to receiving a request to receive incoming control data from the source device. | 03-03-2016 |
20160072601 | Enhanced Communication Link Using Synchronization Signal as Link Command - A system communicating over a full duplex control channel of a multimedia communication link by using synchronization signals that may also function as a logical link command. Synchronization indicators are exchanged between two communicating devices for maintaining synchronization of a logical link. At least two different types of synchronization signals may be sent between the two devices as synchronization indicators. A first synchronization signal is used by default to maintain synchronization of a logical link. A second synchronization signal is used in place of the first synchronization signal to maintain synchronization of the logical link. The second synchronization signal may be used to imply a virtual link command to indicate that a device is ready to receive data or has successfully received data over the virtual link. | 03-10-2016 |
John Huang, Sunnyvale, CA US
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20140379490 | Attribution Marketing Recommendations - The present disclosure includes systems and techniques relating to identifying value marketing activities. In some implementations, an apparatus, systems, or methods can include receiving conversion path information including data relating to user interactions with a content item associated with a marketing activity, determining a first attribution credit by applying a first attribution model to the received information, and a second attribution credit by applying a second attribution model to the received information, determining an attribution contrast ratio based on the first and second attribution credit, identifying an opportunity based on the determined attribution contrast ratio, and presenting a recommendation for the marketing activity based on the identified opportunity. | 12-25-2014 |
John Chih Chang Huang, Sunnyvale, CA US
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20150161652 | METHODS AND SYSTEMS FOR DISPLAYING ATTRIBUTION CREDIT DATA BASED ON PARAMETERS - Methods and systems for providing for display attribution data associated with one or more events are disclosed. Processor identifies channels from paths including events corresponding to position data identifying a position along the path at which the event was performed. Processor determines attribution credits assigned to each event included in the paths corresponding to the channel. Processor determines a number of attribution credits assigned to the channel. Processor identifies, from the paths, a plurality of event-position pairs. Each event-position pair corresponds to events that correspond to a respective channel and are performed at a respective position of the plurality of paths corresponding to the event-position pair. Processor determines, for each identified event-position pair, a weighting based on an aggregate of the attribution credits assigned to the events to which the event-position pair corresponds. Processor provides, for display, a visual object including an indicator to display the determined weightings. | 06-11-2015 |
20150363051 | RADIAL DISPLAY GENERATION AND INTERACTIVE SYSTEM - A visual display and interactive system for displaying data describing sequences and patterns which contain entities (e.g., search terms or keywords from web searches) may be provided to analyze the sequences. A generated visual display may include a radial display with a dimension that is fixed and all sequences of entities of that dimension are used in generating the radial display, such as all conversion path sequences. Such a radial display may be used for visual searching and/or viewing the impact of certain entities, such as search terms, keywords, campaigns, etc. that lead to a desired action, such as a conversion action. The interactive system may include a radial sunburst diagram and a breadcrumb area that can selectively display drilldown information. The interface may be interacted with to display further information via selection of a conversion path prefix via mouseover (e.g., hover) and/or selecting an entity via mouse click. | 12-17-2015 |
Jonathan Huang, Sunnyvale, CA US
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20150188991 | SIMULATED TETHERING OF COMPUTING DEVICES - Various aspects of the subject technology relate to systems, methods, and machine-readable media for simulating tethering of computing devices. A system is configured to updating, via communications with a server over a network, application data stored in a memory and receiving, from an offline device, a request for application data for a second application running on the offline device. In response to receiving the request, the system transmits, to the offline device, the application data requested for the first application running on the virtual tethering device, wherein the application data is configured to be used by the second application data running on the offline device. | 07-02-2015 |
20150373561 | AUTOMATICALLY UPDATING AN ACCESS POINT - A method for seamlessly and automatically updating an access point or router. The method includes receiving an update for the access point and determining a status of a network traffic associated with the access point. The method further includes determining an update time for applying the update based on the determined status of the network traffic and applying the update to the access point at the determined update time. An access point receives an update for the access point, and waits for a time to apply the update. The access point waits until there is no interactive traffic in which a user is actively using the network. The access point applies the update and reboots. By waiting until there is no interactive traffic, the update process mitigates interruptions to the user's active use of the network. | 12-24-2015 |
20150382215 | END-TO-END NETWORK DIAGNOSTICS - A system and machine-implemented method of network diagnostics are provided. First condition information about a wireless local area network is obtained. Second condition information about an access network connecting the wireless local area network to a wide area network is obtained. Third condition information about the wide area network is obtained. Based on the first, second and third condition information, a condition report is provided to a diagnostic module configured to identify one or more network issues across the wireless local area network, the access network and the wide area network based on the condition report. | 12-31-2015 |
20160006739 | WIRELESS LOCAL AREA NETWORK ACCESS - A system and machine-implemented method of wireless network access are provided. An authentication request comprising credentials for a user account of a cloud-based service is received from a wireless client device. The authentication request is forwarded to a server associated with the cloud-based service for authentication of the user account credentials. A list of one or more network identifiers corresponding to networks for which access by the user account of the cloud-based service is authorized is received from the server. The received list of one or more network identifiers is sent to the wireless client device, wherein the received list of one or more network identifiers is sent to the wireless client device prior to the wireless client device being associated with the wireless local area network. | 01-07-2016 |
Jonathan J. Huang, Sunnyvale, CA US
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20100079310 | ADAPTIVE KEYBOARD FOR ULTRA-MOBILE DEVICES - A method is provided. The method includes receiving inputs typed by a user of a keyboard and analyzing the inputs to identify typing errors made by the user. The method also includes customizing a layout of the keyboard to reduce the identified typing errors. | 04-01-2010 |
20100332668 | Multimodal proximity detection - Systems and methods for proximity detection between electronic devices are disclosed. One or more electronic devices transmit signals to a proximity server, which determines whether the first electronic device may be proximate the second electronic device. The proximity server transmits a signal to the first electronic device and the second device, and in response to the signal, the first and second electronic devices activate an environmental sensor, collect at least one sample of environmental data, extract at least one feature set of the environmental data, generate a first obscured feature from the feature set, transmit the first and second obscured feature sets to the proximity server. The proximity server uses the first obscured feature set and the second obscured feature set to determine whether the first electronic device and the second electronic device are proximate. | 12-30-2010 |
Ke Huang, Sunnyvale, CA US
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20130325603 | PROVIDING ONLINE CONTENT - Systems and methods for providing online content include determining the likelihood of an online event occurring regarding the content. A likelihood value may be generated by analyzing history data indicative of one or more online events to identify content presentations and content interactions. Content presentations and content interactions may be grouped by topical category, in some implementations. | 12-05-2013 |
Lehan Huang, Sunnyvale, CA US
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20110088586 | Velocity control and terrain selection for gravity moderation - A system, method, and apparatus is described for providing a reduced or moderated gravity environment in a terrestrial payload. The system includes the evaluation of terrain to support an appropriately shaped vehicle guide, the construction of a vehicle guide, the provision of a high-speed vehicle and a control system adapted to control a motion of the vehicle across the vehicle guide with a specific velocity profile so as to produce a moderated gravity environment. | 04-21-2011 |
Qifan Huang, Sunnyvale, CA US
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20080309817 | COMBINED SCALING, FILTERING, AND SCAN CONVERSION - Techniques for performing combined scaling, filtering, and/or scan conversion are disclosed that reduce the amount of line buffer space required in the overall design of a video processing system. In particular, coefficients from all or a sub-set of the scaling, filtering (smoothing/sharpening), and scan conversion filters are combined into one representative coefficient that can be applied in a single generic algorithm. Thus, implementation costs are reduced, particularly in a system-on-chip implementations. | 12-18-2008 |
20090268086 | METHOD AND SYSTEM FOR SCALING, FILTERING, SCAN CONVERSION, PANORAMIC SCALING, YC ADJUSTMENT, AND COLOR CONVERSION IN A DISPLAY CONTROLLER - Techniques for performing panoramic scaling are disclosed that reduce visible distortion in a panoramic image. Further, techniques for performing combined YC adjustment and color conversion are disclosed that reduce the size and power requirements of video manipulation hardware by reducing the number of logic gates and memory buffers required when YC adjustment and color conversion are implemented as separate operations. | 10-29-2009 |
Qinping Huang, Sunnyvale, CA US
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20090070638 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 03-12-2009 |
20090070733 | METHOD AND SYSTEM FOR PROBLEM NOTIFICATION AND PROCESSING - A notification of a problem associated with an application may be received. A difference may be determined between a problem version of the application and an operational version of the application to identify a change associated with the problem. A person associated with the change may be determined. A task of resolving the problem may be assigned to the person associated with the change. A person may be notified of the problem and of the assigning of the task based on the identified change. A modification may be performed to resolve the problem associated with the change based on the determining of the difference. | 03-12-2009 |
20110055640 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 03-03-2011 |
20130219375 | METHOD AND SYSTEM FOR PROBLEM NOTIFICATION AND PROCESSING - A notification of a problem associated with an application may be received. A difference may be determined between a problem version of the application and an operational version of the application to identify a change associated with the problem. A person associated with the change may be determined. A task of resolving the problem may be assigned to the person associated with the change. A person may be notified of the problem and of the assigning of the task based on the identified change. A modification may be performed to resolve the problem associated with the change based on the determining of the difference. | 08-22-2013 |
20150154063 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 06-04-2015 |
Renxiang Huang, Sunnyvale, CA US
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20100017685 | ADAPTIVE ERROR CORRECTION - A transmitter generates error correction data according to an error correction scheme that logically arranges the communication data in a number of rows and a number of columns. The transmitter transmits the communication data and the error correction data. A receiver receives the communication data and the error correction data. The receiver processes the error correction data to correct errors in the communication data. The receiver generates information regarding the errors in the communication data. The transmitter processes the information to alter at the number of rows and/or the number of columns. | 01-21-2010 |
Shawn Huang, Sunnyvale, CA US
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20110088586 | Velocity control and terrain selection for gravity moderation - A system, method, and apparatus is described for providing a reduced or moderated gravity environment in a terrestrial payload. The system includes the evaluation of terrain to support an appropriately shaped vehicle guide, the construction of a vehicle guide, the provision of a high-speed vehicle and a control system adapted to control a motion of the vehicle across the vehicle guide with a specific velocity profile so as to produce a moderated gravity environment. | 04-21-2011 |
Shin-Yi Huang, Sunnyvale, CA US
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20150193122 | SYSTEMS AND METHODS FOR DELIVERING TASK-ORIENTED CONTENT - Various embodiments of the present disclosure relate to systems and methods for delivering various types of content (such as news articles) to users. Among other things, embodiments of the present disclosure help provide users with concise articles containing the best content from a variety of sources, and present such content in a task-oriented manner that is finite and incentivizes the user to review the content. | 07-09-2015 |
20160077684 | SYSTEMS AND METHODS FOR DISPLAYING AN EXPANDING MENU VIA A USER INTERFACE - Various embodiments of the present disclosure relate to systems and methods for presenting content to users using expanding menus. Among other things, the expanding menus allow a range of categories of content to be simultaneously presented to a user on a display, even on smaller devices where display space is at a premium. | 03-17-2016 |
Victoria E. Huang, Sunnyvale, CA US
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20100021587 | VARIANTS OF BACILLUS sp. TS-23 ALPHA-AMYLASE WITH ALTERED PROPERTIES - Variants of | 01-28-2010 |
Wei-Lun Huang, Sunnyvale, CA US
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20140362807 | Wireless Services Gateway - A system for integrating wireless service providers' core networks with Wi-Fi radios using a Wireless Services Gateway (WSG). The WSG can allow wireless device users to seamlessly connect to a network such as the internet using both cellular phone antennae as well as Wi-Fi radio antennae while still utilizing their preferred wireless service provider's core network system of billing, authenticating and policy decision making. This system can allow for data transmission of wireless devices through Wi-Fi instead of through cellular antennae, thus increasing bandwidth and data transmission rates. | 12-11-2014 |
Weiqing Huang, Sunnyvale, CA US
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20090254972 | Method and System for Implementing Changes to Security Policies in a Distributed Security System - Improved approaches for effectuating changes to security policies in a distributed security system are disclosed. The changes to security policies are distributed to those users (e.g., user and/or computers) in the security system that are affected. The distribution of such changes to security policies can be deferred for those affected users that are not activated (e.g., logged-in or on-line) with the security system. | 10-08-2009 |
Xiangdong G. Huang, Sunnyvale, CA US
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20140052844 | MANAGEMENT OF A VIRTUAL MACHINE IN A STORAGE AREA NETWORK ENVIRONMENT - A computer-implemented method for management of a virtual machine in a storage area network (SAN) environment. A plurality of SAN devices for the virtual machine are discovered by a management server. Performance statistics for the plurality of SAN devices are monitored at the management server. Health of the virtual machine is determined based at least in part on the performance statistics for the plurality of SAN devices at the management server. | 02-20-2014 |
20140052845 | DISCOVERY OF STORAGE AREA NETWORK DEVICES FOR A VIRTUAL MACHINE - A computer-implemented method for discovering a plurality of storage area network (SAN) devices for a virtual machine. At a SAN device of the plurality of SAN devices, physically adjacent SAN devices connected to the SAN device are discovered. The physically adjacent SAN devices connected to the SAN device are registered at a name server. | 02-20-2014 |
Xiaojun Huang, Sunnyvale, CA US
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20130115194 | HEPATITIS C VIRUS INHIBITORS - The invention provides compounds of formula (I): | 05-09-2013 |
20130295048 | CRYSTALLINE FORM OF A PYRIDYL-PIPERAZINYL HEPATITIS C VIRUS INHIBITOR - The invention provides crystalline solid forms of (((S)-1-{(S)-2-[4-(4′-{[6-((2R,5S)-2,5-dimethyl-4-methylcarbamoyl-piperazin-1-yl)-pyridine-3-carbonyl]-amino}-2′-trifluoromethoxy-biphenyl-4-yl)-1H-imidazol-2-yl]-pyrrolidine-1-carbonyl}-2-methyl-propyl)-carbamic acid methyl ester. The invention also provides pharmaceutical compositions comprising such crystalline solid forms, methods of using such crystalline solid forms to treat hepatitis C virus infection, and processes useful for preparing such crystalline solid forms. | 11-07-2013 |
Zhiheng Huang, Sunnyvale, CA US
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20140207703 | System and Method for Providing Transit Reviews - A social transit review platform allows a user to create and share a transit review from a first subject to a second subject; the first and second subject being any product, service, venue, etc. The user first creates a personal user account, through which the transit review can be created. Upon creating the transit review, the user can also provide a first subject review or a second subject review for the first subject and second subject, respectively. Comparative review data is then provided by the user to describe the transition from the first subject to the second subject. The first subject review, second subject review, and comparative review data are then organized into the transit review and displayed to other users. A quick transit review can also be generated, to display a number of positive transit reviews and a number of negative transit reviews for a collection of transit reviews. | 07-24-2014 |
20150325236 | CONTEXT SPECIFIC LANGUAGE MODEL SCALE FACTORS - The customization of recognition of speech utilizing context-specific language model scale factors is provided. Training audio may be received from a source in a training phase. The received training audio may be recognized utilizing acoustic and language models being combined utilizing static scale factors. A comparison may then be made of the recognition results to a transcription of the training audio. The recognition results may include one or more hypotheses for recognizing speech. Context specific scale factors may then be generated based on the comparison. The context specific scale factors may then be applied for use in the speech recognition of audio signals in an application phase. | 11-12-2015 |