Patent application number | Description | Published |
20080278540 | ATMOSPHEREIC PLASMA INKJET PRINTING APPARATUSES AND METHODS FOR FABRICATING COLOR FILTER USING THE SAME - Atmospheric plasma inkjet printing apparatus and methods for fabricating color filters using the same. The atmosphere plasma inkjet printing apparatus includes a nozzle plate having a first column of nozzles and a second column of nozzles. An inkjet printhead module corresponds to the first column of nozzles. An atmospheric plasma module is corresponds to the second column of nozzles. | 11-13-2008 |
20090073205 | INKJET APPARATUS AND CALIBRATION METHODS THEREOF - An Inkjet apparatus is provided. An Inkjet apparatus includes a piezoelectric inkjet print head, a plurality of driving unit, a detection unit and a control unit. The piezoelectric inkjet print head comprises a plurality of nozzles, wherein each the nozzle outputs an ink drop according to a driving voltage. The driving unit generates the driving voltage according to a control signal. The detection unit detects a state of the ink drop corresponding to the nozzle to generate a detection signal. The control unit generates the control signal to control the driving voltage according to the detection signal. | 03-19-2009 |
20100110343 | BI-STABLE DISPLAY SYSTEMS AND DRIVING METHODS THEREOF - Bi-stable display systems and driving methods thereof are presented. The bi-stable display system includes a bi-stable display panel having at least one substrate, at least one electrode disposed on the substrate, and a bi-stable display medium between the at least one electrode, wherein the at least one electrode extends to pluralities of electrode pads on the at least one side of peripheral regions. A data input device for inputting display data to the bi-stable display panel includes a plurality of input terminals corresponding to the electrode pads of the bi-stable display panel. A trigger device detects relative movement between the bi-stable display panel and the data input device and generates a trigging signal to shift data address in a data shifter, thereby renewing image data in the bi-stable display panel. | 05-06-2010 |
20100128341 | COLOR ELECTROWETTING DISPLAY (EWD) DEVICES - Electrowetting display devices are presented. The electrowetting display includes a first substrate and an opposing second substrate with a polar fluid layer and a color non-polar fluid layer interposed therebetween. A first transparent electrode is disposed on the first substrate. A second electrode is disposed on the second substrate. A hydrophilic partition structure is disposed on the second substrate, thereby defining a plurality of sub-pixels. The color electrowetting display further includes an array of color pixel regions. Each pixel region consists of a set of primary color sub-pixel. Each color sub-pixel corresponds to one of different color non-polar fluid layers, and each of the different color non-polar fluid layers is isolated from each other. The colors of non-polar fluid layer in the neighboring sub-pixels are different. | 05-27-2010 |
20100317250 | METHOD OF FABRICATING A COLOR BACKLIGHT DEVICE - A color backlight device and fabrication method thereof is provided. A surface conduction emitter display with more than one color serves as the color backlight device. The color backlight device can be used in a liquid crystal display (LCD) to obviate the use of a color filter. The disclosure also provides a color display control method of the LCD and a pixel arrangement method of the color backlight device. | 12-16-2010 |
20110050667 | MULTISTABLE DISPLAY SYSTEM AND METHOD FOR WRITING IMAGE DATA ON MULTISTABLE DISPLAY - A multistable display system includes a multistable display, a writehead, and a sensor. The writehead includes a plurality of electrodes for writing the pixels of the multistable display, wherein each of the pixels corresponds to at least two of the electrodes. The sensor can detect the position of the writehead relative to the multistable display. The electrodes are charged with driving voltage signals according to the relative position between the multistable display and the writehead for updating the pixels of the multistable display. | 03-03-2011 |
Patent application number | Description | Published |
20110242031 | DISPLAY DEVICE WITH TOUCH FUNCTION AND 2D SENSING METHOD THEREOF - A display device with a touch function is provided. The display device includes a display panel and a touch panel. The display panel has a plurality of image scan lines, and the image scan lines are respectively activated by a plurality of scan signals generated by a gate driver according to a time sequence. The touch panel has a plurality of touch scan lines and a plurality of touch sensing lines, wherein the touch scan lines and the touch sensing lines are disposed crossing each other for sensing a touched position. The gate driver also provides a plurality of touch scan signals to the touch scan lines according to a time sequence. | 10-06-2011 |
20110316792 | Driving Method, Driving Device and Touch Sensitive Display Device Using the Same - A driving method for driving a touch sensitive display device is disclosed. The touch sensitive display device includes a plurality of pixel units and a plurality of touch sensors both arranged in matrixes. The driving method includes generating a plurality of source driving signals according to an image signal to indicate color intensities of the plurality of pixel units, generating a plurality of scanning impulses according to a synchronization signal to indicate an updating sequence of the plurality of pixel units, and shrinking duty cycles of the plurality of scanning impulses to generate a plurality of sensor scanning impulses for triggering the plurality of touch sensors. | 12-29-2011 |
20120019454 | Driving Method, Driving Device and Touch Sensitive Display Device Using the Same - A driving method for driving a touch sensitive display device which includes a substrate, a plurality of pixel units, a touch panel and a plurality of touch sensors, and displays a frame of a video and detects at least one touch point per vertical scanning period is disclosed. The driving method includes generating a plurality of touch scanning impulses in a non-display period of the vertical period, detecting the at least one touch point according to the plurality of touch scanning impulses in the non-display period, generating a plurality of scanning impulses according to a synchronization signal in a display period of the vertical scanning period to indicate a frame updating sequence of the plurality of pixel units, and generating a plurality of source driving signals according to frame data in the display period to indicate color intensities of the plurality of pixel units. | 01-26-2012 |
20120319665 | FAST RESPONSE CURRENT SOURCE - A fast response current source capable of providing an output current is disclosed. The fast response current source includes a constant current generating block, a first feedback capacitor, a first current buffer and a first output current generating block. The constant current generating block provides a first constant current. The first current buffer generates a first buffering current to flow through the first feedback terminal, and changes a current value of the first buffering current in response to the current variation at the first feedback terminal when the voltage at the output terminal is varied. The first output current generating block generates a first output current to flow through the output terminal, and changes a current value of the first output current in response to the variation of the first buffering current when the voltage at the output terminal is varied. | 12-20-2012 |
20130179745 | TEST INTERFACE CIRCUIT FOR INCREASING TESTING SPEED - A test interface circuit couplable between a source driver and test equipment is disclosed. The test interface circuit includes a plurality of test interface modules and a logic circuit. Each of the test interface modules receives an output signal from one of a plurality of output pins of the source driver, judges whether the received output signal falls in a specified range or not, and generates a deviation signal accordingly. The logic circuit generates a deviation test output signal according to the deviation signals generated by the test interface modules. | 07-11-2013 |
20130221942 | MULTI-POWER DOMAIN OPERATIONAL AMPLIFIER AND VOLTAGE GENERATOR USING THE SAME - A multi-power domain operational amplifier includes an input stage circuit, a power domain transforming circuit and an active load. The input stage circuit is configured to transform a set of input voltages into a set of input currents in a first power domain. The power domain transforming circuit is configured to transform the set of input currents into a set of output currents in a second power domain. The active load is configured to generate an output voltage according to the set of output currents. A common mode range of the output voltage is shifted as compared with a common mode range of the set of input voltages. | 08-29-2013 |
20130285704 | BRIDGE INTEGRATED CIRCUIT - A bridge integrated circuit adapted for being coupled between a gate driver and a tester is provided. The bridge integrated circuit comprises a plurality of first detection units and a logic unit. Each first detection unit determines whether a corresponding gate driving signal satisfies a first standard according to one of the gate driving signals provided by the gate driver and accordingly generates a first detection signal according to the determination result. The logic unit is coupled to the first detection units and generates a test result signal in response to the first detection signal provided by each first detection unit. The test result signal is adapted for the tester. | 10-31-2013 |
20140077789 | Bandgap Reference Circuit and Self-Referenced Regulator - The present invention discloses a bandgap reference circuit. The bandgap reference circuit includes an operational transconductance amplifier, and a reference generation circuit. The operational transconductance amplifier includes a self-biased operational transconductance amplifier, for utilizing an area difference between bipolar junction transistors of an input pair to generate a first positive temperature coefficient current to bias the input pair, and generating a positive temperature coefficient control voltage and a negative temperature coefficient control voltage; and a feedback voltage amplifier, for amplifying the negative temperature coefficient control voltage, and outputting a reference voltage to the input pair for feedback, to generate a first negative temperature coefficient current. The reference generation circuit generates a summation voltage or a summation current according to the positive temperature coefficient control voltage and the negative temperature coefficient control voltage. | 03-20-2014 |
20140091780 | REFERENCE VOLTAGE GENERATOR - A reference voltage generator including a reference voltage generating unit is provided. The reference voltage generating unit receives a first bias voltage current and a first mirror current and generates a reference voltage. The reference voltage generating unit includes a first metal-oxide-semiconductor (MOS) transistor, a second MOS transistor, a first impedance providing element and a second impedance providing element. The first and the second MOS transistors operate in a sub-threshold region so as to generate a first gate-source voltage and a second gate-source voltage having a negative temperature coefficient. The first impedance providing element is configured to generate a first current having a positive temperature coefficient. The second impedance providing element is configured to generate a first voltage having a negative temperature coefficient at its first terminal. The reference voltage is equal to a sum of the second gate-source voltage and the first voltage. | 04-03-2014 |
20140306676 | COMPENSATION MODULE and VOLTAGE REGULATOR - A compensation module for a voltage regulation device having a gain stage, an output stage and a miller compensation module includes a low-output-impedance non-inverting amplifier unit coupled to a gain output of the gain stage and an output-stage input of the output stage. | 10-16-2014 |
20150042297 | Voltage Converting Device and Electronic System thereof - A voltage converting device with a self-reference feature for an electronic system includes a differential current generating module, implemented in a Complementary metal-oxide-semiconductor (CMOS) processing for generating a differential current pair according to a converting voltage; and a voltage converting module, coupled to the differential current generating module, a first supply voltage and a second supply voltage of the electronic system for generating the converting voltage according to the differential current pair, the first supply voltage and the second supply voltage. | 02-12-2015 |
20150061629 | MULTI-POWER DOMAIN OPERATIONAL AMPLIFIER AND VOLTAGE GENERATOR USING THE SAME - A multi-power domain operational amplifier includes an input stage circuit, a power domain transforming circuit and an active load. The input stage circuit is configured to transform a set of input voltages into a set of input currents in a first power domain. The power domain transforming circuit is configured to transform the set of input currents into a set of output currents in a second power domain. The active load is configured to generate an output voltage according to the set of output currents. A common mode range of the output voltage is shifted as compared with a common mode range of the set of input voltages. | 03-05-2015 |
Patent application number | Description | Published |
20090147836 | METHOD FOR FREQUENCY OFFSET ESTIMATION AND AUTOMATIC FREQUENCY CONTROL FOR FILTERED SIGNAL WITH DESTROYED PHASE INFORMATION AND SIGNAL TRANSCEIVER - The invention provides a method for frequency offset estimation according to a filtered signal with destroyed phase information. In one embodiment, a filter filters an original signal according to a series of first filter coefficients to obtain a first-channel component of the filtered signal, and filters the original signal according to a series of second filter coefficients to obtain a second-channel component of the filtered signal. A series of third filter coefficients are first derived from the first filter coefficients. The original signal is then filtered according to the third filter coefficients to obtain a reference signal. A first frequency offset value is estimated according to the first-channel component of the filtered signal and the reference signal, wherein the first-channel component of the filtered signal is a first-channel component of an artificial signal, and the reference signal is a second-channel component of the artificial signal. | 06-11-2009 |
20090245428 | METHOD AND APPARATUS FOR PROCESSING COMMUNICATION SIGNAL - Methods and apparatuses process a communication signal to detect a burst packet comprising an access code. The method comprises deriving a differential phase signal indicating differential phases of a first set of the access code in the communication signal, and comparing the differential phase signal with an ideal differential phase signal to calculate a frequency offset value, compensating the differential phase signal by the frequency offset value to generate a compensated differential phase signal, and detecting a burst packet transmitted via the communication signal according to the compensated differential phase signal. | 10-01-2009 |
20090310717 | SIGNAL CONVERTERS - A signal converter. The signal converter converts an analog inphase signal and an analog quasdrature phase signal into a digital baseband inphase signal and a digital baseband quadrature phase signal. The analog inphase signal and the analog quadrature phase signal are orthogonal to each other and are carried in a predetermined intermediate frequency. The digital baseband inphase signal and the digital baseband quadrature phase signal are carried in zero frequency. The signal converter comprises a signal combiner combining the analog inphase signal and the analog quadrature phase signal to obtain an analog combined signal, an analog to digital converter converting the analog combined signal to a digital combined signal, and a signal separator separating the digital combined signal to obtain the digital baseband inphase signal and the digital baseband quadrature phase signal. | 12-17-2009 |
20120269292 | RF TRANSMITTER, INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR - A radio frequency (RF) transmitter including at least one digital signal processing module is described. The at least one digital signal processing module is arranged to receive a complex digital input signal, successively apply pre-distortion to the received complex digital input signal with a progressively finer granularity, simultaneously progressively increase a sampling rate of the received complex digital input signal, and output a first, in-phase digital control word and a second, quadrature, digital control word for controlling at least one digital power amplifier component to generate an RF signal representative of the received complex digital input signal. | 10-25-2012 |
20130094375 | METHODS AND APPARATUSES FOR DETECTING TRANSMISSION COLLISION AND/OR ALLEVIATING TRANSMISSION COLLISION - A method for detecting a transmission collision between a first wireless communication terminal and a second wireless communication terminal includes the following steps: when one retry packet transmitted from the first wireless communication terminal is received by the second wireless communication terminal, checking if at least one transmission collision condition is met and accordingly generating a checking result; deriving statistic data from a plurality of checking results generated in response to a plurality of retry packets transmitted from the first wireless communication terminal; and detecting the transmission collision between the first wireless communication terminal and the second wireless communication terminal according to the statistic data. | 04-18-2013 |
20140119416 | COMMUNICATION SYSTEM WITH UP-CONVERTER AND DIGITAL BASEBAND PROCESSING CIRCUIT IMPLEMENTED IN ONE DIE SEPARATED FROM ANOTHER DIE HAVING DOWN-CONVERTER, AND RELATED COMMUNICATION METHOD THEREOF - One communication system includes a first die, a second die and a front-end circuit. The first die has an up-converter and a digital baseband (DBB) processing circuit. The second die has a down-converter. The front-end circuit couples an antenna to the first and second dies. Another exemplary communication system includes a first die, a second die and a front-end circuit. The first die performs digital baseband (DBB) processing, and generates a first signal with a higher frequency according to a second signal, wherein the second signal is derived from an output signal of the DBB processing. The second die generates a third signal with a lower frequency according to a fourth signal. The front-end circuit couples the first signal from the first die to an antenna and couples the fourth signal from the antenna to the second die. | 05-01-2014 |
20140293969 | UTILIZATION OF REDUNDANT INDICATION FIELD - A method of utilizing same indication fields of time slots for different purposes includes: transmitting an indication signal in an indication field of at least one first time slot on a dedicated physical channel (DPCH); and transmitting at least one known symbol in an indication field of at least one second time slot on the DPCH, wherein the known symbol is arranged for estimating channel characteristics. | 10-02-2014 |
20140314184 | WIRELESS TRANSMITTER FOR MULTI-MODE CONCURRENT TRANSMISSION OF SIGNALS COMPLYING WITH DIFFERENT COMMUNICATION STANDARDS - A wireless transmitter has a digital baseband module and a radio-frequency (RF) transmitter. The digital baseband module generates a multi-mode modulated signal by using a plurality of digital synthesizers. The RF transmitter has a frequency synthesizer and a digital power amplifier (DPA). The frequency synthesizer generates an oscillation signal with an RF carrier frequency. The DPA generates a multi-standard RF signal according to the multi-mode modulated signal and the oscillation signal. | 10-23-2014 |
Patent application number | Description | Published |
20100052063 | METHOD TO IMPROVE DIELECTRIC QUALITY IN HIGH-K METAL GATE TECHNOLOGY - The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first capping layer and a second capping layer over the high-k dielectric layer, the first capping layer overlying the first region and the second capping layer overlying the second region, forming a layer containing silicon (Si) over the first and second capping layers, forming a metal layer over the layer containing Si, and forming a first gate stack over the first region and a second gate stack over the second active region. The first gate stack includes the high-k dielectric layer, the first capping layer, the layer containing Si, and the metal layer and the second gate stack includes the high-k dielectric layer, the second capping layer, the layer containing Si, and the metal layer. | 03-04-2010 |
20130119485 | Transistor Performance Improving Method with Metal Gate - The present disclosure provides a method for making a semiconductor device having metal gate stacks. The method includes forming a high k dielectric material layer on a semiconductor substrate; forming a first metal layer on the high k dielectric material layer; forming a silicon layer on the first metal layer; patterning the silicon layer, the first metal layer and the high k dielectric material layer to form a gate stack; and performing a silicidation process to fully change the silicon layer into a silicide electrode. | 05-16-2013 |
Patent application number | Description | Published |
20090206057 | Method To Improve Mask Critical Dimension Uniformity (CDU) - A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate. | 08-20-2009 |
20100013105 | METHOD OF MANUFACTURING PHOTOMASK AND METHOD OF REPAIRING OPTICAL PROXIMITY CORRECTION - A method of manufacturing a photomask is described. The graphic data of the photomask are provided, and than an optical proximity correction is performed to the graphic data. A process rule check is then performed to the graphic data with the optical proximity correction. When at least one failed pattern not passing the process rule check is found in the graphic data, a repair procedure is performed only to the failed pattern so that the failed pattern can pass the process rule check. The patterns of the photomask are then formed according to the corrected and repaired graphic data. | 01-21-2010 |
20100053575 | Thermal Control For EUV Lithography - A method of patterning an integrated circuit including generating a thermal profile of a reticle is provided. The thermal profile of the reticle may illustrate heat accumulation (e.g., a temperature) in a EUV reticle due an incident EUV radiation beam. The thermal profile may be determined using the pattern density of the reticle. The reticle is irradiated with a radiation beam having an extreme ultraviolet (EUV) wavelength. A thermal control profile may be generated using the thermal profile, which may define a parameter of the lithography process such as, a temperature gradient of a thermal control chuck. The thermal control profile may be downloaded to the EUV lithography tool (e.g., scanner or stepper) for use in a process. A separate thermal control profile may be provided for different reticles. | 03-04-2010 |
20100308439 | DUAL WAVELENGTH EXPOSURE METHOD AND SYSTEM FOR SEMICONDUCTOR DEVICE MANUFACTURING - A dual wavelength exposure system provides for patterning a resist layer formed on a wafer for forming semiconductor devices, using two exposure operations, one including a first radiation having a first wavelength and the other including a second radiation including a second wavelength. Different or the same lithography tool may be used to generate the first and second radiation. For each die formed on the semiconductor device, a critical portion of the pattern is exposed using a first exposure operation that uses a first radiation with a first wavelength and a non-critical portion of the pattern is exposed using a second exposure operation utilizing the second radiation at a second wavelength. The resist material is chosen to be sensitive to both the first radiation having a first wavelength and the second radiation having the second wavelength. | 12-09-2010 |
20110076843 | LITHOGRAPHY PATTERNING METHOD - A method for fabricating an integrated circuit device is disclosed. The method is a lithography patterning method that can include providing a substrate; forming a protective layer over the substrate; forming a conductive layer over the protective layer; forming a resist layer over the conductive layer; and exposing and developing the resist layer. | 03-31-2011 |
20120187571 | METHOD OF MANUFACTURING PHOTOMASK AND METHOD OF REPAIRING OPTICAL PROXIMITY CORRECTION - A method of manufacturing a photomask is described. The graphic data of the photomask are provided, and than an optical proximity correction is performed to the graphic data. A process rule check is then performed to the graphic data with the optical proximity correction. When at least one failed pattern not passing the process rule check is found in the graphic data, a repair procedure is performed only to the failed pattern so that the failed pattern can pass the process rule check. The patterns of the photomask are then formed according to the corrected and repaired graphic data. | 07-26-2012 |
20130252175 | Litho Cluster and Modulization to Enhance Productivity - The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process. | 09-26-2013 |
20130285264 | WAFER ASSEMBLY WITH CARRIER WAFER - A wafer assembly includes a process wafer and a carrier wafer. Integrated circuits are formed on the process wafer. The carrier wafer is bonded to the process wafer. The carrier wafer has at least one alignment mark. | 10-31-2013 |
20150076371 | LITHO CLUSTER AND MODULIZATION TO ENHANCE PRODUCTIVITY - The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process. | 03-19-2015 |
Patent application number | Description | Published |
20080211763 | DEVICE AND METHOD FOR ADJUSTING BACKLIGHT BRIGHTNESS - A device and method for adjusting backlight brightness employed in a display. The device has a buffer, a counter, and a comparator. The buffer receives and stores an image data of a frame. The counter receives the image data and obtains an image-loading value of the image data. The comparator is coupled to the counter and compares the image-loading value with a preset image-loading value. The comparator outputs a control signal indicating the comparison result to a backlight module to adjust the brightness of the backlight module. | 09-04-2008 |
20090143812 | FLEXIBLE ELECTRONIC ACUPUNCTURE DEVICE AND MANUFACTURE METHOD THEREOF - A flexible electronic acupuncture device comprises a metal substrate, an insulating layer disposed on the metal substrate, an circuit device disposed on the insulating layer and electrically connected to the metal substrate via a lead through the insulating layer, a rechargeable power module coupled to the circuit device to provide power therefore, a control device coupled to the circuit device to select the output wave form of the flexible electronic acupuncture device, and a skin pad disposed on the metal substrate to contact skin. | 06-04-2009 |
20100134483 | DRIVING METHOD THEREOF - A driving method for driving an LCD is provided. The LCD panel includes a plurality of scan lines, a plurality of data lines and a plurality of pixel units. The two neighboring pixel units electrically connected to the same scan line are located on two sides of the scan line respectively. The scan lines are sequentially divided into a plurality of groups. The driving method includes the following. The odd-numbered groups of scan lines are sequentially turned on and a signal with first polarity is input to the pixel units controlled by the odd-numbered groups of scan lines through the data lines. The even-numbered groups of scan lines are sequentially turned on and a signal with second polarity is input to the pixel units controlled by the even-numbered groups of scan lines through the data lines. The signal with first polarity and the signal with second polarity have opposite polarities. | 06-03-2010 |
20100317250 | METHOD OF FABRICATING A COLOR BACKLIGHT DEVICE - A color backlight device and fabrication method thereof is provided. A surface conduction emitter display with more than one color serves as the color backlight device. The color backlight device can be used in a liquid crystal display (LCD) to obviate the use of a color filter. The disclosure also provides a color display control method of the LCD and a pixel arrangement method of the color backlight device. | 12-16-2010 |
20110279454 | THREE-DIMENSIONAL DISPLAY AND THREE-DIMENSIONAL DISPLAY SYSTEM - A three-dimensional display includes a first display module, a second display module, a light-combining module and a view-scanning layer. The first display module provides a first display image. The second display module provides a second display image. The light-combining module is disposed in a first transmission path of the first display image and a second transmission path of the second display image. The first transmission path and the second transmission path after the first light-combining module have the same direction. The view-scanning layer receives the first display image transmitted along the first transmission path and the second display image transmitted along the second transmission path and respectively projects a part of the first display image and a part of the second display image onto a first view direction and a second view direction. | 11-17-2011 |
20120162744 | PARALLAX BARRIER DEVICE AND FABRICATING METHOD THEREOF - A parallax barrier device includes: a first substrate; a first patterned transparent electrode layer disposed on the first substrate; a first patterned electrochromic material layer disposed on the first patterned transparent electrode layer and including a plurality of electrochromic structures, in which lengths, widths or diameters of the electrochromic structures are 50 nm to 500 nm, and included angles of the electrochromic structures and a surface of the first substrate to be deposited are 30° to 89°; a second substrate; a second patterned transparent electrode layer disposed on the second substrate; a second patterned electrochromic material layer disposed on the second patterned transparent electrode layer; and an electrolyte disposed between the first patterned electrochromic material layer and the second patterned electrochromic material layer. | 06-28-2012 |
Patent application number | Description | Published |
20110169459 | BATTERY CHARGING METHOD - A battery charging method is provided for extending life of batteries. The method includes providing an appropriate charge-off voltage with respect to variation in both of a remaining capacity and an idle time of the battery. Further, the charge-off voltage may vary according to the remaining capacity and the idle time of the battery, so as to increase charging efficiency of the battery. Additionally, the present invention also provides adjusting a charge-off current to a value according to the variation in an actual capacity of the battery. | 07-14-2011 |
20110267007 | DISCHARGE METHOD FOR A BATTERY PACK - The present invention provides a discharge method for a hybrid battery pack to thereby extend its usage life. The discharge method determines which one of the battery sets installed in a hybrid battery pack should be held active to discharge electricity according to their parameters of battery state of health (SOH), wherein at least two of the battery sets are different in cell type. Accordingly, the method can optimize the discharging efficiency of the hybrid battery pack and then extend its usage life. | 11-03-2011 |
20130103332 | VOLTAGE CALIBRATION METHOD - In a rechargeable battery set, an average voltage is computed from average voltage drop produced by the sum of internal resistances of each battery cell. A calculated internal resistance of each battery cell is then computed from a measured voltage of each battery cell and the average voltage. Finally, the measured voltage of each battery cell is calibrated according to the calculated internal resistance and a calibrated voltage of each battery cell may be computed. In such way, the calibrated voltage of each battery cell is much closer to a real voltage of the battery cell, which provides a battery control unit more precise information when charging/discharging the battery cells. | 04-25-2013 |
20140042986 | CHARGING CONTROL METHOD OF A RECHARGEABLE BATTERY - By analyzing consecutive timestamps at which the battery cell is fully charged in two or more previous time intervals, the charging control method utilizes these consecutive timestamps of a sub-section of each time interval as a charging control way to the rechargeable battery in a present time interval. The charging process of the rechargeable battery in corresponding timestamps of the present time interval is limited to a specific proportion of the fully charged capacity of the battery cells. In such way, the rechargeable battery may have fewer chances to be fully charged at some less used time, which substantially increases the life of the battery. | 02-13-2014 |
20140167700 | POWER CONSUMPTION REDUCTION METHOD FOR A STORED BATTERY - A power consumption reduction method controls a rechargeable battery to enter a sleep mode after the electronic system is shutdown with the output current of the rechargeable battery falling under a first current value or the rechargeable battery is in a non-communication status for over a first delay time. When in the sleep mode, a control unit further controls the rechargeable battery to enter a power saving mode when the output voltage of the rechargeable battery falls under a predefined voltage or the RSOC of the rechargeable battery is lower than a percentage of FCC, and the output current of the rechargeable battery falls under a second current value or the rechargeable battery is in the non-communication status for over a second delay time. The method shuts down all power-consuming circuits and components under long-time idling of the battery, capable of preventing overly discharging and malfunction of the rechargeable battery. | 06-19-2014 |
Patent application number | Description | Published |
20090085016 | HIGH OPTICAL CONTRAST PIGMENT AND COLORFUL PHOTOSENSITIVE COMPOSITION EMPLOYING THE SAME AND FABRICATION METHOD THEREOF - A high optical contrast pigment and colorful photosensitive composition employing the same are disclosed. The composition comprises a solvent, an alkali-soluble resin, reactive monomer, and a modified pigment which has low crystallization. The low crystallization degree means that the grain size variation R is not more 80%, wherein the grain size variation R is represented by a formula R=G1/G0×100%, G0 is the original grain size, and G1 is the grain size after modification. | 04-02-2009 |
20100079720 | RETARDATION FILM AND METHOD FOR MANUFACTURING THE SAME - A retardation film and formula thereof, and method for manufacturing the same are provided. Furthermore, the retardation film is applied to compensate TFT-LCD viewing angle. Referring to the formula of the invention, the positive A film-embedded negative C optically anisotropic coating of the retardation film can be formed by single step coating, and the retardation film with net negative C symmetry in whole is easily manufactured. | 04-01-2010 |
20110088592 | REACTIVE SILICON DIOXIDE COMPOUND AND OPTICAL PROTECTIVE FILM CONTAINING THE SAME - A reactive silicon dioxide compound, wherein the formula of the reactive silicon dioxide compound is shown as Formula (I): | 04-21-2011 |
20110111333 | HEAT-RESISTANT FLEXIBLE COLOR FILTER - The invention provides a heat-resistant flexible color filter, including: a flexible transparent substrate, wherein the forming material thereof includes nano silica and polyimide, and the nano silica is present in an amount of about 20-70 wt %, based on 100 wt % of the forming material; and a heat-stable color photoresist material coated on the flexible transparent substrate, wherein the heat stable color photoresist material includes: a base soluble resin system about 30-90 wt %; a photosensitive system about 5-60 wt %; and a pigment coated with an inorganic alkoxide about 10-50 wt %. | 05-12-2011 |
20110143276 | BIOMASS CHEMICAL TONER COMPOSITION AND METHOD FOR MANUFACTURING THE SAME - Disclosed are a biomass chemical toner composition and a method for manufacturing the same. First, a biomass resin is mixed with a first hydrophobic resin to form organic particles. The organic particles, a second hydrophobic resin, and a pigment are mixed by emulsion aggregation to form cores. Subsequently, a third hydrophobic resin is formed on the surface of the cores, and the third hydrophobic resin is further heated and coalesced to form a continuous structure encapsulating the cores. Accordingly, the biomass chemical toner obtained from the described method has good anti-humidity, good charge stability, and low fusing temperature. | 06-16-2011 |
20120127418 | CONDUCTIVE LIGHT ABSORPTION LAYER COMPOSITION, CONDUCTIVE LIGHT ABSORPTION LAYER, AND LIQUID CRYSTAL DISPLAY EMPLOYING THE SAME - A conductive light absorption layer composition, a conductive light absorption layer, and a liquid crystal display employing the same are provided. The conductive light absorption layer composition includes: 10-40 parts by weight of an adhesion agent; 40-50 parts by weight of a non-conductive nano-pigment; 10-25 parts by weight of a conductive material; 10-25 parts by weight of a surfactant; and 0.1-1.0 parts by weight of an interface modifying agent. | 05-24-2012 |
20140147649 | COATING, METHOD FOR MANUFACTURING THE COATING AND FILM FORMED BY THE COATING - A coating includes an organosiloxane polymer and a mesoporous silica material bonded with the organosiloxane polymer. A monomer of the organosiloxane polymer is | 05-29-2014 |
Patent application number | Description | Published |
20090161801 | RECEIVER WITH DISCRETE-TIME FILTERING AND DOWN-CONVERSION - A receiver with discrete-time filtering and down-conversion is provided. The receiver includes a mixer and a sampling-and-filtering device. The sampling-and-filtering device is coupled to the mixer. The mixer receives a first radio frequency signal, and then mixes the first radio frequency with a reference signal to generate a first signal. The first signal is a continuous-time signal. The sampling-and-filtering device sequentially samples, filters, and down-converts the first signal according to a clock signal to generate a second signal. | 06-25-2009 |
20090170466 | CIRCUIT WITH PROGRAMMABLE SIGNAL BANDWIDTH AND METHOD THEREOF - A circuit with programmable signal bandwidth is provided. The circuit includes a first charge and discharge device, a first reset device, and a first variable capacitor device. The first reset device is coupled to the first charge and discharge device, and the first variable capacitor device is coupled to the first charge and discharge device. The first reset device is controlled by a discharge enable signal and used to provide a first discharge path. When the discharge enable signal turns off the first reset device, the first variable capacitor device generates a first total equivalent capacitor to the first charge and discharge device according to n reference signals, and n is an integer greater than 0. | 07-02-2009 |
20110291750 | CHARGE DOMAIN FILTER AND BANDWIDTH COMPENSATION CIRCUIT THEREOF - A charge domain filter (CDF) and a bandwidth compensation circuit of the CDF are provided. The CDF includes an amplifier, a plurality of switch-capacitor networks (SCNs), a connector, a current adder (CA) and a bandwidth compensation circuit. A first input terminal of the amplifier receives an input signal, and an output terminal thereof is connected to input terminals of the SCNs. The connector is connected between the output terminal of the SCNs and the CA for configuring coupling status of the output terminals of the SCNs and input terminals of the CA. The bandwidth compensation circuit senses a portion of or all of the output terminals of the SCNs and the CA, and outputs the sensing result to a second input terminal of the amplifier. | 12-01-2011 |
20130049850 | CHARGE DOMAIN FILTER APPARATUS - A charge domain filter (CDF) apparatus having a bandwidth compensation circuit is provided. The bandwidth compensation circuit includes a configurable power-reference cell (CPC) and/or a programmable-delay cell (PDC). The CPC receives and adjusts an output of the CDF to obtain a sensing power, and outputs the sensing power to the CDF. The PDC receives and delay an output of the CDF, and outputs a delay result to the CDF. The bandwidth compensation circuit having a flexible structure, so as to implement X-axis (frequency) compensation and/or Y-axis (power or gain) compensation of a frequency response diagram according to a design requirement. | 02-28-2013 |
20130120033 | CHARGE-DOMAIN FILTER AND METHOD THEREOF - A charge domain filter (CDF) is provided. The CDF includes a switched-capacitor network (SCN) and a clock generator. An input of the SCN receives an input signal. The SCN samples the input signal according to clock signals with different phases. The clock generator is coupled to the SCN for providing the clock signals. The clock generator adjusts phase differences of the clock signals or pulse widths of the clock signals in accordance with a control signal. | 05-16-2013 |
20130154725 | CHARGE DOMAIN FILTER AND METHOD THEREOF - A charge domain filter (CDF) and a method thereof are provided. The CDF includes an amplifier, a first switch-capacitor network (SCN), a second SCN, a third SCN and a fourth SCN. Input terminals of the first and the second SCNs are coupled to first and second output terminals of the amplifier, respectively. Input and output terminals of the third SCN are coupled to output terminals of the first and the second SCNs, respectively. Input and output terminals of the fourth SCN are coupled to output terminals of the second and the first SCNs, respectively. A mode control terminal of the third SCN receives a first mode signal to set an impulse response mode of the third SCN. A mode control terminal of the fourth SCN receives a second mode signal to set an impulse response mode of the fourth SCN. | 06-20-2013 |
20140002165 | CHARGE-DOMAIN FILTER AND METHOD THEREOF AND CLOCK GENERATOR | 01-02-2014 |
Patent application number | Description | Published |
20090251477 | MEMORY SAVING DISPLAY DEVICE - A display device capable of saving memory storage used for an overdriving function includes a compression unit, a frame buffer, a decompression unit and a look-up table (LUT) unit. The compression unit includes a decimation filter and is used for compressing data of a received frame and reducing a size of the received frame, to generate a compression frame. The frame buffer is coupled to the compression unit and used for storing the compression frame. The decompression unit includes an interpolation filter and is used for decompressing data of the compression frame outputted by the frame buffer and reducing a size of the compression frame, to generate a decompression frame. The LUT unit is coupled to the decompression unit and used for comparing the decompression frame with a next received frame of the received frame to determine an overdriving voltage. | 10-08-2009 |
20090262840 | Synchronization Signal Extraction Device and Related Method - A synchronization signal extraction device includes a signal reception terminal for receiving a composite video signal, a threshold voltage adjuster coupled to the signal reception terminal for adjusting a threshold voltage to a ratio of a first characteristic level and a second characteristic level of the composite video signal according to the first characteristic level and the second characteristic level, a slicer coupled to the signal reception terminal and the threshold voltage adjuster for slicing the composite video signal to extract a synchronization signal in the composite video signal, and a signal output terminal coupled to the slicer for outputting the extracted synchronization signal. | 10-22-2009 |
20090278767 | Data Access Method for a Timing Controller of a Flat Panel Display and Related Device - A data access method for a timing controller of a flat panel display includes forming a line buffer including a plurality of memory cells in the timing controller, dividing the plurality of memory cells into a first section and a second section, wherein the number of memory cells in the first section is greater than the number of memory cells in the second section, writing a first number of pixel data into the first section, wherein the first number of pixel data is included in a plurality of pixel data corresponding to a row of a frame, writing a second number of pixel data into the second section, wherein the second number of pixel data is included in the plurality of pixel data, and the first number is equal to the second number, and reading the plurality of pixel data from the plurality of memory cells according to an order. | 11-12-2009 |
Patent application number | Description | Published |
20100002431 | BACKLIGHT MODULE - A backlight module including a back cover, a reflector, a lamp supporter, and a number of lamps is provided. The back cover includes a number of holes, an inner face, and an outer face. The reflector is disposed on the inner face and has a number of openings. The openings expose parts of the holes. The lamp supporter has a base substrate and a number of carriers that are connected to the base substrate. The base substrate is assembled to the outer face of the back cover, and the carriers penetrate the holes of the back cover and the openings of the reflector. The lamps are disposed in the carriers, such that the lamps and the base substrate are located at two opposite sides of the back cover. | 01-07-2010 |
20110228556 | LIGHT SOURCE MODULE - A light source module including a light guide plate (LGP) and a light source device is provided. The LGP has a light exiting surface, a light reflecting surface opposite to the light exiting surface and at least one light entering surface connecting the light exiting surface and the light reflecting surface. The LGP has light reflective structures disposed on the light reflecting surface and each including a closed light active region and protrusions disposed in the light active region. The light active region and the light reflecting surface are not coplanar. The protrusions extend outward from the LGP. The light source device is disposed corresponding to the light entering surface. The light source device provides a light entering the LGP from the light entering surface and exiting the LGP from the light exiting surface after the light is redirected by one of the protrusions on the light reflecting surface. | 09-22-2011 |
20130163279 | BACKLIGHT MODULE - A backlight module including a light guide plate and a light source is provided. The light guide plate has a light incident surface, a light reflection surface, a first side surface and a second side surface. The light incident surface is connected to the second side surface. The reflection surface is connected between the first side surface and the light incident surface. The first and the second side surfaces are two planes with their extending planes intersected. The light incident surface is a chamfering plane connected between the first and the second side surfaces. The light reflection surface is a cambered surface connected between the first side surface and the light incident surface. The light source is disposed next to the light incident surface, so as to transmit light into the light guide plate through the light incident surface. | 06-27-2013 |
Patent application number | Description | Published |
20080251863 | HIGH-VOLTAGE RADIO-FREQUENCY POWER DEVICE - A high-voltage RF power device includes a plurality of serially connected transistors. Each transistor includes a gate finger disposed on a substrate, a gate dielectric layer, a drain structure disposed on one side of the gate finger, and an N+ source region on the other side of the gate finger. The drain structure includes an N+ doping region encompassed by a shallow trench isolation (STI) structure, and an N well directly underneath the STI structure and the N+ doping region. | 10-16-2008 |
20100109080 | PSEUDO-DRAIN MOS TRANSISTOR - A pseudo-drain MOS transistor is disclosed. The transistor includes a semiconductor substrate; a gate structure disposed on the semiconductor substrate; a source, a pseudo-drain, a drain, and a shallow trench isolation disposed in the semiconductor substrate, a p-well disposed in the semiconductor substrate and under the source and the gate structure; and an n-well disposed under the drain. The source and the pseudo-drain are disposed adjacent to two sides of the gate structure and the shallow trench isolation is disposed between the pseudo-drain and the drain, and the n-well is extended toward the pseudo-drain while not reaching the area below the gate structure. | 05-06-2010 |
20100200947 | DIE SEAL RING - A die seal ring disposed outside of a die region of a semiconductor substrate is disclosed. The die seal ring includes a first isolation structure, a second isolation structure, and at least one third isolation structure disposed between the first isolation structure and the second isolation structure; a plurality of first regions between the first isolation structure, the second isolation structure and the third isolation structure; a second region under the first region and the third isolation structure; and a third region under the first isolation structure. | 08-12-2010 |
Patent application number | Description | Published |
20100181847 | METHOD FOR REDUCING SUPPLY VOLTAGE DROP IN DIGITAL CIRCUIT BLOCK AND RELATED LAYOUT ARCHITECTURE - A method for reducing a supply voltage drop in a digital circuit block, where the digital circuit block includes a first conducting segment coupled to a first supply voltage, a second conducting segment coupled to a second supply voltage, and a digital logic coupled between the first conducting segment and the second conducting segment, the method including: constructing a third conducting segment connected to the first conducting segment and not electrically connected to the second conducting segment, wherein the third conducting segment is configured to have a first portion located at a first conducting layer; and constructing a fourth conducting segment electrically connected to the second conducting segment and not electrically connected to the first conducting segment, wherein the fourth conducting segment is configured to have a second portion located at a second conducting layer, and whereby a capacitive element is formed between the first portion and the second portion. | 07-22-2010 |
20120056488 | DIGITAL CIRCUIT BLOCK HAVING REDUCING SUPPLY VOLTAGE DROP AND METHOD FOR CONSTRUCTING THE SAME - A digital circuit block includes first to fourth conducting segments, a digital logic, first and second conducting layers, and a dielectric layer. The first and second conducting segments are coupled to first and second supply voltages, respectively. The digital logic and dielectric layer are between the first and second conducting segments. The third conducting segment includes a first end electrically connected to the first conducting segment, a second end not electrically connected to the second conducting segment, and a first portion located at the first conducting layer. The fourth conducting segment includes a first end electrically connected to the second conducting segment, a second end not electrically connected to the first conducting segment, and a second portion located at the second conducting layer. The first and second portions and dielectric layer are formed a first capacitive element to reduce the supply voltage drop between the first and second supply voltages. | 03-08-2012 |
Patent application number | Description | Published |
20100019263 | ROUGH STRUCTURE OF OPTOELECTRONIC DEVICE AND FABRICATION THEREOF - A dual-scale rough structure, in which a plurality of islands are grown on a semiconductor layer by heavily doping a dopant during epitaxy of a semiconductor layer of an optoelectronics device, is provided. A plurality of pin holes are formed on the islands by lowering the epitaxial temperature. The pin holes are distributed over the top and sidewall surfaces of the islands so that the total internal reflection within the optoelectronics device can be significantly reduced so as to enhance the brightness thereof. Compared with traditional technologies, the process method of the present invention has the advantages of producing less pollution, being able to perform easily, reducing manufactured cost, increasing the efficiency of light extraction, and increasing the effective area of the dual-scale emitting surface, which is not a smooth surface, of the structure. | 01-28-2010 |
20100261300 | METHOD FOR SEPARATING SUBSTRATE FROM SEMICONDUCTOR LAYER - A method for separating an epitaxial substrate from a semiconductor layer initially forms a patterned silicon dioxide layer between a substrate and a semiconductor layer, and then separates the substrate from the patterned silicon dioxide layer using two wet etching processes. | 10-14-2010 |
20110012155 | Semiconductor Optoelectronics Structure with Increased Light Extraction Efficiency and Fabrication Method Thereof - A semiconductor optoelectronic structure with increased light extraction efficiency and a fabrication method thereof are presented. The semiconductor optoelectronic structure includes continuous grooves formed under an active layer of the semiconductor optoelectronic structure to reflect light from the active layer and thereby direct more light through a light output surface so as to increase the light intensity from the semiconductor optoelectronic structure. | 01-20-2011 |
Patent application number | Description | Published |
20080225533 | LIGHT MODULES - Light modules are provided. A light module includes a circuit board, a lighting element electrically connected to the circuit board, and a first thermal plate. The circuit board has a through hole communicating a first side and a second side thereof. The lighting element is disposed on the first side of the circuit board and located corresponding to the through hole. The first thermal plate is disposed on the second side of the circuit board, opposite to the first side, and comprises a first protrusion extending through the through hole and connecting the lighting element. | 09-18-2008 |
20100073940 | CONVERGING ELEMENT FOR LED - A converging element for an LED is described, which is used for converging light rays emitted from a light-emitting chip to enable the light rays to form approximately parallel light rays after passing through the converging element. The converging element for LED includes a cylinder and a first lens. The cylinder is disposed on the light-emitting chip. The first lens is disposed on the other end of the cylinder opposite to the light-emitting chip. The first lens has a first plane and a first curved surface opposite to each other. The first plane of the first lens is attached to the cylinder. | 03-25-2010 |
20110253358 | LAMP ASSEMBLY - A lamp assembly is provided, including a light source, a thermal module, a connecting member, and an adapter electrically connected to the light source. The thermal module includes a first thermal member and a second thermal member. The first and second thermal members respectively have a plurality of first and second fins which are arranged in a staggered manner. The second thermal member forms a plurality of through holes for heat dissipation. The light source is disposed on the second thermal member, and the connecting member connects the thermal module with the adapter. | 10-20-2011 |
20110254425 | Lamp Assembly - A lamp assembly is provided, including a light source, a thermal module, a connecting member, and an adapter electrically connected to the light source. The thermal module includes a first thermal member and a second thermal member which are formed by a die casting process, wherein the light source is disposed on the second thermal member. The first and second thermal members respectively have a plurality of first and second fins which are arranged in a staggered manner. The connecting member is formed by a metal extrusion process and extends through the first thermal member to connect the second thermal member with the adapter. | 10-20-2011 |
20120153798 | LIGHT EMITTING DEVICE - Disclosed is a light-emitting device, including an LED light source and a light diffusion element. The light diffusion element, covering at least a part of the LED light source, is composed of a first polymer, a second polymer, or a blend of them. The first polymer has a larger crystal diameter than that of the second polymer. The first polymer is made of polypropylene or ethylene-propylene copolymer. The second polymer is made of polyethylene, polypropylene, or ethylene-propylene copolymer. A blend of certain ratios of the first and second polymer gives rise of an excellent material that has improved light diffusion. This material can be widely adopted to current light fixtures for its evenly distributed lighting and great brightness. | 06-21-2012 |
20130135854 | ILLUMINATION DEVICE - An illumination device includes a base, a flexible circuit board disposed on the base, and a plurality of illumination units. The flexible circuit board has a plurality of first branches and at least one second branch which are connected together. Each of the first branches has a radius of curvature, and the radii of curvature of the first branches are different from or identical to one another, so that the first branches are assembled to form a curved surface. The second branch extends from one of the first branches. After the first branches are assembled, the second branch is overlapped with another first branch. The illumination units are packaged onto the first branches of the flexible circuit board. Here, the illumination units located on one of the first branches is electrically connected to the illumination units located on another of the first branches through the second branch. | 05-30-2013 |
20130152468 | PLANTING CONTAINER AND PLANTING TOWER - A planting container is suitable for forming planting columns by using ones with the same structure three-dimensionally stacked. The planting columns are arranged around a center line parallel to the gravity direction to set up a planting tower. The planting container includes a bottom wall and a side wall. The side wall extends from the peripheral of the bottom wall and both walls define a containing space. The side wall has a planting opening communicating with the containing space. The side wall has a top end and a bottom end. When two containers with the same structure are three-dimensionally stacked by each other, the bottom end of the upper container engages with the top end of the lower container. The side wall laterally tilts towards the center line relatively to the bottom wall, so that the planting column tilts towards the adjacent column and tilts towards the center line. | 06-20-2013 |
Patent application number | Description | Published |
20090152711 | RECTIFICATION CHIP TERMINAL STRUCTURE - The present invention includes a base, a rectification chip, a conductive element and a coupling collar. The base has an installation pedestal to hold the rectification chip surrounded by an insulation portion. The conductive element has a root portion to connect the rectification chip. The root portion is extended to form a buffer section. The coupling collar is located at one end of the base to hold the package. The installation pedestal and the inner rim of the base are interposed by a gap. At least one hook portion is formed between the installation pedestal and the bottom of the gap. Thus the base does not turn against the package. The coupling collar has two ends formed an area different from any cross section area of the inner wall thereof. | 06-18-2009 |
20090236716 | RECTIFYING DIODE PACKAGE STRUCTURE - A rectifying diode package structure includes a base which has a holding deck to hold a diode chip and a protective portion on the perimeter of the base to form sealing space filled by a filling material to seal the diode chip in an integrated manner. The diode chip has a conductive element extended outside the sealing space. The holding deck and the protective portion are interposed by a buffer ring embedded in the filling material. The buffer ring has at least one retaining ridge which has at least one first end and one second end of different cross sections formed in an upright manner to form a retaining relationship between the buffer ring and the filling material. | 09-24-2009 |
20100099302 | RECTIFICATION CHIP TERMINAL STRUCTURE - The present invention includes a base, a rectification chip, a conductive element and a coupling collar. The base has an installation pedestal to hold the rectification chip. The conductive element has a root portion to hold the rectification chip. The coupling collar is located at one end of the base to hold a package. The coupling collar has a plurality of anchor portions in contact with the package. Each anchor portion has a convex portion and a concave portion extended to two ends of the coupling collar. The convex portion and concave portion of two neighboring anchor portions are formed in a staggered manner. The cross section area of the convex portion on the annular edge of the coupling collar is different from the cross section area of the inner wall of the coupling collar. Hence fabrication and assembly are easier. Turning and loosening of the package can be prevented. | 04-22-2010 |
20120152009 | TIRE PRESSURE GAUGE AND FASTENING AND UNFASTENING TOOL OF THE SAME - A tire pressure gauge includes a holder, an air intake seat, and a detection device coupled with the air intake seat. The holder and air intake seat have respectively a first positioning ring and a second positioning ring. A fastening and unfastening tool of the tire pressure gauge includes an outer barrel and an inner barrel held in the outer barrel. The outer barrel has a first anchor portion to latch the first positioning ring. The inner barrel has a second anchor portion to latch the second positioning ring. The outer barrel and inner barrel respectively drive the holder and air intake seat to be fastened to an air nozzle of a vehicle tire, and the holder and air intake seat are butted tightly to allow the tire pressure gauge to be securely installed on the air nozzle of any type of vehicles through the fastening and unfastening tool. | 06-21-2012 |
20120258627 | INFORMATION PROCESSING ADAPTER FOR ON-BOARD DIAGNOSTICS - An information processing adapter for an on-board diagnostic (OBD) includes an input connector inserted into a socket of the OBD, a circuit board connected to the input connector and a first output connector connected to the circuit board. The circuit board has a controller area network (CAN) transceiver and a microcontroller. The adapter gets vehicle driving information through the input connector and transmits to the microcontroller through the CAN transceiver to perform interpretation and format conversion, then sends the converted vehicle driving information to an external electronic device through the first output connector. With the format of vehicle driving information converted by the adapter, the information can be directly displayed or stored in various electronic devices without specific specification. | 10-11-2012 |
20120258628 | ON-BOARD DIAGNOSTIC ADAPTER - An on-board diagnostic (OBD) adapter includes an input connector, a first output connector and a second output connector. The input connector is electrically connected to the first and second output connectors through a circuit board. The input connector is inserted into a socket of the OBD to capture vehicle driving information from the OBD and transmit the vehicle driving information to the first and second output connectors. The first output connector is formed in a specification the same as the socket of the OBD. The second output connector is formed in a specification different from the socket of the OBD. The adapter provides connection with the OBD with the same or different connector to improve usability. | 10-11-2012 |
Patent application number | Description | Published |
20090257262 | DRAM AND MEMORY ARRAY - A dynamic random access memory (DRAM) includes a substrate, a plurality of bit lines, a plurality of word lines, a plurality of recess channels, a plurality of conductive plugs and a plurality of trench capacitors. In the DRAM, the bit lines are disposed on the substrate in a first direction, and the word lines are disposed on the bit lines in a second direction. Each recess channel is in the substrate between two bit lines below the word line, and each conductive plug connects each recess channel and the word lines. Each trench capacitor is disposed in the substrate between two bit lines where the recess channels are not formed. Because the word lines can be electrically connected with the recess channels directly without using an additional chip area, the WL access time can be accelerated without an increase of the chip size. | 10-15-2009 |
20100019301 | Dynamic random access memory structure - A dynamic random access memory structure includes a recessed-gate transistor disposed in the substrate; a trench capacitor structure disposed in the substrate and electrically connected to a first source/drain of the recessed-gate transistor; a first conductive structure disposed on and contacting the trench capacitor structure; a stack capacitor structure disposed on and contacting the first conductive structure, wherein a bottom electrode of the trench capacitor structure and a top electrode of the stack capacitor structure are electrically connected to serve as a common electrode; and a bit line disposed above a second source/drain of the recessed-gate transistor and electrically connected to the second source/drain, wherein the top of the bit line is lower than the top of the gate conductive layer of the recessed-gate transistor. | 01-28-2010 |
20100052029 | TRANSISTOR STRUCTURE AND DYNAMIC RANDOM ACCESS MEMORY STRUCTURE INCLUDING THE SAME - A dynamic random access memory structure is disclosed, in which, the active area is a donut-type pillar at which a novel vertical transistor is disposed and has a gate filled in the central cavity of the pillar and upper and lower sources/drains located in the upper and the lower portions of the pillar respectively. A buried bit line is formed in the substrate beneath the transistor. A word line is horizontally disposed above the gate. A capacitor is disposed above the word line as well as the gate and electrically connected to the upper source/drain through a node contact. The node contact has a reverse-trench shape with the top surface electrically connected to the capacitor and with the bottom of the sidewalls electrically connected to the upper source/drain. The word line passes through the space confined by the reverse-trench shape. | 03-04-2010 |
20100295106 | TRANSISTOR STRUCTURE AND DYNAMIC RANDOM ACCESS MEMORY STRUCTURE INCLUDING THE SAME - A dynamic random access memory structure is disclosed, in which, the active area is a donut-type pillar at which a novel vertical transistor is disposed and has a gate filled in the central cavity of the pillar and upper and lower sources/drains located in the upper and the lower portions of the pillar respectively. A buried bit line is formed in the substrate beneath the transistor. A word line is horizontally disposed above the gate. A capacitor is disposed above the word line as well as the gate and electrically connected to the upper source/drain through a node contact. The node contact has a reverse-trench shape with the top surface electrically connected to the capacitor and with the bottom of the sidewalls electrically connected to the upper source/drain. The word line passes through the space confined by the reverse-trench shape. | 11-25-2010 |
Patent application number | Description | Published |
20090316019 | TONE ADJUSTMENT METHOD FOR DIGITAL IMAGE AND ELECTRONIC APPARATUS USING THE SAME - A tone adjustment method for a digital image and an electronic apparatus using the same are presented. The method includes steps. A digital image is loaded. A detail image layer and a primary image layer are generated according to the digital image. A tone mapping procedure is performed on the primary image layer, for generate a tone mapping layer. A detail gain lookup table is loaded and then a corresponding gain is looked up according to each pixel value in the primary image layer, for generate a detail gain adjustment layer. A detail gain control procedure is performed and then a detail gain adjustment is performed on the detail gain adjustment layer and the detail image layer, for generate a gain correction layer. The gain correction layer and the tone mapping layer are combined, and then a combined layer is output, thereby completing the tone adjustment for the digital image. | 12-24-2009 |
20110158628 | AUTOMATIC ADJUSTMENT METHOD OF CAMERA SAFE SHUTTER - An automatic adjustment method of camera safe shutter includes: count the number of taking pictures with the same exposure time and record their blur degree; determine whether the minimum among the taking pictures counts is arrived at a predetermined threshold, if yes, average all blur degree records which are related with the same exposure time to get an average blur index for each of the exposure times, if no, continue to count the number of taking pictures; determine the average blur indexes whether are all larger than a threshold value, if no, average several slowest exposure times whose average blur indexes are larger than the threshold value as a new safe shutter speed, if yes, select the fastest exposure time level among the levels which are slower than current safe shutter as a new safe shutter speed. Thereby, users can take clear pictures easily. | 06-30-2011 |
20130084014 | PROCESSING METHOD FOR IMAGE INTERPOLATION - A processing method for image interpolation is provided. In the method, a contour containing a destination pixel and a plurality of contour pixels is produced and detected by using an edge detection method for a selected area in an original image. Next, two extreme points are identified from the contour pixels by judging the changing trend of brightness value of the contour pixels on the contour. Then using the changing trend and two extreme points determines whether the destination pixel is located at a transition area or a non-transition area. If the destination pixel is located at the non-transition area, an interpolation adjust value is calculated according to the brightness values of the two extreme points and the brightness value of the destination pixel. An interpolation result of the destination pixel is obtained by performing the interpolation on the selected area according to the interpolation adjust value. | 04-04-2013 |
20140307054 | AUTO FOCUS METHOD AND AUTO FOCUS APPARATUS - An auto focus (AF) method adapted to an AF apparatus is provided. The AF method includes following steps. A target object is selected and photographed by a first image sensor and a second image sensor to generate a first image and a second image. A procedure of three-dimensional (3D) depth estimation is performed according to the first image and the second image to generate a 3D depth map. An optimization process is performed on the 3D depth map to generate an optimized 3D depth map. A piece of depth information corresponding to the target object is determined according to the optimized 3D depth map, and a focusing position regarding the target object is obtained according to the pieces of depth information. The AF apparatus is driven to execute an AF procedure according to the focusing position. Additionally, an AF apparatus is provided. | 10-16-2014 |
20140327743 | AUTO FOCUS METHOD AND AUTO FOCUS APPARATUS - An auto focus (AF) method and an AF apparatus are provided. The method includes the following steps. At least one target object is selected and photographed by a first image sensor and a second image sensor to generate a three-dimensional (3D) depth map. A block covering at least one initial focusing point is selected. The 3D depth map is queried for reading depth information of a plurality of pixels in the block. It is determined whether depth information of the pixels is enough to operate. If yes, a first statistics operation is performed, and focusing depth information is obtained. If not, the position of the block is moved or the size of the block is enlarged to obtain the focusing depth information. A focusing position is obtained according to the focusing depth information and the AF apparatus is driven to perform an AF procedure according to the focusing position. | 11-06-2014 |
Patent application number | Description | Published |
20100156201 | DISPLACEMENT TYPE GENERATOR - A displacement type generator including a magnet set and a coil set is provided. The magnet set includes a magnet with unidirectional magnetization and a first multi-polar magnetic structure, wherein the first multi-polar magnetic structure is disposed on the magnet. The coil set includes a magnetic center pole, a coil and a second multi-polar magnetic structure. The coil is wound on the magnetic center pole. The second multi-polar magnetic structure is disposed on the magnetic center pole and is adjacent to the first multi-polar magnetic structure. As a relative movement is generated between the magnet set and the coil set, the magnetic flux changes and causes the coil to output an induced voltage. | 06-24-2010 |
20110147278 | MAGNETIC SEPARATION DEVICE AND METHOD FOR SEPARATING MAGNETIC SUBSTANCE IN BIO-SAMPLES - A magnetic separation device is provided, including a first magnetic field unit and a first separation unit disposed at a side of the first magnetic field unit. The first magnetic field unit includes a first magnetic yoke having opposite first and second surfaces, and a plurality of first magnets respectively disposed over the first and second surfaces, wherein the same magnetic poles of the plurality of first magnets face the first magnetic yoke. The first separation unit includes a body made of non-magnetic materials and a continuous piping disposed in the body, including at least one first section and at least one second section, wherein at least one second section is perpendicular to at least one first section, and at least one second section is adjacent to, and in parallel to a side of the first magnetic yoke not in contact with the plurality of first magnets. | 06-23-2011 |
20110159317 | FLEXIBLE SHEET WITH HIGH MAGNETIC PERMEABILITY AND FABRICATION METHOD THEREOF - A flexible sheet with high magnetic permeability is disclosed, including a magnetic ferrite sintering sheet including a plurality of pieces separated by micro gaps and a first flexible layer attached to a first side of the magnetic ferrite sintering sheet, wherein the pieces of the magnetic ferrite sintering sheet include a first protruding and recessing structure and a second protruding and recessing structure at opposite sides of one of the micro gaps, and the first protruding and recessing structure and the second protruding and recessing structure are matched with each other. | 06-30-2011 |
20120255913 | MAGNETIC SEPARATION UNIT, MAGNETIC SEPARATION DEVICE AND METHOD FOR SEPARATING MAGNETIC SUBSTANCE IN BIO-SAMPLES - A magnetic separation unit is provided, including a first member made of non-magnetic materials comprising a trench extending within the first member and a second member made of magnetic materials including a protrusion portion protruding over a surface of the second member, wherein the first member connects the second member such that the trench functions as a fluid channel formed between the first and second members, and the protrusion portion of the second member is contained by the trench of the first member. | 10-11-2012 |
20130154973 | TOUCH PAD WITH FEEDBACK FUNCTION AND TOUCH DEVICE USING THE SAME - A touch pad with a feedback function and a touch device using the same are provided. The provided touch pad includes a touch sensing film layer and a vibration film layer, where the vibration film layer is disposed above the touch sensing film layer and includes a permanent charge layer. Moreover, the vibration film layer is configured for generating vibration in response to a touch event on the touch sensing film layer. | 06-20-2013 |
20140167896 | COUPLED INDUCTOR - A coupled inductor includes a magnetic core, a first and a second coil. The magnetic core has a top and a bottom surface. The first coil, located in the magnetic core, has a first coil input end and a first coil output end, and is wound around a first axis in a first winding direction from the first coil input end and extended to the first coil output end. The second coil, located in the magnetic core, has a second coil input end and a second coil output end, and is wound around a second axis in a second winding direction, opposite to the first winding direction, from the second coil input end and extended to the second coil output end. An orthographic projection of the first coil on the top surface is at least partially overlapped with that of the second coil on the top surface. | 06-19-2014 |