Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Huang, Cupertino
Andy Teh-An Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20130028968 | COMPOSITIONS AND METHODS TO RELIEVE CHRONIC DISEASES SYMPTOMS - Compounds having unique properties are prepared from the herbal compositions described herein and comprise extracts derived from plants and fungi of the genera | 01-31-2013 |
Chang Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120308122 | FAST METHODS OF LEARNING DISTANCE METRIC FOR CLASSIFICATION AND RETRIEVAL - A nearest-neighbor-based distance metric learning process includes applying an exponential-based loss function to provide a smooth objective; and determining an objective and a gradient of both hinge-based and exponential-based loss function in a quadratic time of the number of instances using a computer. | 12-06-2012 |
Cheng Kuo Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110041007 | Controller For Reading Data From Non-Volatile Memory - The present disclosure includes systems and techniques relating to solid state drive controllers. In some implementations, a device includes a buffer that holds a block of data corresponding to a command from a host. The command identifies the block of data and a logical sequence in which the identified block of data is to be transmitted. In response to the command, a data retriever included in the device retrieves the portions of the block of data from non-volatile memory units in a retrieval sequence that is different from the logical sequence. When the device receives multiple commands identifying multiple blocks of data, the device services the commands in parallel by retrieving portions of blocks of data identified by both commands. | 02-17-2011 |
Chun-Yao Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120327321 | DISPLAY PIXEL HAVING OXIDE THIN-FILM TRANSISTOR (TFT) WITH REDUCED LOADING - Disclosed embodiments relate to a thin-film transistor (TFT) for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and column, with each row corresponding to a gate line and each column corresponding to a source line. Each of the pixels includes a pixel electrode and a TFT. The TFT may include a metal oxide semiconductor channel between a source and drain. For each TFT, holes may be formed in the gate line in a region beneath the source and/or the drain. The holes may be formed such that the source and drain only partially overlap the holes. The presence of the holes reduces the area of the gate line, which may reduce parasitic capacitance and improve loading. This may provide improved panel performance, which may reduce the appearance of certain visual artifacts. | 12-27-2012 |
Dai Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110199117 | TRIGGER CIRCUITS AND EVENT COUNTERS FOR AN IC - Some embodiments provide an integrated circuit (‘IC’). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred. | 08-18-2011 |
| 20110206176 | TRIGGER CIRCUITS AND EVENT COUNTERS FOR AN IC - Some embodiments provide an integrated circuit (“IC”). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred. | 08-25-2011 |
Evan S. Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090031403 | Methods and Apparatuses for Securely Operating Shared Host Computers With Portable Apparatuses - The present invention provides methods and apparatuses that utilize a plurality of portable apparatuses to securely operate a plurality of host computers. Each portable apparatus including an operating system and a list of software applications is installed in a removable data storage medium. An authorization procedure is implemented before establishing a connected-state operation between a portable apparatus and a host computer. The host computer loads the operating system in the portable apparatus into its random access semiconductor memory (RAM) through the established connected-state operation. | 01-29-2009 |
| 20090276509 | Method and Apparatus for Operating a Host Computer in a Network Environment - The present invention provides a method and an apparatus that utilize a portable apparatus to operate a host computer in a network environment. The portable apparatus including an operating system and a list of software applications are installed in a removable data storage medium. The basic input/output system (BIOS) of the host computer will directly or indirectly identify the portable apparatus as its boot drive. The host computer immersed in a network environment will further load the operating system in the portable apparatus into its random access semiconductor memory (RAM). In one embodiment of the invention, a hardware profile which contains host and peripheral device-related information is either stored or operatively accessible by the host computer. The operating system is capable of incorporating information from the hardware profile during an OS-loading procedure. | 11-05-2009 |
| 20100205524 | EXTENSIBLE STYLESHEET DESIGNS USING META-TAG INFORMATION - Methods and apparatuses for extensible stylesheet design using meta-tag information are disclosed. A designed stylesheet is for transferring content-oriented markup language files into a target file so as to support various presentations and information exchange. According to one aspect, a data processing mechanism starts with inserting meta-tag declarations in a target file wherein the meta-tag information pertains to information between dynamic objects in the target file and a source file. The target file with meta-tag information is then converted into one or more extensible stylesheets. | 08-12-2010 |
| 20100211453 | METHOD AND APPARATUS FOR BUSINESS INFO PROVIDER-BASED ADVERTISING IN A LOCAL SEARCH MARKET - An online local search system and method utilizes local business info providers to enter and update business information related to local businesses. The online local search system and method uses a territorial listing concept with an optional reservation stage, an editing stage, and a pending stage to reduce overlapping listings and promote robust update of business information. The online local search system and method also uses a territorial advertising concept, which allows a business info provider with more business listing entries to capture a larger portion of pay-per-user-interest (e.g. pay-per-click, pay-per-impression, pay-per-action, and etc.) profits based on in-category or out-category advertising on the online local search system. | 08-19-2010 |
| 20120278606 | METHODS AND APPARATUSES FOR SECURELY OPERATING SHARED HOST DEVICES WITH PORTABLE APPARATUSES - The present invention provides methods and apparatuses that utilize a portable apparatus to securely operate a host electronic device. Typically, each portable apparatus includes a data storage unit which stores an operating system and other software. In one example, a portable apparatus can provide a virtual operating environment on top of a host's operating system for a host device. In another example, a portable apparatus containing its operating system can directly boot a host device with one or more hardware profiles. Furthermore, a device-dependent protection against software piracy, a user-dependent protection against sensitive data leaks, a controllable host operating environment to prevent unwanted information exposure, and a secure restoration procedure to prevent virus infection between the host device users may be incorporated. Moreover, an authorization signature may also be utilized to authorize a connected-state guest operation environment in the host device. | 11-01-2012 |
| 20120278866 | METHODS AND APPARATUSES FOR SECURELY OPERATING SHARED HOST COMPUTERS WITH PORTABLE APPARATUSES - The present invention provides methods and apparatuses that utilize a portable apparatus to securely operate a host electronic device. Typically, each portable apparatus includes a data storage unit which stores an operating system and other software. In one example, a portable apparatus can provide a virtual operating environment on top of a host's operating system for a host device. In another example, a portable apparatus containing its operating system can directly boot a host device with one or more hardware profiles. Furthermore, a device-dependent protection against software piracy, a user-dependent protection against sensitive data leaks, a controllable host operating environment to prevent unwanted information exposure, and a secure restoration procedure to prevent virus infection between the host device users may be incorporated. Moreover, an authorization signature may also be utilized to authorize a connected-state guest operation environment in the host device. | 11-01-2012 |
Jonathan Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120230391 | High Performance AVC Encoder on a Multi-Core Platform - A method and system for encoding a digital video signal using a plurality of parallel processors. A digital picture is received that is composed of one or more GOPs. The CPU then determines the number of GOPs that need to be encoded and divides them into groups. The number of GOPs in a group may equal the number of parallel processors in the multi-core platform available to encode. The CPU transfers in a single batch to the multi-core platform, a frame of equal rank from each GOP contained in the first group. The multi-core platform encodes the frames in parallel, rearranges the encoded byte stream chunk into normal display order sequence and stores the encoded byte stream. The process may repeat until all the GOPs in the first group have been encoded. Upon completion the multi-core platform outputs the encoded byte stream in normal display order sequence. | 09-13-2012 |
Jonathan Jiannjang Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080219349 | Parallel processing apparatus for video compression - A method of and an apparatus for parallel processing video compression is described herein. A picture is divided into N zones vertically, and Vertical Split Parallelism (VSP) deploys N+1 processes: N M-coding processes for general macroblock coding in N zones and one E-coding process for entropy coding. By dividing a macroblock encoding process into M-coding and E-coding processes, multiple M-coding threads and one E-coding thread are able to progress simultaneously with proper synchronization between threads. Since the workload of M-coding processes is greater than E-coding for each macroblock coding process, two cores are able to be designated to the two M-coding processes. Either of the cores are able to be designated to the E-coding process since the workload of E-coding is light. Therefore, VSP utilizes parallel processing computing power efficiently. | 09-11-2008 |
Kai-Ti Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100083198 | METHOD AND SYSTEM FOR PERFORMING STATISTICAL LEAKAGE CHARACTERIZATION, ANALYSIS, AND MODELING - A method, system, and computer program product are disclosed for performing statistical leakage power characterization to estimate yield of a circuit in terms of leakage power. According to some approaches, this is performed with consideration of bi-exponential modeling. | 04-01-2010 |
Kecheng Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100283739 | CONTACT GROUPING AND GESTURE RECOGNITION FOR SURFACE COMPUTING - Tools and techniques for contact grouping and gesture recognition for surface computing are provided. These tools receive, from a finger grouping subsystem, data representing velocity parameters associated with contact points, with the contact points representing physical actions taken by users in interacting with software applications presented on a surface computing system. These tools also identify gestures corresponding to the physical actions by analyzing the velocity parameters, and provide indications of the identified gestures to the software applications. | 11-11-2010 |
Kee-Dyi Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090264080 | METHOD AND APPARATUS TO ESTIMATE WIRELESS BASE STATION SIGNAL QUALITY OVER THE AIR - The quality of the signal from a base station is measured and adjusted for distortion due to multipath and due to signals from neighboring co-channel base stations. The signal quality is measured conventionally by determining Rho or EVM and then Rho or EVM are adjusted. To adjust the signal the process includes the steps of: (a) sampling a received CDMA base station signal in a particular frequency channel, calculating the total received power to provide a reference value for subsequent normalization; (b) demodulating the received signal and constructing an ideal reference signal; (c) correlating between the ideal reference signal and received signal to determine a Rho value, or calculating the ratio of the difference between ideal and received signal to the ideal signal to obtain EVM; (d) performing a self cross correlation to separate signals from the sampled received signal on different delay paths, and determining a multipath power value x as a total power of signals on non-dominant ones of the delay paths; (e) performing a code correlation pilot scan of the sampled signal to determine strengths of signals from neighboring co-channel base stations; (f) summing the power levels of the neighboring co-channel base station signals to provide a total pilot pollution power y; and (g) calculating an adjusted Rho or EVM by removing x and y from the total received power. | 10-22-2009 |
| 20100105346 | METHOD TO DETECT INTERFERENCE IN WIRELESS SIGNALS - A method to detect interference in wireless signals, comprising sampling a received signal; identifying a dominant waveform in the received signal; subtracting the dominant waveform from the received signal to create a modified received signal; and repeating the above steps, recursively substituting the modified received signal for the received signal, until all adjusted reference waveforms have been subtracted. | 04-29-2010 |
| 20100105347 | APPARATUS TO DETECT INTERFERENCE IN WIRELESS SIGNALS - An apparatus to detect interference in wireless signals, comprising an antenna for receiving a wireless signal; and wherein the apparatus is operable to identify a dominant waveform in the received signal; subtract the dominant waveform from the received signal to create a modified received signal; and repeat the above steps, recursively substituting the modified received signal for the received signal, until all adjusted reference waveforms have been subtracted. | 04-29-2010 |
Lili Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100001973 | DISPLAY WITH DUAL-FUNCTION CAPACITIVE ELEMENTS - A touch screen including display pixels with capacitive elements is provided. The touch screen includes first common voltage lines connecting capacitive elements in adjacent display pixels, and a second common voltage line connecting first common voltage lines. The pixels can be formed as electrically separated regions by including breaks in the common voltage lines. The regions can include a drive region that is stimulated by stimulation signals, a sense region that receives sense signals corresponding to the stimulation signals. A grounded region can also be included, for example, between a sense region and a drive region. A shield layer can be formed of a substantially high resistance material and disposed to shield a sense region. A black mask line and conductive line under the black mask line can be included, for example, to provide low-resistance paths between a region of pixels and touch circuitry outside the touch screen borders. | 01-07-2010 |
| 20110298730 | Thin Sheet Glass Processing - Improved techniques are disclosed for fabrication of touch panels using thin sheet glass. Thin touch sensor panels each having a thickness of substantially less than approximately one-half millimeter can be produced. A thin mother glass sheet having a thickness of substantially less then approximately one half millimeter can be used. A thin film can be coupled to a surface of the thin mother glass sheet, and the thin film can be photolithographically patterned, while avoiding breakage of the thin mother glass sheet. The thin mother glass sheet can be singulated into the thin touch sensor panels. | 12-08-2011 |
Mei-Hui Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110298059 | INTEGRATED CIRCUITS HAVING DUMMY GATE ELECTRODES AND METHODS OF FORMING THE SAME - An integrated circuit includes at least one first gate electrode of at least one active transistor. At least one first dummy gate electrode is disposed adjacent to a first side edge of the at least one first gate electrode. At least one second dummy gate electrode is disposed adjacent to a second side edge of the at least one first gate electrode. The second side edge is opposite to the first side edge. At least one guard ring is disposed around the at least one first gate electrode, the at least one first dummy gate electrode, and the at least one second dummy gate electrode. An ion implantation layer of the at least one guard ring substantially touches at least one of the at least one first dummy gate electrode and the at least one second dummy gate electrode. | 12-08-2011 |
| 20120240088 | SYSTEMS AND METHODS OF DESIGNING INTEGRATED CIRCUITS - A method of designing an integrated circuit includes defining at least one dummy layer covering at least one of a portion of a first metallic layer and a portion of a second metallic layer of an integrated circuit. The second metallic layer is disposed over the first metallic layer. The first metallic layer, the second metallic layer and a gate electrode of the integrated circuit have a same routing direction. A logical operation is performed to a file corresponding to the at least one of the portion of the first metallic layer and the portion of the second metallic layer covered by the dummy layer so as to size at least one of the portion of the first metallic layer and the portion of the second metallic layer. | 09-20-2012 |
Peter An-Ping Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090172789 | Policy Based, Delegated Limited Network Access Management - Policy-based, delegated limited network access management places day-to-day control of network access in the hands of authorized users, referred to as resource access administrators, selected for their business knowledge and ability to respond quickly to business events. Resource access administrators have the ability to respond, in the form of access decisions proposed by individuals with knowledge or, or responsibility for business processes and business partner relationships and shaped and pre-approved by network security specialists, referred to as network access administrators. This approach, therefore, reduces the cost, complexity, and delay (latency) associated with managing external network access without compromising network security. | 07-02-2009 |
Richard J. Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120007221 | MASK FOR FORMING INTEGRATED CIRCUIT - A method of forming an integrated circuit includes providing a buffer layer comprising a dielectric material above a layer of conductive material and providing a layer of mask material above the buffer layer. The mask material comprises amorphous carbon. The method also includes removing a portion of the buffer layer and the layer of mask material to form a mask. A feature is formed in the layer of conductive material according to the mask. | 01-12-2012 |
Ronald K. Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110252057 | JOURNALING ON MOBILE DEVICES - A journaling subsystem on a mobile device stores event data related to applications or other subsystems running on the mobile device. The event data can be stored and indexed in a journal database so that a timeline of past events can be reconstructed in response to search queries. In some implementations, a timeline can be reconstructed with markers on a map display based on search results. When the user interacts with a marker on the map display, the event data collected by the mobile device is made available to the user. | 10-13-2011 |
Wayne W. Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120275088 | MULTI-LAYER ADHESIVE ASSEMBLIES FOR ELECTRONIC DEVICES - Techniques or processes for producing assemblies using adhesives and substrate material, such as glass. In one embodiment, the assemblies may be for portable electronic devices. For example, a cover glass of a portable electronic device may have a first layer of a self-leveling adhesive, which may be adhesively coupled with the cover glass. A second layer of a second adhesive, which may be different than the self-leveling adhesive of the first layer, may be adhesively coupled with the first layer. An optical component may be adhesively coupled with the second layer, so as to secure the optical component. The first layer may be cured prior to securing the optical component, so that the optical component may be substantially isolated from stress effects of adhesive cure shrinkage of the first layer. Flexure, warpage or optical distortion of the optical component due to adhesive cure shrinkage may be substantially avoided. | 11-01-2012 |
Wayne Wei-Cheng Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20130084430 | MIRROR FEATURE IN DEVICES - Various processes for creating mirrored features are discussed herein as well as devices that include the mirrored features. One embodiment includes a button having a transparent layer and an opaque layer coupled to the transparent layer. A portion of the transparent layer extends through the opaque layer so that the portion of the transparent layer is flush with a back surface of the opaque layer and generally has a shape of a desired feature. The button also includes a reflective object positioned so that it may be seen through the transparent layer. | 04-04-2013 |
Weida Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090185501 | METHOD AND SYSTEM FOR DETERMINATION AND EXCHANGE OF NETWORK TIMING INFORMATION - Aspects of a method and system for determination and exchange of network timing information are provided. In this regard, for each network hop traversed by a packet, a propagation delay of said network hop may be determined. Moreover, the propagation delay, and/or a hop length calculated utilizing the propagation delay, may be appended to the packet. The packet may, for example, be a MMRP registration packet or a SRP reservation packet. The packet may be dropped in instances that the propagation delay and/or length of a one or more traversed network hops is outside a determined range. The hop length may be determined by multiplying the propagation delay by a speed of propagation on the hop. The speed of propagation may be determined based on the physical layer technology associated with the network hop. Digital rights management may be implemented for media communicated on the network hop based at least in part on the hop length or the propagation delay. In this regard, use of media content may be restricted to a specified location. | 07-23-2009 |
Wenrong Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090131411 | BENZAMIDES AND RELATED INHIBITORS OF FACTOR XA - Novel benzamide compounds including their pharmaceutically acceptable isomers, salts, hydrates, solvates and prodrug derivatives having activity against mammalian factor Xa are described. Compositions containing such compounds are also described. The compounds and compositions are useful in vitro or in vivo for preventing or treating coagulation disorders. | 05-21-2009 |
| 20100298284 | BENZAMIDES AND RELATED INHIBITORS OF FACTOR XA - Novel benzamide compounds including their pharmaceutically acceptable isomers, salts, hydrates, solvates and prodrug derivatives having activity against mammalian factor Xa are described. Compositions containing such compounds are also described. The compounds and compositions are useful in vitro or in vivo for preventing or treating coagulation disorders. | 11-25-2010 |
| 20120083602 | BENZAMIDES AND RELATED INHIBITORS OF FACTOR XA - Novel benzamide compounds including their pharmaceutically acceptable isomers, salts, hydrates, solvates and prodrug derivatives having activity against mammalian factor Xa are described. Compositions containing such compounds are also described. The compounds and compositions are useful in vitro or in vivo for preventing or treating coagulation disorders. | 04-05-2012 |
X. M. Henry Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110044091 | TWO-TERMINAL NANOTUBE DEVICES AND SYSTEMS AND METHODS OF MAKING SAME - A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device. | 02-24-2011 |
| 20110220859 | Two-Terminal Nanotube Devices And Systems And Methods Of Making Same - A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device. | 09-15-2011 |
Yen-Son Paul Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100145696 | Method, system and apparatus for improved voice recognition - An improved voice recognition system in which a Voice Keyword Table is generated and downloaded from a set-up device to a voice recognition device. The VKT includes visual form data, spoken form data, phonetic format data, and an entry corresponding to a keyword, and TTS-generated voice prompts and voice models corresponding to the phonetic format data. A voice recognition system on the voice recognition device is updated by the set-up device. Furthermore, voice models in the voice recognition device are modified by the set-up device. | 06-10-2010 |
Zhibin Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110234265 | Programmable Frequency Divider - A clock divider and method of operating the same. In various embodiments, the clock divider may be configured to divide clock frequencies by both even and odd divisors. The divisor may be an integer that is represented by an N-bit value, and the clock divider may be programmable by writing the N-bit value to a register. The divisor may be even or odd. During operation, the clock divider may decrement a counter down from an initial value (derived from the N-bit value representing the divisor) to a trigger value. When the trigger value is detected, the clock divider may cause the output clock to toggle. The trigger value may depend on whether the divisor is even or odd. The clock divider may be re-programmed during operation by writing a new N-bit value into the register. Re-programming may include changing the divisor from an even value to an odd value. | 09-29-2011 |
Zining Huang, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090247010 | Method and Apparatus to Provide Electromagnetic Interference Shielding of Optical-Electrical Module - A pluggable optical/electrical module is disclosed. One or more features operate to decrease electromagnetic interference are implemented, which features include deforming the portions that mate together to form the housing, placing elbow deformities on extending fingers to more properly seal the housing convex shape to housing to seal gaps between multiple sections, and placing an EMI insulating material within an opening that is formed for the latch that locks the module in place in a chassis. | 10-01-2009 |
| 20100183293 | APPARATUS AND METHODS FOR INDICATING THE OPERATIONAL CONDITION OF A COMMUNICATION DEVICE - A communication interface module is disclosed, wherein the module may include a circuit board having an electronic communication interface and an optical communication interface; a light source disposed on the circuit board, wherein the light source is indicative of a status of at least one operational condition of the module; a module cover coupled to the circuit board; and a light path extending from the light source on the circuit board to a portion of the module cover visible to a human operator. | 07-22-2010 |