| Patent application number | Description | Published |
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| 20100099229 | METHOD FOR FORMING A THIN FILM RESISTOR - A method for forming a thin film resistor includes providing a substrate having a transistor region and a thin film resistor region defined thereon, sequentially forming a dielectric layer, a metal layer and a first hard mask layer on the substrate, patterning the first hard mask layer to form at least a thin film resistor pattern in the thin film resistor region, sequentially forming a polysilicon layer and a second hard mask layer on the substrate, patterning the second hard mask layer to form at least a gate pattern in the transistor region, and performing an etching process to form a gate and a thin film resistor respectively in the transistor region and the thin film resistor region. | 04-22-2010 |
| 20100148263 | SEMICONDUCTOR DEVICE STRUCTURE AND FABRICATING METHOD THEREOF - A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resistor region. The resistor includes a first dielectric layer, a metal layer, a second dielectric layer, and a semiconductor layer sequentially stacked on the substrate. The first gate structure is disposed on the substrate within the MOS transistor region. The first gate structure includes the first dielectric layer, the metal layer, and the semiconductor layer sequentially stacked on the substrate. | 06-17-2010 |
| 20100320540 | SEMICONDUCTOR DEVICE STRUCTURE AND FABRICATING METHOD THEREOF - A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resistor region. The resistor includes a first dielectric layer, a metal layer, a second dielectric layer, and a semiconductor layer sequentially stacked on the substrate. The first gate structure is disposed on the substrate within the MOS transistor region. The first gate structure includes the first dielectric layer, the metal layer, and the semiconductor layer sequentially stacked on the substrate. | 12-23-2010 |
| 20110073957 | METAL GATE TRANSISTOR WITH RESISTOR - A resistor is disclosed. The resistor is disposed on a substrate, in which the resistor includes: a dielectric layer disposed on the substrate; a polysilicon structure disposed on the dielectric layer; two primary resistance structures disposed on the dielectric layer and at two ends of the polysilicon structure; and a plurality of secondary resistance structures disposed on the dielectric layer and interlaced with the polysilicon structures. | 03-31-2011 |
| Patent application number | Description | Published |
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| 20090121966 | MULTIMODE ANTENNA - A multimode antenna that integrates antennae of at least three modes includes antenna radiation elements of at least three modes and a common ground element. In conventional wireless communication devices, in order to achieve the multiplexing effect, a plurality of antennae is built therein, which cannot meet the requirements for both multiplexing and small size. The multimode antenna integrates antennae of a plurality of modes together and shares one ground element, which not only reduces the volume of the antenna, but also achieves a multimode antenna for a multiplex device. | 05-14-2009 |
| 20090128415 | ULTRA-WIDE-BAND ANTENNA - An ultra-wide-band antenna includes a radiation element, an insulating substrate, a ground element, and a signal line. The insulating substrate is fixed on the ground element, the radiation element is disposed on the insulating substrate for receiving and transmitting a radio signal; the signal line is connected to the radiation element and contacting the ground element for feeding a signal to the radiation element and receiving the radio signal received by the radiation element. The ground element is used to replace a large-area conductive plate of a conventional ultra-wide-band antenna, so as to reduce the volume of the ultra-wide-band antenna, and thus the ultra-wide-band antenna can be placed into an electronic device while occupying smaller space and capable of being miniaturized, thereby realizing a miniaturized ultra-wide-band electronic device. | 05-21-2009 |
| 20090307872 | PIVOT STRUCTURE - A pivot structure is used to pivotally connect a first object to a second object includes a pivot hole and a pivot portion. The pivot hole is disposed at the second object, while the pivot portion is disposed at the first object. The pivot portion has a discontinuous ring with an outside diameter lager than an aperture of the pivot hole. The discontinuous ring can be squeezed to be deformed and be inserted into the pivot hole, such that the discontinuous ring tightly bears against the pivot hole to maintain an included angle between the first object and the second object at any time, thereby a user can steplessly adjust the included angle of the two objects. | 12-17-2009 |
| 20090315780 | INVERTED-F ANTENNA - An inverted-F antenna includes a radiation element, a ground element, a loop conductive pin, a signal feed-in portion, and a signal line. The antenna is designed as the signal feed-in portion and the ground portion sharing a single pin, thus solving the problem of the conventional inverted-F antenna having complicated components and increased cost due to using two independent components in parallel including a conductive pin and a signal feed-in portion for grounding and receiving feed-in signals. | 12-24-2009 |
| 20100045533 | DUAL-POLARIZED ANTENNA - A dual-polarized antenna device includes a base plate, a first polarized antenna, and a second polarized antenna. The second polarized antenna is arranged perpendicularly crossing the first polarized antenna without contact. The first polarized antenna and the second polarized antenna are respectively connected to the base plate integrally and inseparably, such that the dual-polarized antenna device has a reduced cost and is more convenient to assemble. | 02-25-2010 |
