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| 20100085786 | CONVERTIBLE CHARGE-PUMP CIRCUIT - A convertible charge-pump circuit includes: a charging circuit having a plurality of charging capacitors and a pumping circuit having an output port coupled to a pumping capacitor. The charging circuit is configured for charging the charging capacitors to store a plurality of potential differences, respectively, when the convertible charge-pump circuit is in a charging phase. The pumping circuit is configured for selecting at least one charging capacitor from the charging capacitors charged in the charging phase to generate an output voltage level at the output port according to a potential difference stored in the selected charging capacitor when the convertible charge-pump circuit is in a pumping phase. | 04-08-2010 |
| 20100134177 | CHARGE PUMP CIRCUIT AND METHOD THEREOF - A charge pump circuit includes a charging capacitor, a plurality of pumping capacitors, a charging circuit, and a pumping circuit. The charging circuit is configured for charging the charging capacitor when the charge pump circuit is under a charging phase; and the pumping circuit is configured for coupling the charging capacitor charged in the charging phase to a pumping capacitor to generate an output voltage level at the pumping capacitor according to a potential difference stored in the charging capacitor, when the charge pump circuit is under a pumping phase. | 06-03-2010 |
| 20100171538 | BUFFER FOR DRIVING CIRCUIT AND METHOD THEREOF - A buffer for a driving circuit includes a first transistor, a second transistor and a slew rate controlling circuit. The first transistor serves to provide a current to an output terminal. The second transistor serves to sink a current from the output terminal. The slew rate controlling circuit serves to control slew rate of at least one of the first transistor and the second transistor according to the input signal. The managing circuit serves to prevent the first transistor and the second transistor from turning on simultaneously. | 07-08-2010 |
| 20100326744 | TOUCH PANEL - A touch panel has a panel capacitor, a first capacitor, and a second capacitor. The panel capacitor and the first capacitor are charged and discharged cyclically according to a first phase signal and a second phase signal, such that an input voltage associated with the panel capacitor and the first capacitor is applied to a control circuit. The control circuit charges and discharges a second capacitor based on the input voltage and a reference voltage to compensate the difference between the input voltage and the reference voltage. The capacitance of the panel capacitor could be calculated based on the frequency of charging and discharging the second capacitor. | 12-30-2010 |
| 20100328252 | SWITCHED-CAPACITOR TRACKING APPARATUS OF TOUCH PANEL AND OPERATING METHOD THEREOF - A switched-capacitor tracking apparatus including a variable capacitor, an auxiliary capacitor, and a plurality of switches, and an operating method thereof are provided. In a charge period, a first reference voltage charges a panel capacitor, and a second reference voltage charges the variable capacitor. In a detection period, a control circuit detects a parallel connected voltage of the panel capacitor and the variable capacitor. The control circuit compares a third reference voltage and the parallel connected voltage. According to a comparison result, the control circuit dynamically determines whether to parallel connect the auxiliary capacitor to the variable capacitor. If all the comparison results accumulated in a statistics period are a first logic value, then the control circuit increases a capacitance of the variable capacitor. Moreover, if all the comparison results are a second logic value in the statistics period, then the control circuit decreases the capacitance of the variable capacitor. | 12-30-2010 |
| 20110050189 | BOOSTER AND VOLTAGE DETECTION METHOD THEREOF - A booster and a voltage detection method thereof are provided herein. The booster includes a charge pump circuit and a voltage detection circuit. The charge pump circuit is controlled by a switching signal to generate an actual voltage according to the basis voltage, wherein the actual voltage is a product of the basis voltage multiplied by a first preset multiplier. The voltage detection circuit is coupled to the charge pump circuit. The voltage detection circuit selects one of a plurality of first multipliers to serve as the first preset multiplier according to a comparison result between the basis voltage and a target voltage, and generates the switching signal corresponding to the first preset multiplier. Therefore, the booster can properly select the first preset multiplier to generate the actual voltage as the basis voltage changes. | 03-03-2011 |
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| 20100103506 | RECONFIGURABLE OPTICAL AMPLIFIER, REVERSIBLE OPTICAL CIRCULATOR, AND OPTICAL SIGNAL TRANSMISSION SYSTEM - A reconfigurable optical amplifier including a first reversible optical circulator and an optical gain device is provided. The first reversible optical circulator has four I/O ports which are respectively referred to as a first terminal, a second terminal, a third terminal, and a fourth terminal. The four I/O ports sequentially transmit an optical signal in a transmission direction of a forward circulation or a backward circulation according to a control signal. The first terminal is isolated from the adjacent fourth terminal. The optical gain device is connected between the first terminal and the adjacent fourth terminal. The second terminal and the third terminal are respectively connected to a first communication node and a second communication node. | 04-29-2010 |
| 20100169402 | FAST FOURIER TRANSFORM PROCESSOR - An FFT processor is disclosed, which includes a first multi-pipelined MDC unit, a second multi-pipelined MDC unit and a switching network. The first multi-pipelined MDC unit and the second multi-pipelined MDC unit respectively employ a plurality of MDC circuits to change the positions of the delayers thereof in parallel way. By changing the operation time sequence of the signals in the first multi-pipelined MDC unit and the second multi-pipelined MDC unit, the first multi-pipelined MDC unit is able to directly send the operation results to the second multi-pipelined MDC unit through the switching network. | 07-01-2010 |
| 20100247100 | METHOD FOR RECEIVING OPTICAL ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING SIGNAL AND RECEIVER THEREOF - A method for receiving an optical orthogonal frequency-division multiplexing (OFDM) signal and a receiver thereof are applicable to an optical OFDM system. The receiving method includes the following steps. An optical signal is converted into a digital signal. A symbol boundary of the digital signal is estimated. A guard interval of the digital signal is removed according to the symbol boundary, so as to generate an electrical signal. The electrical signal is converted into a plurality of frequency domain sub-carriers in a fast Fourier transform (FFT) manner. A timing offset is estimated with pilot carriers and frequency domain sub-carriers corresponding to the same symbol period. The estimated symbol boundary is compensated with the timing offset. Each frequency domain sub-carrier includes a plurality of pilot carrier signals. Through the receiving method, the timing offset arisen from chromatic dispersion of an optical fiber is effectively estimated and adopted for compensation. | 09-30-2010 |
| 20100278531 | OPTICAL SWITCH AND OPTICAL SIGNAL COMMUNICATION SYSTEM - An optical switch including a first reversible optical circulator and a second reversible optical circulator is provided. Each of the first reversible optical circulator and the second reversible optical circulator respectively has four I/O ports, wherein the four I/O ports are respectively a first terminal, a second terminal, a third terminal, and a fourth terminal, the four terminals sequentially transmit an optical signal in a forward circulation or a backward circulation according to a control signal, and an open end is formed between the first terminal and the adjacent fourth terminal. The open ends of the first reversible optical circulator and the second reversible optical circulator are coupled with each other. | 11-04-2010 |
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| 20110128086 | CIRCUIT BOARD WITH DECREASED CROSSTALK - A circuit board includes a signal line plane and a reference plane. The signal line plane has at least a first transmission line and a second transmission line formed thereon. The reference plane has a conductive region and at least a non-conductive region. The first transmission line and the second transmission line overlap the conductive region in a thickness direction of the circuit board. The non-conductive region includes at least a first part and a second part connected to the first part, where the second part is positioned between the projection of the first transmission line on the reference plane and the projection of the second transmission line on the reference plane, and has no intersection with at least one of the projection of the first transmission line and the projection of the second transmission line. | 06-02-2011 |
| 20110185336 | IMPEDANCE DESIGN METHOD - The invention discloses an impedance design method for a power network of a core chip within a chipset having N input/output (I/O) ports coupled to a voltage source which have an observation I/O port. The method includes calculating a first set of impedances at a predetermined frequency or the observation I/O port, if the voltage source is internally coupled to the N I/O ports within the chipset, and calculating a second set of impedances at the predetermined frequency for the observation I/O port, if the voltage source is externally coupled to the N I/O ports through a carrier coupling the core chip to the voltage source. The first set of impedances to the second set of impedances are compared, and the impedance of the power network or the impedance of the carrier is adjusted according to the comparison result. | 07-28-2011 |
| 20110213604 | SIGNAL ANALYZING METHOD FOR ELECTRONIC DEVICE HAVING ON-CHIP NETWORK AND OFF-CHIP NETWORK - The present invention provides a signal analyzing method for an electronic device having an on-chip network and an off-chip network. Compared with the conventional signal analyzing method for an electronic device having an on-chip network and an off-chip network, the signal analyzing method of the present invention is able to provide a complete electrical connection and accurate electrical characteristics for an electronic device having an on-chip network and an off-chip network. | 09-01-2011 |
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| 20090110343 | METHOD FOR MODULATING REFRACTIVE INDICES OF OPTICAL FIBER GRATINGS - The present invention proposes a method for modulating refractive indices of optical fiber gratings, wherein the UV exposure on a least one assigned location of an optical fiber grating is divided into to two UV shots, and the intensities or phases of the two UV shots, which expose the location sequentially, are controlled to make the total exposure intensity of one assigned location maintained at a fixed value, whereby the interference fringes, which are created by a superposition of the two UV shots, have fixed phases and adjustable intensities, and whereby the dc index of the optical fiber grating maintains fixed and the ac index independently adjustable. | 04-30-2009 |
| 20100284022 | DISPLACEMENT MEASUREMENT SYSTEM AND METHOD THEREOF - A displacement measurement system including a coherent light source, a two-dimensional grating, a photo sensor, and a signal processing apparatus is provided. After the coherent light beam enters the two-dimensional grating, a zero-order light beam and a plurality of first-order diffraction beams are generated. The zero-order light beam interferes with two of the first-order beams in different directions, so that corresponding interference fringes are formed on the photo sensor. Accordingly, when the two-dimensional grating moves, displacements of the two-dimensional grating in the different directions are obtained by calculating phase differences of the interference fringes in the corresponding directions. Besides, when the two-dimensional grating rotates, the rotational angle of the two-dimensional grating is obtained from the corresponding rotational angle of a diffraction pattern of the first-order diffraction beams. | 11-11-2010 |
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| 20090216940 | Method for accessing a first-in-first-out (FIFO) buffer and a FIFO controller therefor - A method of for accessing a first-in-first-out (FIFO) buffer is provided. The method comprises the following two steps. Firstly, issue a request to access a memory when the amount of the data buffered in the FIFO buffer is more than a threshold. Second, pop the data buffered in the FIFO buffer out to access the memory when the request is granted. If the FIFO buffer is a single-port FIFO buffer, the threshold is set based on the burst length of one burst of data. If the FIFO buffer is a dual-port FIFO buffer, the threshold is set based on the speed at which the data is pushed into the FIFO buffer and the speed at which the data is popped out of the FIFO buffer. | 08-27-2009 |
| 20090289947 | SYSTEM AND METHOD FOR PROCESSING DATA SENT FROM A GRAPHIC ENGINE - An image processing system is provided comprising a memory, a graphic engine and a data processing module. The graphic engine generates a sequence of input data, wherein each of the input data has an address information pointing to a corresponding memory address of the memory. The data processing module sequentially receives the input data from the graphic engine, buffers each of the received data into a corresponding buffer according to the address information thereof, and outputs buffered data in a buffer to the memory when the buffer is full, wherein memory addresses of the outputted data are continuous. | 11-26-2009 |
| 20100329323 | DATA RECEIVER AND METHOD FOR ADJUSTING THE SAME - A data receiver and a method for adjusting the same are provided. The data receiver has an equalizer, a clock data recovery unit, an equalizer controller, and a decoder. The equalizer compensates incoming signal according to a configuration, and outputs corrected signal. The CDR unit uses a clock to sample the corrected signal from the equalizer and generates phase information of the clock. The decoder decodes the raw data. Each cycle of the clock is divided into a plurality of phases, and the phase information indicates the one of the phases that the corrected signal sampled therein. In a testing mode, the equalizer controller applies a plurality of setup values to the configuration individually and records the phase information for tuning the configuration. Therefore, the accuracy of the equalizer is improved and the good signal quality is obtained. | 12-30-2010 |
| 20110194831 | DEVICE AND METHOD FOR CONTROLLING CLOCK RECOVERY - A clock recovery device includes a PLL circuit and a tuning circuit. The PLL circuit includes a first frequency divider, a second frequency divider, and a clock recovery unit. The first frequency divider divides a first frequency of the input clock by a first divisor to generate a reference signal. The second frequency divider divides a second frequency of the output clock by a second divisor to generate a feedback signal. The clock recovery unit is coupled to the first frequency divider and the second frequency divider, for re-building and providing the output clock according to the reference signal and the feedback signal. The tuning circuit is coupled to the PLL circuit, for tuning at least one of the first divisor and the second divisor of the PLL circuit according to a buffer status information of a data buffer. | 08-11-2011 |
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| 20090041091 | Receiver with the function of adjusting clock signal and an adjusting method therefor - A receiver having a first clock signal is provided. The first frequency of the first clock signal is adjusted to be close to a second frequency of a second clock signal of a transmitter. The receiver includes a clock generator, a processor and a controller. The clock generator is for generating the first clock signal. The processor is for outputting a first control signal to control the clock generator to adjust the first frequency to be close to the second frequency when an absolute value of a current difference between the first and the second frequencies at a current time point is larger than a threshold. The controller is for outputting a second control signal to control the clock generator when the absolute value of the current difference is smaller than the threshold, so as to reduce the load of the processor. | 02-12-2009 |
| 20090041127 | FLEXIBLE LENGTH DECODER - A flexible length decoder including a plurality of data filter units and a control unit is provided. The data filter units perform a comparing operation on a data stream according its corresponding pattern and output a comparing result. The control unit controls the configurations of the data filter units. If the space of any one of the data filter units for storing the pattern is not enough to record the required pattern, the control unit combines two or more data filter units into an equivalent data filter unit, such that the equivalent data filter unit stores the pattern and performs the comparing operation. | 02-12-2009 |
| 20090043787 | DECODER AND OPERATION METHOD THEREOF - A decoder and an operation method thereof are provided. The decoder includes a pre-unit, a database, a data filter, and a scheduler. The pre-unit provides packet information of a data stream. The database records a plurality of parameter sets. The scheduler fetches the corresponding parameter sets from the database according to the packet information, and saves the parameter sets into the data filter. The data filter compares the data stream with the saved parameter sets and outputs a comparing result. Therefore, the present invention reduces the cost of the decoder. | 02-12-2009 |
| 20090074376 | APPARATUS AND METHOD FOR EFFICIENT AV SYNCHRONIZATION - An apparatus and a method for an efficient audio/video (AV) synchronization are provided. The apparatus includes a parser, a frame memory, a video start code (VSC) detector and a video decoder. The parser is used for analyzing a packetized elementary stream (PES) and outputting a video stream, an address information and at least one time stamp, in which the video stream includes a frame and at least one VSC corresponding to the frame. The frame memory is used for temporarily storing the video stream according to the address information. The VSC detector is used for retrieving the VSC of the video stream. The video decoder is used for selecting the frame from the frame memory according to the VSC and the address information provided by the VSC detector. | 03-19-2009 |
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| 20100233077 | Solid Hydrogen Fuel and Method of Manufacturing and Using the Same - A solid hydrogen fuel is formed into a solid pressure-formed block. The method of manufacturing the solid hydrogen fuel includes following steps. First, at least a hydride powder and at least a hydrogen releasing catalyst powder are mixed well. Next, the mixed powder is bonded into a block by pressure. When in use, the solid hydrogen fuel is mixed with water to produce hydrogen. The hydride powder and water bring about a hydrogen releasing reaction. The hydride releasing catalyst powder is used for catalyzing the hydrogen releasing reaction to produce hydrogen. The solid hydride has higher hydrogen production and can release hydrogen completely. | 09-16-2010 |
| 20100234211 | Catalyst for Catalyzing Hydrogen Releasing Reaction and Manufacturing Method Thereof - A method of manufacturing a catalyst for catalyzing hydrogen releasing reaction includes following steps. First, a solution with metal catalyst ions is provided. Next, several catalyst supports are provided. Each catalyst support includes several chelating units. Then, the catalyst supports are mixed with the solution, so that the metal catalyst ions in the solution chelate with the chelating units on the surface of each catalyst support. Subsequently, the metal catalyst ions chelating with the surface of the catalyst supports are reduced, so that metal catalyst nano-structures and/or metal catalyst atoms are coated on the surface of the catalyst supports, for forming catalysts. | 09-16-2010 |
| 20100266910 | HYDROGEN SUPPLY DEVICE - Disclosed is super water absorbent polymers applied to contain water, and the polymers may further collocate with water absorbent cotton materials to accelerate water absorbent rates. The described water absorbent materials are combined with solid hydrogen fuel to complete a stable hydrogen supply device. Performance of the hydrogen supply device is not effected by inverting or tilting thereof. Even if inverting or tilting the device, the water contained in the water absorbent materials does not flow out from the device. As such, the MEA film in the fuel cell connected to the hydrogen supply device will not blocked by the water, thereby avoiding the fuel cell performance degradation even breakdown. | 10-21-2010 |
| 20100279183 | FLEXIBLE POWER SUPPLY - Disclosed is a flexible power supply including a hydrogen supply device connected to a flexible fuel cell, wherein the hydrogen supply device includes a moldable hydrogen fuel. In one embodiment, the flexible fuel cell is a sheet structure, and the hydrogen supply device is a flexible flat bag, wherein the fuel cell and the hydrogen supply device are adhered to complete a sheet of a flexible power supply. The sheet of flexible power supply can be put in the pocket of cloth or baggage, or directly sewn on the outside of cap or overcoat. | 11-04-2010 |
| 20100285376 | MAGNETIC CATALYST AND METHOD FOR MANUFACTURING THE SAME - Disclosed is a magnetic catalyst formed by a single or multiple nano metal shells wrapping a carrier, wherein at least one of the metal shells is iron, cobalt, or nickel. The magnetic catalyst with high catalyst efficiency can be applied in a hydrogen supply device, and the device can be connected to a fuel cell. Because the magnetic catalyst can be recycled by a magnet after generating hydrogen, the practicability of the noble metals such as Ru with high catalyst efficiency is dramatically enhanced. | 11-11-2010 |
| 20100304238 | Solid Hydrogen Fuel and Methods of Manufacturing and Using the Same - A solid hydrogen fuel, in a form of a solid block, includes at lease a hydride powder well-mixed with at lease a solid catalyst. Method of manufacturing the solid hydrogen fuel includes steps of well-mixing the hydride powder and the solid catalyst; and compressing the mixed powders to form a solid block. When use of the solid hydrogen fuel is required, water is mixed into the hydride powder for generating hydrogen gas, wherein the hydride powder is catalyzed by the solid catalyst and reacts with water to generate hydrogen gas. By using the solid hydrogen fuel, large amount of hydrogen gas can be generated completely in an effective time. | 12-02-2010 |
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| 20090058879 | Liquid crystal display and the driving method thereof - A liquid crystal display (LCD) including an LCD panel and a driving unit is provided. The LCD panel has a red pixel, a green pixel, and a blue pixel. The driving unit is applied for receiving a red data signal, a green data signal, and a blue data signal, and outputting a red voltage signal, a green voltage signal, and a blue voltage signal for driving the red pixel, the green pixel, and the blue pixel respectively. When the red data signal, the green data signal, and the blue data signal all correspond to a specific gray level, the pixel luminance of the blue pixel is lower than the pixel luminance of the red pixel as well as the pixel luminance of the green pixel. | 03-05-2009 |
| 20110063337 | Flat Panel Display Having Overdrive Function - A method of operating a display includes deriving first pixel data for overdriving pixel circuits of the display from initial gray levels to target gray levels based on values in the first and second lookup tables, rendering the second lookup table unavailable in memory in response to a change in a temperature of the display, and deriving second pixel data using the first lookup table for overdriving the pixel circuits when the second lookup table is unavailable in the memory. | 03-17-2011 |
