Patent application number | Description | Published |
20100332731 | FLASH MEMORY APPARATUS AND METHOD FOR OPERATING THE SAME AND DATA STORAGE SYSTEM - A flash memory apparatus is provided. In one embodiment, the flash memory apparatus with a plurality of operation states is coupled to a host and includes a controller having an engine and a register array. A state machine logic circuit of the engine is provided for transition of the operation states and the register array provides state transition information. When a command is received from the host, the engine obtains the state transition information from the register array according to a first operation state and determines whether the valid command is one of a plurality of valid commands corresponding to the first operation state. The state machine logic circuit determines transition to the operation states according to the state transition information. The transition of the first operation state to the second operation state is performed in response to the valid command. | 12-30-2010 |
20110197107 | NON-VOLATILE MEMORY DEVICE AND DATA PROCESSING METHOD THEREOF - A data processing method for a non-volatile memory device is provided. The non-volatile memory device includes a controller and a NAND flash memory. First, a target command and a corresponding target address are serially transmitted from the controller to the NAND flash memory. Then, the NAND flash memory calculates a first value according to the target address. Moreover, a cyclic redundancy check code corresponding to the target address is transmitted from the controller transmits to the NAND flash memory. Next, the NAND flash memory determines whether a transmission error has occurred by performing a cyclic redundancy check according to the first value and the cyclic redundancy check code. When the transmission error has occurred, a status register is set to inform the controller to re-transmit the target command and the corresponding target address. | 08-11-2011 |
20120166710 | Flash Memory Device and Data Access Method Thereof - In one embodiment, the flash memory device is coupled to a host, and comprises a flash memory and a controller. The flash memory is used for data storage. The controller receives write data and a write logical address from the host, calculates a running sum value according to the write data, determines whether target data with a running sum equal to the running sum value is stored in the flash memory, reads the target data from the flash memory when the target data is stored in the flash memory, determines whether the target data is identical to the write data, and records a mapping relationship between an original logical address of the target data and a write logical address of the write data in a remapping table without writing the write data to the flash memory when the target data is identical to the write data. | 06-28-2012 |
20120166717 | Data Storage Device and Operation Method Thereof - In one embodiment, a data storage device comprises a first flash memory, a second flash memory, and a controller. The first flash memory stores a first data shaping driver, wherein the first data shaping driver performs a data shaping function. The second flash memory stores user data. The controller enables the first flash memory and disables the second flash memory after the data storage device is turned on, detects whether a second data shaping driver has been installed on a host when the host is connected to the data storage device, installs the first data shaping driver to the host as the second data shaping driver if the second data shaping driver has not been installed on the host, and disables the first flash memory and enables the second flash memory after the first data shaping driver has been installed to the host. | 06-28-2012 |
20120166718 | Flash Storage Device and Data Writing Method Thereof - A flash storage device comprises a flash memory and a controller. The flash memory comprises a plurality of blocks comprising a plurality of ordinary pages and a plurality of reserved pages. The controller receives a current write command and write data from a host, determines a mother block and an FAT block corresponding to the write command, divides data of the mother block and data of the FAT block into a plurality of original data segments and a plurality of updating data segments, integrates the original data segments with the updating data segments to obtain integrated data segments, writes the integrated data segments to an integrated block respectively in a plurality of processing periods of a plurality of subsequent write commands, and writes the subsequent write data to the reserved pages of a plurality of subsequent blocks. | 06-28-2012 |
20120246394 | Flash Memory Device and Data Writing Method for a Flash Memory - A data writing method for a flash memory. First, a plurality of blocks of a flash memory is classified into a plurality of block groups according to the erase counts of the blocks. A logical address range of a host is then divided into a plurality of logical address sections respectively corresponding to the block groups. Write data is then received from the host. A target logical address section to which the logical address of the write data belongs is then determined. A target block group corresponding to the target logical address section is then determined. A target block is then selected from the blocks of the target block group. The write data is then written to the target block. | 09-27-2012 |
20120271986 | Flash Memory Device and Data Protection Method Thereof - A data protection method for a flash memory device. In one embodiment, the flash memory device comprises a flash memory for storing protected data. After the flash memory device is coupled to a host, a plurality of current read addresses of a plurality of read commands sent from the host to the flash memory device are recorded. The current read addresses are then compared with a plurality of predetermined read addresses. When the current read addresses are not identical to the predetermined read addresses, the flash memory device is made to enter a data protection mode. When the flash memory device is in the data protection mode, if the flash memory device receives a plurality of data access commands, the data access commands are processed according to a protection mode setting parameter to prevent the protected data from being accessed by the host. | 10-25-2012 |
20130138871 | Flash Memory Device and Data Access Method for Same - The invention provides a flash memory device. In one embodiment, the flash memory device is coupled to a host, and comprises a flash memory, a controller, and a random access memory. The flash memory comprises a plurality of blocks for data storage. The random access memory stores a read count table for recording read counts of the blocks. When the read counts of a plurality of original blocks are greater than a threshold according to the read count table, the controller obtains a plurality of spare blocks from the flash memory as mirror blocks respectively corresponding to the original blocks, and copies a portion of a plurality of data pages of the original blocks to the mirror blocks whenever the original blocks are read until all of the data pages of the original blocks have been copied to the mirror blocks. | 05-30-2013 |
20130276130 | Secure Digital Card, and Secure Digital Card Operating System and Operating Method - A Secure Digital (SD) card, and an operating system and an operating method for the SD card are disclosed. The disclosed SD card has a Flash memory and a controller. The Flash memory contains a data storage space and a Content Protection Recorded Media (CPRM) support space. The controller executes a firmware of the SD card, such that read/write commands provided from a host for the CPRM support space are regarded and executed as security commands and a CPRM mechanism is operated over the data storage space. | 10-17-2013 |
20140019671 | Flash Memory Controllers and Error Detection Methods - A flash memory controller includes a read/write unit, a state machine, a processing unit, and an auxiliary unit. The read/write unit is connected to a flash memory and performs a writing command or a reading command. The state machine is configured to determine a state of the flash memory controller. The processing unit is connected to the read/write unit and the state machine and configured to control the read/write unit. The auxiliary unit is connected to a first data line and a second data line and the processing unit and configured to receive and store a string output from the processing unit. The auxiliary unit outputs the string through the first and second data lines when the flash memory controller completes a writing data transmission. | 01-16-2014 |
20140036603 | Storage Medium and Transmittal System Utilizing the Same - A storage medium including a processing module and a cell array. The processing module receives test data according to a write command. The cell array stores the test data. The processing module receives verify data according to a comparison command, reads the test data stored in the cell array to generate access data, and compares the access data with the verify data to generate a compared report. | 02-06-2014 |
20140040413 | Storage Medium, Transmittal System and Control Method Thereof - A storage medium including a first transmittal module and a control module. The first transmittal module includes a plurality of first transmittal pads. The control module determines whether a level state of the first transmittal module is equal to a pre-determined state. When the level state is equal to the pre-determined state, the control module operates in a secure digital (SD) mode. When the level state is not equal to the pre-determined state, the control module operates in an embedded multimedia card (eMMC) mode. | 02-06-2014 |
20140068147 | Flash Memory Devices and Controlling Methods Therefor - A flash memory controller is provided. The flash memory controller includes a read/write unit, a state machine, a processing unit, and a reserve unit. The read/write unit is coupled to a flash memory. The read/write unit is configured to perform a write command or a read command. The state machine is configured to determine a state of the flash memory controller. The processing unit is coupled to the read/write unit and the state machine. The processing unit is configured to control the read/write unit. The reserve unit is coupled to a first data line, a second data line, and the read/write unit. When the flash memory controller is operating abnormally, the reserve unit receives an external signal via the first data line and the second data line and controls the read/write unit according to the external signal. | 03-06-2014 |
20140136929 | STORAGE MEDIUM, SYSTEM AND METHOD UTILIZING THE SAME - A storage medium receiving write data provided by a host device, providing read data to the host and including a first module and a second module is disclosed. The first module includes a first memory cell and a first controller. The first memory cell stores the write data. The first controller reads the first memory cell to generate a first accessing result. The second module includes a second memory cell and a second controller. The second memory cell stores the write data. The second controller reads the second memory cell. When the first accessing result has an error and the error cannot be corrected by the first controller, the first controller requests the second controller to read the second memory cell to generate a second accessing result, and the second controller serves the second accessing result as the read data and provides the read data to the host. | 05-15-2014 |