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Hsu, Miao-Li
Cheng-Ho Hsu, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20100314748 | Chip packaging method and structure thereof - The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires is bending in the middle part to be higher than a predetermined height, and its ends are respectively electrically connected with two of the bonding pads. A molding layer is packaged on the chip and the molding layer is higher than the predetermined height. The molding layer is sliced at the predetermined height. Two upper breakpoints of each metal wire are exposed and a substrate is attached onto the molding layer. A plurality of circuit contacts of the substrate are respectively electrically coupled with the upper breakpoints. Whereby, the invention is capable of reducing the length of the metal wires in order to improve transmission speed, but also to reduce the volume of the packaging structure. | 12-16-2010 |
Chih-Chieh Hsu, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20080308808 | Thin film transistor array substrate and method for fabricating same - An exemplary TFT array substrate includes an insulating substrate, a gate electrode provided on the insulating substrate, a gate insulating layer covering the gate electrode and the insulating layer, an amorphous silicon (a-Si) pattern formed on the gate insulating layer, a heavily doped a-Si pattern formed on the a-Si pattern, a source electrode formed on the gate insulating layer and the heavily doped a-Si pattern and a drain electrode formed on the gate insulating layer and the heavily doped a-Si pattern. The source electrode and the drain electrode are isolated by a slit formed between the source electrode and the drain electrode, and the a-Si pattern includes a high resistivity portion corresponding to the slit whose resistance is higher than a resistance of the a-Si material. | 12-18-2008 |
| 20090262054 | Active matrix display device with dummy data lines - An exemplary active matrix display device includes a display panel comprising a plurality of scanning lines extending along a horizontal axis, a plurality of data lines extending along a vertical axis, and a plurality of dummy data lines. Two scanning lines and two data lines define two display pixels; each of the plurality of data lines is connected to at least two adjacent display pixels along the horizontal axis, and the at least two adjacent display pixels are driven by the two scanning lines, respectively. Each of the plurality of dummy data lines is disposed between two random adjacent data lines and is provided with gray scale voltage signals by a driving circuit of the display panel, thereby forming coupling capacitances between each of the plurality of dummy data lines and two pixel electrodes of the two display pixels. | 10-22-2009 |
Fu-Yuan Hsu, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20090261738 | Driving method for photo transistor and photo sensor and flat panel display using the same - A driving method for a photo transistor includes providing an alternating current (AC) voltage to a gate electrode of the photo transistor. A photo sensor using the driving method and a flat panel display using the photo sensor are also provided. | 10-22-2009 |
Po-Ching Hsu, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20110068333 | PIXEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a pixel structure includes providing a substrate including a transistor region and a pixel region, forming at least one gate electrode on the transistor region, forming an insulating layer on the substrate to overlay the gate electrode, and forming a patterned semi-conductive layer on the surface of a portion of the insulating layer disposed on the transistor region and the pixel region. A patterned first protective layer is formed on a portion of the patterned semi-conductive layer corresponding to the gate electrode, and the patterned semi-conductive layer is doped without being overlaid by the patterned first protective layer. | 03-24-2011 |
Yu-Ju Hsu, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20090002602 | Liquid crystal display with micro-structures and liquid crystal display driving method - An exemplary liquid crystal display ( | 01-01-2009 |
| 20090103311 | Diffuser plate, method for manufacture thereof, and backlight module and liquid crystal display using the same - An exemplary diffuser plate includes a diffuser film. The diffuser film includes a plurality of diffusion particles distributed therein. A refractive index of the outer shell of each diffusion particle exceeds that of the inner surface of each diffusion particle. | 04-23-2009 |
| 20090114938 | Light emitting diode with sealant having filling particles - An exemplary light emitting diode (LED) includes an LED chip and a transparent sealant covering the LED chip. The sealant contains transparent filling particles and phosphor particles, wherein the filling particles are adjacent each other. Intervals are defined between the filling particles, and the phosphor particles are located in the intervals. | 05-07-2009 |
| 20090303415 | Backlight module with reflective diffuser and liquid crystal display with same - An exemplary backlight module includes a first light source, and a diffusing film. The diffusing film includes a light incident surface adjacent to the first light source, a light emitting surface located at an opposite side thereof, and a plurality of first reflective portions provided at the light incident surface. A pitch between every two adjacent first reflective portions progressively increases with increasing distance away from the first light source. A liquid crystal display employing the backlight module is also provided. | 12-10-2009 |