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Hsu, Jhudong Township
Chen-Peng Hsu, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20100084958 | LED Structure, Manufacturing Method Thereof and LED Module - A light emitting diode (LED) structure, a manufacturing method thereof and a LED module are provided. The LED structure has temperature sensing function. The LED structure comprises a composite substrate and an LED. The composite substrate comprises a diode structure whose P-type semiconductor region or N-type semiconductor region has a predetermined doping concentration. The diode structure is a temperature sensor, and the sensitivity of the temperature sensor is based on the predetermined doping concentration. The LED is disposed on the composite substrate. The diode structure is used for sensing the heat emitted from the LED. | 04-08-2010 |
Chih-Ting Hsu, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20110029761 | Method and apparatus of reducing CPU chip size - A new compression method and apparatus compresses instructions embedded in a CPU chip which significantly reduces the density of storage device of storing the program. Multiple groups of instructions in the form of binary code are compressed separately by a mapping unit indicating the starting location of a group of instructions which helps quickly recovering the corresponding instructions. A mapping unit is applied to interpret the corresponding address of a group of data for quickly recovering the corresponding instructions for a CPU to execute smoothly. | 02-03-2011 |
Ching-Chi Hsu, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20090210009 | Vertebral Fixation Plate Assembly - A vertebral fixation plate assembly for insertion into the resection site between two vertebrae of a patients vertebral column and fixation to front or lateral side of the two adjacent vertebral bodies above and below the resection site by means of surgical implantation is disclosed to include a fixation plate that has a plurality of round holes and elongated holes and an opening on the middle, a plurality of bone screws respectively inserted through the round holes and elongated holes for fastening the fixation plate to the patient's vertebral column, and a cage affixed to the opening on the fixation plate and holding holes cut through the periphery for bone fusion and grow. The cage is linked to a vertebral spacer for artificial vertebrae by means of bone fusion to prevent vertebral sinking or slipping of the vertebral spacer and to improve bone fusion efficiency. | 08-20-2009 |
Ming-Chun Hsu, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20090180820 | Fuser device - A fuser device used with an imaging system for setting toner on a recording media is disclosed. The fuser device includes a heating element; a rolling piece for exerting pressure on the toner adhered on the recording media; a film for clamping the recording media with the rolling piece, the film being in the heat of the heating element to set the toner on the recording media; and a control structure. The control structure has a base piece on which a first engaging portion and a second engaging portion are disposed. The heating element, the first engaging portion and the second engaging portion form a loop and the film surrounds the loop. | 07-16-2009 |
R-Ming Hsu, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20090160870 | RUN-TIME RECONFIGURABLE FABRIC FOR 3D TEXTURE FILTERING SYSTEM - The present invention discloses a texture filtering system, comprising a sequence generator, a retrieve unit and a dispatch unit. The sequence generator generates an execution sequence in each duty cycle. The execution sequence is the priority of respectively retrieving multiple pixels from multiple queues. The retrieve unit outputs multiple Boolean signals based on the limitation of the total number of all-purpose texture filters and the above priority in a duty cycle for determining from which queues the pixels are retrieved to perform a texture filtering process, and the dispatch unit assigns the multiple texture filter formats of the pixels to be processed and the anisotropic ratios thereof to multiple address generators. Besides, the present invention utilizes Brute force method to enable multiple bilinear texture filters to satisfy the various texture filter formats of a pixel, thereby markedly reducing the space occupied by the texture filter in a 3D graphic processing unit, provided that the specifications of the address generators and texture cache memory are unchanged. | 06-25-2009 |
| 20100177096 | INSTRUCTION FOLDING MECHANISM, METHOD FOR PERFORMING THE SAME AND PIXEL PROCESSING SYSTEM EMPLOYING THE SAME - An instruction folding mechanism, a method for performing the instruction folding mechanism and a pixel processing system employing the instruction folding mechanism are described. The pixel processing system comprises an instruction folding mechanism and a pixel shader. The instruction folding mechanism folds a plurality of first instructions in a first program to generate a second program having at least one second instruction which is a combination of the first instructions. The pixel shader connected to the instruction folding mechanism fetches the second program to decode at least the second instruction having the combination of the first instructions to execute the second program. The instruction folding mechanism comprises an instruction scheduler, a folding rule checker, and an instruction combiner. The instruction scheduler connected to the folding rule checker is used to scan the first instructions according to static positions in order to schedule the first instructions in the first program. The folding rule checker checks the first instructions according to a folding rule whether the first instructions has data independency. The instruction combiner connected to the folding rule checker can combine the first instructions having the data independency to generate at least the second instruction. | 07-15-2010 |
Yu Cheng Hsu, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20100244963 | AMPLIFIER CIRCUIT AND THE CONTROLLING METHOD THEREOF - An amplifier circuit includes a first unit and a second unit. The first unit has a first amplifying unit, wherein the first amplifying unit provides a first main circuit unit and a first assistant circuit unit, and the first assistant circuit unit is configured for assisting the linearity of the first main circuit unit. The second unit includes a second amplifying unit, wherein the second amplifying unit has a second main circuit unit and a second assistant circuit unit, and the second assistant circuit unit is configured for assisting the linearity of the second main circuit unit. The first amplifying unit is configured for conducting in one half cycle of an input signal, and the second amplifying unit is configured for conducting in the other half cycle of the input signal. | 09-30-2010 |