Patent application number | Description | Published |
20110069715 | ACCELERATING DATA COMMUNICATION USING TUNNELS - Methods and systems are provided for increasing application performance and accelerating data communications in a WAN environment. According to one embodiment, packets are received at a flow classification module operating at the Internet Protocol (IP) layer of a first wide area network (WAN) acceleration device via a shared connection-oriented tunnel, which is operable to convey application layer data for connection-oriented applications between WAN acceleration devices. Packets that are classified as being associated with an existing connection-oriented flow are passed to a WAN socket operating at the transport layer. Based on the application protocol, the packets are passed to an application handler of multiple application handlers operating at the application layer each of which implements one or more application acceleration techniques for a particular poorly behaved WAN protocol. The existing connection-oriented flow is securely accelerated by performing one or more application acceleration techniques and applying one or more security functions. | 03-24-2011 |
20120023228 | METHOD, APPARATUS, SIGNALS, AND MEDIUM FOR MANAGING TRANSFER OF DATA IN A DATA NETWORK - A method and apparatus for managing a transfer of data in a data network identifies data associated with a communication session between a first node and a second node in the data network. Further processing of the communication session occurs when a portion of the communication session meets a criterion and the communication session is permitted to continue when the portion of the communication session does not meet the criterion. | 01-26-2012 |
20120023557 | METHOD, APPARATUS, SIGNALS, AND MEDIUM FOR MANAGING TRANSFER OF DATA IN A DATA NETWORK - A method and apparatus for managing a transfer of data in a data network identifies data associated with a communication session between a first node and a second node in the data network. Further processing of the communication session occurs when a portion of the communication session meets a criterion and the communication session is permitted to continue when the portion of the communication session does not meet the criterion. | 01-26-2012 |
20130311671 | ACCELERATING DATA COMMUNICATION USING TUNNELS - Methods and systems are provided for increasing application performance and accelerating data communications in a WAN environment. According to one embodiment, packets are received at a flow classification module operating at the Internet Protocol (IP) layer of a first wide area network (WAN) acceleration device via a private tunnel, which is operable to convey application layer data for connection-oriented applications between WAN acceleration devices. Packets that are classified as being associated with an existing connection-oriented flow are passed to a WAN socket operating at the transport layer. Based on the application protocol, the packets are passed to an application handler of multiple application handlers operating at the application layer each of which implements one or more application acceleration techniques for a particular application layer protocol known to behave poorly within a WAN environment. The existing connection-oriented flow is securely accelerated by performing one or more application acceleration techniques and applying one or more security functions. | 11-21-2013 |
20140366089 | METHOD, APPARATUS, SIGNALS, AND MEDIUM FOR MANAGING TRANSFER OF DATA IN A DATA NETWORK - A method and apparatus for managing a transfer of data in a data network identifies data associated with a communication session between a first node and a second node in the data network. Further processing of the communication session occurs when a portion of the communication session meets a criterion and the communication session is permitted to continue when the portion of the communication session does not meet the criterion. | 12-11-2014 |
20150334088 | ACCELERATING DATA COMMUNICATION USING TUNNELS - Methods and systems are provided for increasing application performance and accelerating data communications in a WAN environment. According to one embodiment, packets are received at a flow classification module operating at the Internet Protocol (IP) layer of a first wide area network (WAN) acceleration device via a private tunnel, which is operable to convey application layer data for connection-oriented applications between WAN acceleration devices. The packets are passed to a WAN socket operating at the transport layer. Based on the application protocol, the packets are passed to an application handler of multiple application handlers operating at the application layer each of which implements one or more application acceleration techniques for a particular application layer protocol known to behave poorly within a WAN environment. The existing connection-oriented flow is securely accelerated by performing one or more application acceleration techniques and applying one or more security functions. | 11-19-2015 |
20160080321 | INTERFACE GROUPS FOR RULE-BASED NETWORK SECURITY - Systems and methods for designating interfaces of a network security appliance as source/destination interfaces in connection with defining a security rule are provided. According to one embodiment, a security rule configuration interface is displayed through which a network administrator can specify parameters of security rules to be applied to traffic attempting to traverse the network security appliance. Information defining a traffic flow to be controlled by a security rule is received via the security rule configuration interface. The information defining the traffic flow includes: (i) a set of source interfaces; and (ii) a set of destination interfaces. At least one of which includes multiple interfaces such that the security rule permits the traffic flow to be defined in terms of multiple source interfaces and/or multiple destination interfaces. | 03-17-2016 |
Patent application number | Description | Published |
20090050918 | Phosphor, its preparation method and light emitting devices using the same - A phosphor can be excited by UV, purple or blue light LED, its preparation method, and light emitting devices incorporating the same. The phosphor contains rare earth, silicon, alkaline-earth metal, halogen, and oxygen, as well as aluminum or gallium. Its General formula of is aLn | 02-26-2009 |
20090153561 | METHOD AND APPARATUS FOR CAPTURING SCREEN BASED ON WDDM - The present invention relates to a technique of capturing screen. It discloses a method for capturing screen based on WDDM, which is aimed at solving the problem that the existing techniques are not suitable for Vista. The method comprise the steps of outputting commands of drawing image by an image display processing engine; analyzing the commands of drawing image by a filter driver, determining whether a display adapter can execute the commands in accordance with the registered capacities of the display adapter, and transmitting the commands to the display adapter if the display adapter can execute the commands; generating image data to be displayed in accordance with the commands by the display adapter, and transmitting the generated image data back to the filter driver; and buffering the image data to be displayed in the filter driver. The present invention also discloses a computer system with a plurality of displays employing the method described above. The present invention can be easily implemented, and the captured screen image and the image on the local display terminal have the same image quality. | 06-18-2009 |
20090218585 | ALUMINATE PHOSPHOR CONTAINING BIVALENCE METAL ELEMENTS, ITS PREPARATION AND THE LIGHT EMITTING DEVICES INCORPORATING THE SAME - A phosphor can be excited by UV, purple or blue light LED, its production and the light emitting devices. The general formula of the phosphor is Ln | 09-03-2009 |
20100003176 | PROCESS FOR PRETREATING ORGANIC EXTRACTANTS AND ITS PRODUCT AND APPLICATION - A process for pretreating organic extractants and its product and application in SX separation of rare earth. The pretreating method is that extractant and rare earth solution are mixed with powder or slurry of alkaline earth metal compound containing magnesium and/or calcium to realize pre-extraction, or the organic extractant are mixed with rare earth carbonate slurry to realize pre-extraction. When rare earth ion in aqueous phase is extracted into organic phase, the exchanged hydrogen ions enter into aqueous phase and dissolve the alkaline earth metal compound or the rare earth carbonate which helps to keep the acidity equilibrium of the system. The obtained organic extractant loaded with rare earth is used for unsaponificated SX separation of rare earth. | 01-07-2010 |
20100174832 | OUTPUT SYSTEM AND METHOD FOR RESTORING LOCATION ARRANGEMENT OF OUTPUT DEVICES - A docking device for restoring location arrangement of output devices is provided according to an aspect of the present invention. The docking device includes a transmission module configured to obtain output information from an information generation module and transmit it to an output device and an identifier storage module configured to store an identifier corresponding to the output device. An output system and method for restoring a location arrangement of output devices are also provided. | 07-08-2010 |
20110274597 | USE OF Mg(HCO3)2 AND/OR Ca(HCO3)2 AQUEOUS SOLUTION IN METAL EXTRACTIVE SEPARATION AND PURIFICATION - The application of aqueous solution of magnesium bicarbonate and/or calcium bicarbonate in the process of extraction separation and purification of metals is disclosed, wherein the aqueous solution of magnesium bicarbonate and/or calcium bicarbonate is used as an acidity balancing agent, in order to adjust the balancing pH value of the extraction separation process which uses an acidic organic extractant, improve the extraction capacity of organic phase, and increase the concentration of metal ions in the loaded organic phase. | 11-10-2011 |
20110280778 | METHOD OF PRECIPITATION OF METAL IONS - The present invention relates to a method of precipitation of metal ions. Mineral(s), oxide(s), hydroxide(s) of magnesium and/or calcium are adopted as raw materials, and the raw material(s) is processed through at least one step of calcination, slaking, or carbonization to produce aqueous solution(s) of magnesium bicarbonate and/or calcium bicarbonate, and then the solution(s) is used as precipitant(s) to deposit rare earth, such as nickel, cobalt, iron, aluminum, gallium, indium, manganese, cadmium, zirconium, hafnium, strontium, barium, copper and zinc ions. And at least one of metal carbonates, hydroxides or basic carbonates is obtained, or furthermore the obtained products are calcined to produce metal oxides. The invention takes the cheap calcium and/or magnesium minerals or their oxides, hydroxides with low purity as raw materials to instead common precipitants such as ammonium bicarbonate and sodium carbonate etc. The calcium, magnesium, carbon dioxide etc are efficiently and circularly used, and the environment pollution by ammonium-nitrogen wastewater, high concentration salts wastewater is avoided, and both of the discharge of greenhouse gas carbon dioxide and the production cost of metal are decreased. | 11-17-2011 |
20120254471 | OUTPUT SYSTEM AND METHOD FOR RESTORING LOCATION ARRANGEMENT OF OUTPUT DEVICES - A docking device for restoring location arrangement of output devices is provided according to an aspect of the present invention. The docking device includes a transmission module configured to obtain output information from an information generation module and transmit it to an output device and an identifier storage module configured to store an identifier corresponding to the output device. An output system and method for restoring a location arrangement of output devices are also provided. | 10-04-2012 |
20130014860 | Method for manufacturing melt-spinning alloys and apparatus thereofAANM Li; HongweiAACI BeijingAACO CNAAGP Li; Hongwei Beijing CNAANM Yu; DunboAACI BeijingAACO CNAAGP Yu; Dunbo Beijing CNAANM Luo; YangAACI BeijingAACO CNAAGP Luo; Yang Beijing CNAANM Li; KuosheAACI BeijingAACO CNAAGP Li; Kuoshe Beijing CNAANM Li; ShipengAACI BeijingAACO CNAAGP Li; Shipeng Beijing CNAANM Wang; MinAACI BeijingAACO CNAAGP Wang; Min Beijing CNAANM Yuan; YongqiangAACI BeijingAACO CNAAGP Yuan; Yongqiang Beijing CN - The application provides a method for manufacturing melt-spinning alloys and an apparatus thereof, which belongs to the technical field of metal materials and preparation thereof. The main feature of method including steps of melting alloy and jetting the molten alloy for rapid-quenching is that alloy melting and rapid-quenching are respectively implemented in independent environments, and the pressure of the two environments can be adjusted separately. The method can realize uniformity control of rapid-quenching velocity by controlling the melting and quenching pressure respectively, which has the advantages of increased rapid-quenching cooling rate, improved melt-spinning alloys thickness uniformity, reduced probability of nozzle clogging. | 01-17-2013 |
20130020527 | RARE-EARTH PERMANENT MAGNETIC POWDER, BONDED MAGNET, AND DEVICE COMPRISING THE SAME - A rare-earth permanent magnetic powder, a bonded magnet, and a device comprising the bonded magnet are provided. The rare-earth permanent magnetic powder is mainly composed of 7-12 at % of Sm, 0.1-1.5 at % of M, 10-15 at % of N, 0.1-1.5 at % of Si, and Fe as the balance, wherein M is at least one element selected from the group of Be, Cr, Al, Ti, Ga, Nb, Zr, Ta, Mo, and V, and the main phase of the rare-earth permanent magnetic powder is of TbCu | 01-24-2013 |
20130070376 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND ELECTROSTATIC DISCHARGE PROTECTION METHOD - An ESD protection circuit and method for its use are provided. The circuit comprising: a discharge path formed by first and second NMOS transistors which are sequentially connected between a ground and a power supply; an ESD event detection unit; first and second drive units respectively connected between an output of the ESD event detection unit and a gate of the first transistor and between the output of the ESD event detection unit and a gate of the second transistor. The first and second drive units respectively cause the first and second transistors to be turned on during an ESD event and to be turned off when there is no ESD event. | 03-21-2013 |
20140125906 | Array Substrate, Display Device and Method for Controlling Refresh Rate - The present invention discloses array substrate, display device and method for controlling refresh rate of an array substrate. The array substrate includes; a plurality of pixel structures each including gate line, data line, common electrode line, first switching element at intersection of the gate line and the data line, pixel electrode, second switching element, and first transparent electrode. Gate, source and drain of the first switching element are connected to the gate line, the date line and the pixel electrode, respectively. Gate, source and drain of the second switching element are connected to second switching controlling line, common electrode signal terminal and the first transparent electrode, respectively. A first storage capacitance is formed between the pixel electrode and the common electrode line and/or between the pixel electrode and the gate line, and a second storage capacitance is formed between the pixel electrode and the first transparent electrode. | 05-08-2014 |
20140149647 | METHOD AND ELECTRONIC APPARATUS FOR IMPLEMENTING MULTI-OPERATING SYSTEM - A method for implementing multi-operating system, applied to an electronic apparatus in which a Solid State Disk, SSD, is provided, the SSD including a plurality of partitions each of which corresponding to a unique logical snapshot table, and a plurality of operating systems being installed in different partitions respectively, wherein the method includes: determining a logical snapshot table corresponding to an operating system to be loaded currently as a first logical snapshot table during a Power On Self Test process of a basic input/output system; and determining a position of a partition in the SSD which corresponds to a reading/writing operation based on the first logical snapshot table if the reading/writing operation is performed on the SSD in a manner of Logical Block Addressing. | 05-29-2014 |
20140181379 | File Reading Method, Storage Device And Electronic Device - A file reading method, storage device and electronic device are described. The file reading method is applied to an electronic device that includes a nonvolatile storage device as an internal storage device. The method includes determining a specific file in the electronic device as a hotspot file according to a predetermined condition; copying the determined hotspot file to the non-volatile storage device; and directly addressing the non-volatile storage device and reading the hotspot file from the nonvolatile storage device when receiving a request for reading the hotspot file. | 06-26-2014 |
20150040725 | RARE EARTH PERMANENT MAGNETIC POWDER, BONDED MAGNET AND DEVICE USING THE BONDED MAGNET - The application discloses a rare-earth permanent magnetic powder, a bonded magnet, and a device using the bonded magnet. The rare-earth permanent magnetic powder comprises 4 to 12 at. % of Nd, 0.1 to 2 at. % of C, 10 to 25 at. % of N and 62.2 to 85.9 at. % of T, wherein T is Fe or FeCo and the main phase of the rare-earth permanent magnetic powder is a hard magnetic phase with a TbCu | 02-12-2015 |
20150318089 | RARE-EARTH PERMANENT MAGNETIC POWDER, BONDED MAGNET CONTAINING THEREOF AND DEVICE USING THE BONDED MAGNET - A rare-earth permanent magnetic powder, a bonded magnet containing thereof and a device using the bonded magnet are provided of the present disclosure. The rare-earth permanent magnetic powder comprises: 70 vol % to 99 vol % of a hard magnetic phase and 1 vol % to 30 vol % of a soft magnetic phase, the hard magnetic phase has a TbCu | 11-05-2015 |
Patent application number | Description | Published |
20140291764 | ESD PROTECTION STRUCTURE AND ESD PROTECTION CIRCUIT - An electrostatic discharge (ESD) protection structure and an ESD protection circuit are provided. A PMOS transistor is located in a first region of a first N-type well region of a semiconductor substrate. A first doped base region located in a second region of a first N-type well region is N-type doped and connected to an external trigger-voltage adjustment circuit. An NMOS transistor is located in a third region of a first P-type well region. Second doped base regions discretely located in a fourth region of a first P-type well region are P-type doped and connected to the external trigger-voltage adjustment circuit. A first N-region is located in the fourth region, surrounding the second doped base regions, and connected to the I/O interface terminal. A second N-region is located in the fourth region, surrounding the first N-region and the second doped base regions, and connected to the ground terminal. | 10-02-2014 |
20140291765 | ESD PROTECTION STRUCTURE AND ESD PROTECTION CIRCUIT - An electrostatic discharge (ESD) protection structure and an ESD protection circuit are provided. A PMOS transistor is located in a first region of a first N-type well region of a semiconductor substrate. A first doped base region located in a second region of a first N-type well region is N-type doped and connected to an external trigger-voltage adjustment circuit. An NMOS transistor is located in a third region of a first P-type well region. A second doped base region located in the fourth region of the first P-type well region is P-type doped and connected to the external trigger-voltage adjustment circuit. The external trigger-voltage adjustment circuit can be configured to pull up an electric potential of the second doped base region when the power supply terminal generates an instantaneous electric potential difference. | 10-02-2014 |
20150263020 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device is provided. The semiconductor device includes a semiconductor substrate and an electrostatic discharge (ESD) protection device disposed on the semiconductor substrate. The ESD protection device includes a source and a drain disposed in the semiconductor substrate, a gate disposed on the semiconductor substrate between the source and the drain, and a p-type doped region disposed in the drain. | 09-17-2015 |
20150270234 | PAD STRUCTURE FOR SEMICONDUCTOR DEVICE CONNECTION - A pad structure may include a conductive pad that includes an exposed portion. The pad structure may further include a first conductive set that includes a first conductive part and a second conductive part. The first conductive part may overlap the exposed portion in a direction perpendicular to the conductive pad. The first conductive part may be spaced from the second conductive part in a direction parallel to the conductive pad and may overlap the second conductive part in the direction parallel to the conductive pad. The pad structure may further include a conductive layer that contacts the conductive pad and is positioned between the conductive pad and the first conductive set in the direction perpendicular to the conductive pad. The pad structure may further include a first via member, which may electrically connect the first conductive part to the conductive layer. | 09-24-2015 |
20150318275 | ESD CLAMP CIRCUIT - An ESD clamp circuit includes a power supply, a ground supply, an ESD detection transistor, a capacitor having a first terminal connected to the power supply and a second terminal connected to a gate of the ESD detection transistor, and a first resistor connected in series with the capacitor between the power and ground supplies. The ESD clamp circuit also includes a clamp transistor having a first terminal connected to the power supply and a second terminal connected to the ground terminal, an inverter having an input connected to a first terminal of the ESD detection transistor and an output connected to the gate of the clamp transistor, a feedback transistor connected across the inverter, and a second resistor having a first terminal connected to the gate of the clamp transistor and to a second terminal to the ground supply. | 11-05-2015 |