Patent application number | Description | Published |
20080209159 | MEMORY ACCESS METHOD USING THREE DIMENSIONAL ADDRESS MAPPING - A memory access method includes: obtaining a, b, and c from a program code for accessing a memory with a triple loop in a program, a being a number of values which an inner-most loop variable of the triple loop may have, b being a number of values which a middle loop variable of the triple loop may have, and c being a number of values which an outer-most loop variable of the triple loop may have; obtaining a starting address of the memory accessed by the triple loop; and obtaining an a×b×c number of addresses of the memory accessed by the triple loop using the starting address and a function. | 08-28-2008 |
20080209188 | PROCESSOR AND METHOD OF PERFORMING SPECULATIVE LOAD OPERATIONS OF THE PROCESSOR - Provided is a processor and method of performing speculative load instructions of the processor in which a load instruction is performed only in the case where the load instruction substantially accesses a memory. A load instruction for canceling operations is performed in other cases except the above case, so that problems occurring by accessing an input/output (I/O) mapped memory area and the like at the time of performing speculative load instructions can be prevented using only a software-like method, thereby improving the performance of a processor. | 08-28-2008 |
20080235492 | APPARATUS FOR COMPRESSING INSTRUCTION WORD FOR PARALLEL PROCESSING VLIW COMPUTER AND METHOD FOR THE SAME - An apparatus and a method are provided for a parallel processing very long instruction word (VLIW) computer. The apparatus includes: an index code generation unit sequentially generating an index code, which is associated with a number of no operation (NOP) instruction word between effective instruction words, with respect to each of instruction word groups to be executed in a VLIW computer; an instruction compression unit sequentially deleting the NOP instruction word which corresponds to the index code with respect to each of instruction word groups; and an instruction word conversion unit converting the effective instruction words to include the index code, the effective instruction words corresponding to the NOP instruction words. | 09-25-2008 |
20080235657 | LOOP COALESCING METHOD AND LOOP COALESCING DEVICE - A loop coalescing method and a loop coalescing device are disclosed. The loop coalescing method comprises removing an inner-most loop from among nested loops, so that an outer operation provided outside of the inner-most loop is performed when a condition of a conditional statement is satisfied, generating a guard code by applying an if-conversion method to the conditional statement, and converting a guard by using an instruction calculating the guard of the guard code, the instruction calculating the guard using a register where information related to a period of time corresponding to the number of iterations of the inner-most loop is stored. | 09-25-2008 |
20090119490 | PROCESSOR AND INSTRUCTION SCHEDULING METHOD - An instruction scheduling method and a processor using an instruction scheduling method are provided. The instruction scheduling method includes selecting a first instruction that has a highest priority from a plurality of instructions, and allocating the selected first instruction and a first time slot to one of the functional units, allocating a second instruction and a second time slot to one of the functional units, wherein the second instruction is dependent on the first instruction. | 05-07-2009 |
20090217249 | COMPILING METHOD AND PROCESSOR USING THE SAME - A compiling method and a processor using the same are provided. The compiling method includes simulating a first program code which includes at least one first operation command to generate a first operation result, compiling the first program code to generate a second program code which includes at least one second operation command, simulating the second program code to generate a second operation result, and comparing the first operation result with the second operation result to verify whether the second program code is valid. | 08-27-2009 |
Patent application number | Description | Published |
20080228435 | MEASUREMENT SYSTEM FOR CORRECTING OVERLAY MEASUREMENT ERROR - A measurement system and a measurement method, which can obtain a measurement value close to a true value considering an overlay measurement error according to a higher order regression analysis model. The measurement system and the measurement method provide a technique for determining optimal positions of shots to be measured using an optimal experimental design. When the regression analysis model and the number of shots to be measured are determined in advance, a method is used for determining an optimal number of shots to be measured according to the regression analysis model and process dispersion using a confidence interval estimating method. A dynamic sampling method is used for dynamically changing the number and positions of shots to be measured according to a change in process features by combining the above two methods. And, when erroneous data is detected, or when measured data is missing, a robust regression analysis method and a technique for filtering the erroneous data and the missing data are used. | 09-18-2008 |
20090139548 | Apparatus and method of rinsing and drying semiconductor wafers - An apparatus for rinsing and drying semiconductor wafers includes a rinsing bath, a drying bath and a drying chamber. The rinsing bath and drying bath are connected by a tunnel unit which prevents semiconductor wafers from being exposed to air while being transferred from the rinsing bath to the drying bath. Thus watermarks are prevented from being formed on the semiconductor wafers. A method for rinsing and drying semiconductor wafers includes rinsing the wafers in a rinsing bath, transferring the wafers to a drying bath through a tunnel unit that prevents the semiconductor wafers from the being exposed to air, and after processing the wafers in the drying bath, transferring the wafers to a drying chamber. | 06-04-2009 |
20110125440 | MEASUREMENT SYSTEM FOR CORRECTING OVERLAY MEASUREMENT ERROR - A measurement system and a measurement method, which can obtain a measurement value close to a true value considering an overlay measurement error according to a higher order regression analysis model. The measurement system and the measurement method provide a technique for determining optimal positions of shots to be measured using an optimal experimental design. When the regression analysis model and the number of shots to be measured are determined in advance, a method is used for determining an optimal number of shots to be measured according to the regression analysis model and process dispersion using a confidence interval estimating method. A dynamic sampling method is used for dynamically changing the number and positions of shots to be measured according to a change in process features by combining the above two methods. And, when erroneous data is detected, or when measured data is missing, a robust regression analysis method and a technique for filtering the erroneous data and the missing data are used. | 05-26-2011 |