Patent application number | Description | Published |
20080314628 | METHOD OF FORMING METAL PATTERN, PATTERNED METAL STRUCTURE, AND THIN FILM TRANSISTOR-LIQUID CRYSTAL DISPLAYS USING THE SAME - Disclosed is a method of forming a metal pattern, the method comprising depositing a dielectric substrate on a supporting substrate; forming a latent mask pattern of a metal pattern on the dielectric substrate; etching the dielectric substrate exposed by the latent mask pattern; forming a seed layer on the supporting substrate by activating the supporting substrate; removing the latent mask pattern and the portion of the seed layer disposed on the latent mask pattern through a lift-off process; and plating a metal layer on the patterned seed layer. | 12-25-2008 |
20120112346 | THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - Provided are a thin-film transistor (TFT) substrate and a method of manufacturing the same. The method includes: forming a passivation film by forming an insulating film on a substrate; forming a photoresist pattern by forming a photoresist film on the passivation film, exposing the photoresist film to light, and developing the photoresist film; performing a first dry-etching by dry-etching the passivation film using the photoresist pattern as an etch mask; performing a baking to reduce a size of the photoresist pattern; performing a second dry-etching to form a contact hole by dry-etching the passivation film again using the photoresist pattern as a mask; removing the photoresist pattern; and forming a pixel electrode of a carbon composition that includes carbon nanotubes and/or graphene on a top surface of the passivation film. | 05-10-2012 |
20120286272 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A thin film transistor includes a gate electrode on a substrate, a main active layer in electrical connection with the gate electrode and including an exposed channel portion, a source electrode in electrical connection with the main active layer, a drain electrode which is spaced apart from the source electrode and in electrical connection with the main active layer, and a sub active layer in electrical connection to the main active layer. | 11-15-2012 |
20130293524 | THIN FILM TRANSISTOR ARRAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME - Exemplary embodiments of the present invention relate to a panel and a display device including the same, the panel including a substrate, a signal line arranged on the substrate, the signal line configured to transmit a driving signal, an insulating layer arranged on the signal line, and a pixel electrode and a contact assistant arranged on the insulating layer. The contact assistant is electrically connected to a portion of the signal line, the contact assistant includes indium zinc oxide doped with a metal oxide not including indium or zinc, and the metal oxide has a smaller Gibbs free energy than zinc oxide. | 11-07-2013 |
20130306466 | TARGET FOR SPUTTERING AND APPARATUS INCLUDING THE SAME - A sputtering target includes a plurality of targets and edges of the targets overlap each other. | 11-21-2013 |
20130320344 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr). | 12-05-2013 |
20140175423 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel is provided. The thin film transistor array panel includes a substrate, a seed layer positioned on the substrate, and a semiconductor layer positioned on the seed layer, wherein a lattice mismatch between the seed layer and the semiconductor layer is equal to or less than 1.4%. | 06-26-2014 |