| Patent application number | Description | Published |
| 20110138621 | CARRIER FOR MANUFACTURING SUBSTRATE AND METHOD OF MANUFACTURING SUBSTRATE USING THE SAME - Disclosed herein is a carrier for manufacturing a substrate, including: an insulation layer including a first metal layer formed on one side or both sides thereof; a second metal layer formed on one side of the first metal layer; and a third metal layer formed on one side of the second metal layer, wherein the second metal layer has a lower melting point than the first metal layer or the third metal layer. The carrier is advantageous in that a build up layer can be separated from a carrier by heating, so that a routing process is not required, with the result that the size of a substrate does not change when the build up layer is separated from the carrier, thereby reusing the carrier and maintaining the compatibility between the substrate and manufacturing facilities. | 06-16-2011 |
| 20110139858 | CARRIER FOR MANUFACTURING SUBSTRATE AND METHOD OF MANUFACTURING SUBSTRATE USING THE SAME - Disclosed herein is a carrier for manufacturing a substrate, including: two insulation layers, each being provided on one side thereof with a first metal layer and on the other side thereof with a second metal layer; and a third metal layer having a lower melting point than the first metal layer and formed between the two first metal layers respectively formed on the two insulation layers such that the two first metal layers are attached to each other. The carrier is advantageous in that the carrier can be separated by heating the third metal layer, so that the size of a substrate does not change at the time of separating the carrier, thereby maintaining the compatibility between a substrate and manufacturing facilities. | 06-16-2011 |
| 20110180205 | CARRIER FOR MANUFACTURING SUBSTRATE AND METHOD OF MANUFACTURING SUBSTRATE USING THE SAME - Disclosed herein is a carrier for manufacturing a substrate, including: an insulation layer including a first metal layer formed on one side or both sides thereof; a second metal layer formed on one side of the first metal layer; and a third metal layer formed on one side of the second metal layer, wherein the second metal layer has a lower melting point than the first metal layer or the third metal layer. The carrier is advantageous in that a build up layer can be separated from a carrier by heating, so that a routing process is not required, with the result that the size of a substrate does not change when the build up layer is separated from the carrier, thereby reusing to the carrier and maintaining the compatibility between the substrate and manufacturing facilities. | 07-28-2011 |
| 20110315745 | CARRIER FOR MANUFACTURING SUBSTRATE AND METHOD OF MANUFACTURING SUBSTRATE USING THE SAME - Disclosed herein is a carrier for manufacturing a substrate, including: two insulation layers, each being provided on one side thereof with a first metal layer and on the other side thereof with a second metal layer; and a third metal layer having a lower melting point than the first metal layer and formed between the two first metal layers respectively formed on the two insulation layers such that the two first metal layers are attached to each other. The carrier is advantageous in that the carrier can be separated by heating the third metal layer, so that the size of a substrate does not change at the time of separating the carrier, thereby maintaining the compatibility between a substrate and manufacturing facilities. | 12-29-2011 |
| Patent application number | Description | Published |
| 20100102426 | Dual face package and method of manufacturing the same - Disclosed herein is a dual face package and a method of manufacturing the same. The dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected to the through-electrode, an insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side thereof and connected to the post electrode, and an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode. The dual face package is produced by a simple process and is applicable to a large diameter wafer level package. | 04-29-2010 |
| 20110012252 | POWER SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a power semiconductor module. The module includes metal plates each having a first through hole, with an anodic oxidation layer formed on a surface of metal plates and an interior of the first through hole. A cooling member has a second through hole at a position corresponding to the first through hole, and the metal plates are attached to both sides of the cooling member. A circuit layer is formed on the anodic oxidation layer and performs an interlayer connection through a via formed in the first and second through holes. A power device is connected to the circuit layer. A resin encapsulant encloses the circuit layer and the power device. A housing is installed to each of the metal plates to form a sealing space for the resin encapsulant. | 01-20-2011 |
| 20110129994 | Method of manufacturing a dual face package - A method of manufacturing a dual face package, including: preparing an upper substrate composed of an insulating layer including a post via-hole; forming a filled electrode in a semiconductor substrate, the filled electrode being connected to a die pad; applying an adhesive layer on one side of the semiconductor substrate including the filled electrode, and attaching the upper substrate to the semiconductor substrate; cutting another side of the semiconductor substrate in a thickness direction, thus making the filled electrode into a through-electrode; and forming a post electrode in the post via-hole, forming an upper redistribution layer connected to the post electrode of the semiconductor substrate, and forming a lower redistribution layer connected to the through-electrode on the other side of the semiconductor substrate. | 06-02-2011 |
| 20110156241 | PACKAGE SUBSTRATE AND METHOD OF FABRICATING THE SAME - Disclosed herein are a package substrate and a method of fabricating the same. The package substrate includes a base part that includes a chip, a mold part surrounding the chip, and a connection unit formed inside the mold part to connect the chip to a terminal part formed on the outer surface of the mold part, and a buildup layer that is formed on one surface of the base part on which the terminal part is formed, including the side surfaces of the base part, but includes a circuit layer connected to the terminal part, thereby making it possible to minimize stress applied to chips during a buildup process and easily replace malfunctioning chips. | 06-30-2011 |
| 20120015484 | POWER SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a power semiconductor module. The module includes metal plates each having a first through hole, with an anodic oxidation layer formed on a surface of metal plates and an interior of the first through hole. A cooling member has a second through hole at a position corresponding to the first through hole, and the metal plates are attached to both sides of the cooling member. A circuit layer is formed on the anodic oxidation layer and performs an interlayer connection through a via formed in the first and second through holes. A power device is connected to the circuit layer. A resin encapsulant encloses the circuit layer and the power device. A housing is installed to each of the metal plates to form a sealing space for the resin encapsulant. | 01-19-2012 |
| 20120018897 | SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a semiconductor module, including: a substrate including wiring patterns formed on both sides thereof; a first device mounted on the substrate; a first molding layer made of a molding material, surrounding the first device and including via holes formed therein to interconnect with the wiring pattern formed on one side of the substrate; and a second device mounted on the first molding layer and electrically connected with the wiring pattern formed on one side of the substrate through the via holes formed in the first molding layer. | 01-26-2012 |
| Patent application number | Description | Published |
| 20110205166 | TOUCH PANEL - Disclosed is a touch panel, which includes a transparent conductive film, electrodes printed at both ends of the transparent conductive film, and a substrate having a wiring connected to the electrodes and formed in a multilayer therein, and surrounding the transparent conductive film at the inner peripheral surface thereof, so that the use of the substrate having the wiring in multilayer form enables a plurality of wirings necessary for multi touch to be formed even under conditions of a thin bezel size, thus satisfying the trend which is reducing the size of electronic products. | 08-25-2011 |
| 20110254803 | METHOD FOR RECOGNIZING MULTI-TOUCH OF RESISTIVE TOUCH SCREEN - Disclosed herein is a method for recognizing a resistive touch screen. The method for recognizing the resistive touch screen includes: sensing touch generated at the resistive touch screen; calculating a difference value, a searching value by detecting voltage at two electrode wirings connected with a transparent resistive layer of the resistive touch screen; and comparing the searching value with a reference value that is a difference value between voltages detected at the two electrode wirings when the resistive touch screen is single-touched, whereby the single touch and the multi-touch can be differentiated. | 10-20-2011 |
| 20110261003 | DISPLAY DEVICE HAVING CAPACITIVE TOUCH SCREEN - Disclosed herein is a display device having a capacitive touch screen, including: a display unit; and a capacitive touch screen that is coupled to the display unit by an adhesive layer and includes a base substrate, a plurality of first electrode patterns that are formed on an active region of the base substrate, ground patterns that are formed on the active region of the base substrate and are separated from the first electrode pattern, a transparent insulating layer that covers the first electrode patterns and the ground patterns and is formed on the base substrate, and a plurality of second electrode patterns that are formed on an active region of the transparent insulating layer. | 10-27-2011 |
| 20110262631 | Method For Manufacturing One-Layer Type Capacitive Touch Screen - Disclosed herein is a method for manufacturing a one-layer type capacitive touch screen. The method for manufacturing a one-layer type capacitive touch screen includes: forming a plurality of electrode wirings made of metal in an inactive region of a base substrate; forming a plurality of first electrode patterns made of a conductive polymer and including a first sensing unit and a first connection unit in an active region of the base substrate to connect the electrode wirings; forming an insulating pattern on the plurality of first connection units of the first electrode patterns; and forming a plurality of second electrode patterns including a second sensing unit and a second connection unit and made of the conductive polymer in the active region of the base substrate to connect the electrode wirings and position the second connection unit on the insulating pattern. | 10-27-2011 |
| 20110273382 | TOUCH SCREEN HAVING ANTENNA PATTERN - Disclosed herein is a touch screen having an antenna, including: a first substrate that includes a first electrode pattern formed in an active region and a first electrode wiring formed in an inactive region disposed outside the active region and connected to the first electrode pattern; a second substrate that includes a second electrode pattern opposite to the first electrode pattern and a second electrode wiring connected to the second electrode pattern; a spacer that is formed between the first substrate and the second substrate to space the first electrode pattern from the second electrode pattern; and an antenna pattern that is formed in the inactive region. | 11-10-2011 |
| 20110279402 | TOUCH SCREEN - Disclosed herein is a touch screen. The touch screen includes a transparent electrode that is formed on one surface of a first transparent substrate to sense change in capacitance at the time of a touch input; an electrode that is formed on a second transparent substrate formed on the other surface of the first transparent substrate to apply voltage to the transparent electrode; and a via that penetrates through the first transparent substrate to electrically connect the transparent electrode to the electrode. The transparent electrode and the electrode are formed on the transparent substrates at different layers, thereby reducing an inactive region. | 11-17-2011 |