Patent application number | Description | Published |
20120092077 | CAPACITOR COUPLED QUADRATURE VOLTAGE CONTROLLED OSCILLATOR - A quadrature oscillator includes a first oscillator having a first second-order harmonic node, a second oscillator having a second second-order harmonic node, and at least one capacitor coupling the first second-order harmonic node and the second second-order harmonic node. The first oscillator is configured to supply an in-phase signal and the second oscillator is configured to supply a quadrature signal. | 04-19-2012 |
20120092230 | ON-CHIP HELIX ANTENNA - A rectangular helix antenna in an integrated circuit includes upper electrodes disposed in a first metal layer, lower electrodes disposed in a second metal layer, and side electrodes connecting the upper electrodes with the lower electrodes, respectively. The upper electrodes are disposed at an angle with respect to the lower electrodes. The upper electrodes, the lower electrodes, and the side electrodes form one continuous electrode spiraling around an inner shape of a rectangular bar. A micro-electromechanical system (MEMS) helix antenna has a similar structure to the rectangular helix antenna, but can have an inner shape of a bar. | 04-19-2012 |
20120146680 | DE-EMBEDDING ON-WAFER DEVICES - A transmission line is provided. In one embodiment, the transmission line comprises a substrate, a well within the substrate, a shielding layer over the well, and a plurality of intermediate metal layers over the shielding layer, the plurality of intermediate metal layers coupled by a plurality of vias. The transmission line further includes a top metal layer over the plurality of intermediate metal layers. A test structure for de-embedding an on-wafer device, and a wafer are also disclosed. | 06-14-2012 |
20130099352 | STRUCTURE AND METHOD FOR A HIGH-K TRANSFORMER WITH CAPACITIVE COUPLING - The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having an integrated circuit (IC) device; an interconnect structure disposed on the semiconductor substrate and coupled with the IC device; and a transformer disposed on the semiconductor substrate and integrated in the interconnect structure. The transformer includes a first conductive feature; a second conductive feature inductively coupled with the first conductive feature; a third conductive feature electrically connected to the first conductive feature; and a fourth conductive feature electrically connected to the second conductive feature. The third and fourth conductive features are designed and configured to be capacitively coupled to increase a coupling coefficient of the transformer. | 04-25-2013 |
20130154752 | VOLTAGE-CONTROLLED OSCILLATOR - A voltage-controlled oscillator circuit includes a first transistor, a second transistor, a first resonator circuit, a second resonator circuit, a first current path and a second current path. A drain of the first transistor is coupled to a gate of the second transistor and to a first end of the first resonator circuit. A source of the first transistor is coupled to the first current path and to a first end of the second resonator circuit. A drain of the second transistor is coupled to a gate of the first transistor and to a second end of the first resonator circuit. A source of the second transistor is coupled to the second current path and a second end of the second resonator circuit. | 06-20-2013 |
20130168809 | STRUCTURE AND METHOD FOR A TRANSFORMER WITH MAGNETIC FEATURES - The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors. | 07-04-2013 |
20130228894 | STRUCTURE AND METHOD FOR A FISHBONE DIFFERENTIAL CAPACITOR - The present disclosure provides an integrated circuit. The integrated circuit includes a substrate having a surface that is defined by a first axis and a second axis perpendicular to the first axis; and a capacitor structure disposed on the substrate. The capacitor structure includes a first conductive component; a second conductive component and a third conductive component symmetrically configured on opposite sides of the first conductive component. The first, second and third conductive components are separated from each other by respective dielectric material. | 09-05-2013 |
20130234305 | 3D TRANSMISSION LINES FOR SEMICONDUCTORS - A transmission line structure for semiconductor RF and wireless circuits, and method for forming the same. The transmission line structure includes embodiments having a first die including a first substrate, a first insulating layer, and a ground plane, and a second die including a second substrate, a second insulating layer, and a signal transmission line. The second die may be positioned above and spaced apart from the first die. An underfill is disposed between the ground plane of the first die and the signal transmission line of the second die. Collectively, the ground plane and transmission line of the first and second die and underfill forms a compact transmission line structure. In some embodiments, the transmission line structure may be used for microwave applications. | 09-12-2013 |
20140008773 | Integrated Antenna Structure - Some embodiments relate to a semiconductor module comprising an integrated antenna structure configured to wirelessly transmit signals. The integrated antenna structure has a lower metal layer and an upper metal layer. The lower metal layer is disposed on a lower die and is connected to a ground terminal. The upper metal layer is disposed on an upper die and is connected to a signal generator configured to generate a signal to be wirelessly transmitted. The upper die is stacked on the lower die and is connected to the lower die by way of an adhesion layer having one or more micro-bumps. By connecting the lower and upper die together by way of the adhesion layer, the lower and upper metal layers are separated from each other by a large spacing that provides for a good performance of the integrated antenna structure. | 01-09-2014 |
20140041173 | TRANSFORMER WITH BYPASS CAPACITOR - An electronic device comprises first, second and third inductors connected in series and formed in a metal layer over a semiconductor substrate. The first and second inductors have a mutual inductance with each other. The second and third inductors having a mutual inductance with each other. A first capacitor has a first electrode connected to a first node. The first node is conductively coupled between the first and second inductors. A second capacitor has a second electrode connected to a second node. The second node is conductively coupled between the second and third inductors. | 02-13-2014 |
20140070366 | SEMICONDUCTOR STRUCTURE - A semiconductor structure is provided. The semiconductor structure includes a floating substrate; and a capacitor grounded and connected to the floating substrate. A method of manufacturing a semiconductor structure is also provided. | 03-13-2014 |
20140097930 | Structure and Method for a Transformer with Magnetic Features - The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors. | 04-10-2014 |
20140203881 | Ultra-Low Voltage-Controlled Oscillator with Trifilar Coupling - The present disclosure relates to a device and method to reduce voltage headroom within a voltage-controlled oscillator by utilizing trifilar coupling or transformer feedback with a capacitive coupling technique. In some embodiments of trifilar coupling, a VCO comprises cross-coupled single-ended oscillators, wherein the voltage of first gate within a first single-ended oscillator is separated from the voltage of a second drain within a second single-ended oscillator within the cross-coupled pair. A trifilar coupling network is composed of a drain inductive component, a source inductive component, and a gate inductive component for a single-ended oscillator, wherein a coupling between drain inductive components and gate inductive components between single-ended oscillators along with a negative feedback loop within each single-ended oscillator forms a cross-coupled pair of transistors which reduces the drain-to-source voltage headroom to approximately a saturation voltage of a transistor within the cross-coupled pair. Other devices and methods are also disclosed. | 07-24-2014 |
20140252546 | SWITCHED CAPACITOR STRUCTURE - A capacitor structure comprising semiconductor substrate and a matrix of capacitor units formed over the semiconductor substrate each capacitor unit. The matrix includes an interior structure comprised of one or more vertical plates, each vertical plate of the interior structure formed from a plurality of conductive portions connected vertically to each other, an exterior structure comprised of one or more vertical plates, each vertical plate of the exterior structure formed from a plurality of conductive portions connected vertically to each other, the exterior structure substantially encompassing the interior structure, and insulative material separating the interior and exterior structures. The structure also comprises a switching mechanism included in the capacitor structure to switch between ones of the plural capacitor units. | 09-11-2014 |
20140266919 | INTEGRATED ANTENNA STRUCTURE AND ARRAY - Some embodiments relate to a semiconductor module having an integrated antenna structure that wirelessly transmits signals. The semiconductor module has a first die having a first far-back-end-of-the-line (FBEOL) metal layer with a ground plane connected to a ground terminal. A second die is stacked onto the first die and has a second FBEOL metal layer with an antenna exciting element that extends to a position that is vertically over the ground plane. One or more micro-bumps are vertically located between the first FBEOL metal layer and the second FBEOL metal layer. The one or more micro-bumps provide a radio frequency (RF) signal between the first FBEOL metal layer and the antenna exciting element of the second FBEOL metal layer. By using micro-bumps to connect the first and second die, the FBEOL metal layers are separated by a large spacing that provides for good performance of the integrated antenna structure. | 09-18-2014 |
20140368285 | VOLTAGE-CONTROLLED OSCILLATOR - An apparatus is disclosed that includes a first cross-coupled transistor pair, a second cross-coupled transistor pair, at least one capacitance unit, and an inductive unit. The first cross-coupled transistor pair and second cross-coupled transistor pair are coupled to a pair of first output nodes and a pair of second output nodes, respectively. The at least one capacitance unit is coupled to at least one of the pair of first output nodes and the pair of second output nodes. The inductive unit is coupled to the first cross-coupled transistor pair at the first output nodes and coupled to the second cross-coupled transistor pair at the second output nodes. The inductive unit generates mutual magnetic coupling between one of the first output nodes and one of the second output nodes and between the other of the first output nodes and the other of the second output nodes. | 12-18-2014 |
20140374881 | CONCENTRIC CAPACITOR STRUCTURE - A concentric capacitor structure generally comprising concentric capacitors is disclosed. Each concentric capacitor comprises a first plurality of perimeter plates formed on a first layer of a substrate and a second plurality of perimeter plates formed on a second layer of the substrate. The first plurality of perimeter plates extend in a first direction and the second plurality of perimeter plates extend in a second direction different than the first direction. A first set of the first plurality of perimeter plates is electrically coupled to a first set of the second plurality of perimeter plates and a second set of the first plurality of perimeter plates is electrically coupled to a second set of the second plurality of perimeter plates. A plurality of capacitive cross-plates are formed in the first layer such that each cross-plate overlaps least two of the second plurality of perimeter plates. | 12-25-2014 |