Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Ho-Cheol
Ho Cheol Jung, Yongin KR
| Patent application number | Description | Published |
|---|---|---|
| 20120089321 | SYSTEM AND METHOD FOR ALARMING FRONT IMPACT DANGER COUPLED WITH DRIVER VIEWING DIRECTION AND VEHICLE USING THE SAME - Featured are a system and a method for alarming a front impact danger coupled with a driver viewing direction and a vehicle Such a system includes: a driver viewing direction recognition unit recognizing a driver viewing direction; an obstacle sensing unit sensing obstacles existing in directions that a driver does not view; and an engine control unit. The engine control unit receives and analyzes the driver face direction data from the driver viewing direction recognition unit to identify the driver viewing direction when the vehicle enters in the crossroads, and requests the obstacle sensing unit perform obstacle sensing for another direction than the driver's viewing direction and analyzes analyze an obstacle sensing result. Such methods advantageously warns a driver to the presence of obstacles when a vehicle enters in crossroads to prevent a traffic accident. | 04-12-2012 |
Ho Cheol Kang, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110069265 | ELECTROSTATIC DISCHARGE PROTECTION ELEMENT, LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME, AND MANUFACTURING METHOD THEREOF - An electrostatic discharge protection element, a liquid crystal display device having the same, and a manufacturing method. A first ESD organic TFT, a second ESD organic TFT, a third ESD organic TFT each have a gate electrode, a source electrode and a drain electrode in which the source electrode and drain electrode of the first and second ESD organic TFTs and the gate electrode of the third ESD organic TFT are electrically connected. The gate electrode and the source electrode of the first ESD organic TFT are electrically connected to a first array line and the gate electrode and the drain electrode of the second ESD organic TFT are electrically connected to a second array line. The source electrode of the third ESD organic TFT is electrically connected to a data line or a gate line and the drain of the third ESD organic TFT are electrically connected to a common voltage line. | 03-24-2011 |
| 20110249208 | METHOD OF MANUFACTURING A LIQUID CRYSTAL DISPLAY HAVING TOP GATE THIN FILM TRANSISTORS WHEREIN EACH GATE ELECTRODE CONTACTS AN AUXILLIARY ELECTRODE - An electrostatic discharge protection element, a liquid crystal display device having the same, and a manufacturing method. A first ESD organic TFT, a second ESD organic TFT, a third ESD organic TFT each have a gate electrode, a source electrode and a drain electrode in which the source electrode and drain electrode of the first and second ESD organic TFTs and the gate electrode of the third ESD organic TFT are electrically connected. The gate electrode and the source electrode of the first ESD organic TFT are electrically connected to a first array line and the gate electrode and the drain electrode of the second ESD organic TFT are electrically connected to a second array line. The source electrode of the third ESD organic TFT is electrically connected to a data line or a gate line and the drain of the third ESD organic TFT are electrically connected to a common voltage line. | 10-13-2011 |
| 20110284819 | QUANTUM DOT LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a quantum dot light emitting element which can form a quantum light emitting layer configured of charge transporting particles and quantum dots and a charge transporting layer in a solution process, to reduce process expense, and a method for manufacturing the same. The quantum dot light emitting element includes a substrate, an anode formed on the substrate, a quantum light emitting layer formed on the anode, the quantum light emitting layer having charge transporting particles and quantum dots mixed therein, and a cathode formed on the quantum light emitting layer. | 11-24-2011 |
| 20110291071 | QUANTUM DOT LIGHT EMITTING DIODE DEVICE AND DISPLAY DEVICE THEREWITH - The present invention relates to a quantum dot light emitting diode device in which a hole transportation layer is formed after forming a quantum dot light emitting layer by a solution process by applying an inverted type quantum dot light emitting diode device for making free selection of a hole transportation layer material that enables easy injection of a hole to the quantum dot light emitting layer; and display device and method therewith. | 12-01-2011 |
Ho Cheol Kim, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20080234508 | Process for the Preparation of N(5)-Ethylglutamine - Disclosed relates to a process for preparing N(5)-ethylglutamines economically without a specific purification process via a simplified and safe process, in which glutamic acid derivatives, represented by formula 1, protected by phthaloyl groups react with ethylamine to cause an amidation and a deprotection reaction in turn under the same reaction condition, thus preparing N(5)-ethylglutamines. | 09-25-2008 |
Ho Cheol Kim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20080311228 | PHARMACEUTICAL COMPOSITION FOR PROTECTING NEURONS COMPRISING EXTRACT OF LITHOSPERMUM ERYTHROTHIZON SIEB. ET. ZUCC OR ACETYLSHIKONIN ISOLATED THEREFROM AS AN EFFECTIVE INGREDIENT - The present invention relates to a pharmaceutical composition for protecting neurons or for preventing and treating ischemic neuronal diseases comprising the extract of | 12-18-2008 |
Ho Cheol Kwon, Kyongsangnam-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20120085132 | METHOD OF FORMING A DRUM TYPE WASHING MACHINE HAVING A DRIVING UNIT - The washing machine includes a tub mounted in a cabinet, a drum mounted in the tub, a shaft that transmits a driving force from a motor to the drum, front and rear bearings mounted on an outer circumference of opposite end portions of the shaft, a bearing housing built in a central portion of a rear wall of the tub to support the front bearing, a rotor coupled to the rear end portion of the shaft, a stator fixed to the tub rear wall inward of the rotor, and a connector of the rotor that serration coupled to the outer circumference of the shaft in front of the rear bearing so as to transmit rotating power from the rotor to the shaft. A bearing bracket may be fixed to the rear wall of the tub so as to cover an outside of the rotor and support the rear bearing. | 04-12-2012 |
Ho Cheol Lee, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120008513 | METHOD AND APPARATUS FOR DETECTING TARGET FLOW IN WIRELESS COMMUNICATION SYSTEM - An apparatus and method for detecting a target flow in a wireless communication system are provided. The target flow detection method includes receiving a packet, determining a behavior state of the packet, comparing the behavior state with a plurality of stored behavior signatures, retrieving, when the behavior state matches one of the stored behavior signatures, a target flow corresponding to the behavior signature, and instructing a packet processor to process the target flow. | 01-12-2012 |
Ho Cheol Shin, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20100104059 | RENORMALIZATION METHOD OF EXCORE DETECTOR - Disclosed is a calibration method of an excore detector used in core power monitoring of a nuclear power plant, in which a spatial weighting function (SWF), used to theoretically predict a signal of the excore detector is multiplied by a designated calibration factor to reflect characteristics of the excore detector in a calibration process. It is assumed that the SWF is the multiplication of a one-dimensional shape annealing function (SAF) and a two-dimensional SWF, and the SAF is multiplied by the calibration factor. Since the SAF is calculated in a normalized form, the multiplication of the SAF by the calibration factor to reflect characteristics of the excore detector corresponds to new normalization and thus the calibration of the SAF is referred to as renormalization The signal of the excore detector is considerably accurately predicted by multiplying the theoretically calculated SAF by the renormalization factor, and the multiplication is equally applied although the characteristics of the excore detector are highly changed. An increase in the accuracy of the excore detector in the nuclear power plant prevents unnecessary reactor trips and allows a reactor to be operated at a stable power, thus obtaining the safety of a core and raising economical efficiency. | 04-29-2010 |
| 20100274745 | PREDICTION METHOD FOR MONITORING PERFORMANCE OF POWER PLANT INSTRUMENTS - Disclosed is a prediction method for monitoring performance of power plant instruments. The prediction method extracts a principal component of an instrument signal, obtains an optimized constant of a SVR model through a response surface methodology using data for optimization, and trains a model using training data. Therefore, compared to an existing Kernel regression method, accuracy for calculating a prediction value can be improved. | 10-28-2010 |
Ho-Cheol Jang, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080211053 | Superjunction Semiconductor Device - In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of a boundary column of a second conductivity type material defines the boundary between the active region and the termination region. The active and termination regions include columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces. At least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region. | 09-04-2008 |
| 20110097864 | Method of Fabricating High-Voltage Semiconductor Device - A method of fabricating a high-voltage semiconductor device includes the following steps: providing a semiconductor layer; forming a plurality of trenches in the semiconductor layer to define a plurality of pillars of a first conductivity type in the semiconductor layer between adjacent trenches, wherein the trenches extend from a top surface of the semiconductor layer toward a bottom surface of the semiconductor layer; forming a charge compensation layer of a second conductivity type over at least sidewalls of each trench to a predetermined thickness thereby forming a groove in each trench; and substantially filling each groove with a charge compensation plug of the first conductivity type. | 04-28-2011 |
Ho-Cheol Kang, Gumpo KR
| Patent application number | Description | Published |
|---|---|---|
| 20100127249 | ELECTROPHORETIC DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME - An electrophoretic display device includes: a first substrate having a plurality of pixels formed in a plurality of vertical pixel rows and a plurality of horizontal pixel rows; a plurality of data lines formed at every vertical pixel row of the first substrate; a thin film transistor (TFT) formed at each pixel of the first substrate and including a source electrode, a drain electrode, an organic semiconductor layer, and a gate electrode; a passivation layer formed on the TFTs and the data lines of the first substrate and including a first contact hole exposing the drain electrode of the TFT and a second contact hole exposing the gate electrode of the TFT; a pixel electrode formed on the passivation layer at each pixel of the first substrate and connected with the drain electrode of the TFT via the first contact hole of the passivation layer; a plurality of gate lines formed on the passivation layer at every horizontal pixel row of the first substrate and connected with the gate electrode of the TFT via the second contact hole of the passivation layer; a second substrate attached to the first substrate in a facing manner; a common electrode formed on the second substrate; and an electrophoretic film formed between the first and second substrates. | 05-27-2010 |
Ho-Cheol Kang, Geonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110006290 | ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - An array substrate for a display device, including a substrate having a pixel region and a switching region, a source electrode and a drain electrode on the switching region of the substrate, ends of the source and drain electrodes having tapered edges, a pixel electrode in the pixel region of the substrate, the pixel electrode being connected to the drain electrode, an organic semiconductor layer on the source and drain electrodes, the organic semiconductor layer completely contacting tapered edges and a top surface of each of the source and drain electrodes, a first insulating layer on the organic semiconductor layer, and a gate electrode on the first insulating layer. | 01-13-2011 |
Ho-Cheol Lee, Suji-Eup KR
| Patent application number | Description | Published |
|---|---|---|
| 20090254698 | MULTI PORT MEMORY DEVICE WITH SHARED MEMORY AREA USING LATCH TYPE MEMORY CELLS AND DRIVING METHOD - A multiport semiconductor memory device includes; first and second port units respectively coupled to first and second processors, first and second dedicated memory area accessed by first and second processors, respectively and implemented using DRAM cells, a shared memory area commonly accessed by the first and second processors via respective first and second port units and implemented using memory cells different from the DRAM cells implementing the first and second dedicated memory areas, and a port connection control unit controlling data path configuration between the shared memory area and the first and second port units to enable data communication between the first and second processors through the shared memory area. | 10-08-2009 |
Ho-Cheol Lee, Yongin-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20080205175 | Auto-precharge control circuit in semiconductor memory and method thereof - An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command. The auto-precharge control circuit may include a control circuit for receiving a write signal, a clock signal and at least one control signal, including at least one of clock frequency information and latency information, and outputting at least one path signal; an auto-precharge pulse signal driver for receiving the at least one path signal, the write signal, and an enable signal and producing an auto-precharge pulse signal, the auto-precharge pulse signal identifying a starting point for an auto-precharge operation; and an auto-precharge mode enabling circuit for receiving the clock signal, an auto-precharge command, an active signal, and the auto-precharge pulse signal and generating the enable signal. | 08-28-2008 |
Ho-Cheol Lee, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090175114 | MULTI-PORT SEMICONDUCTOR MEMORY DEVICE HAVING VARIABLE ACCESS PATHS AND METHOD THEREFOR - A multi-port semiconductor memory device having variable access paths and a method therefor are provided. The semiconductor memory device includes a plurality of input/output ports; a memory array divided into a plurality of memory areas; and a select control unit to variably control access paths between the memory areas and the input/output ports so that each memory area is accessed through at least one of the input/output ports. | 07-09-2009 |
| 20100232249 | MULTI-PORT SEMICONDUCTOR MEMORY DEVICE HAVING VARIABLE ACCESS PATHS AND METHOD THEREFOR - A multi-port semiconductor memory device having variable access paths and a method therefor are provided. The semiconductor memory device includes a plurality of input/output ports; a memory array divided into a plurality of memory areas; and a select control unit to variably control access paths between the memory areas and the input/output ports so that each memory area is accessed through at least one of the input/output ports. | 09-16-2010 |
Ho-Cheol Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090001882 | White Light Emitting Organic Electroluminescent Device - Provided is a white light emitting organic electroluminescent device, which includes a transparent substrate, a first element, and a second element. The first element includes a first anode, a first element organic layer, and a reflective cathode sequentially disposed on a first substrate of the transparent substrate. The second element includes a second anode, a second element organic layer, and a transparent or translucent cathode sequentially disposed on a second surface of the transparent substrate. The white light emitting organic electroluminescent device of the present invention can eliminate the color coordinates shift phenomenon of white light that occurs in a conventional three primary color white light organic electroluminescent device. Since the aging effect caused by heat generated from light emission is reduced by dividing electroluminescent layers, the electroluminescent device can have a long lifespan. | 01-01-2009 |