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Hitoshi Kobayashi
Hitoshi Kobayashi, Osaka JP
| Patent application number | Description | Published |
|---|---|---|
| 20080218213 | BIDIRECTIONAL LEVEL SHIFT CIRCUIT AND BIDIRECTIONAL BUS SYSTEM - A plurality of transistors are connected between an I | 09-11-2008 |
| 20080291069 | DELTA SIGMA MODULATOR - In a delta sigma modulator including first and second integration circuits connected in cascade, each as a component thereof, first and second power source terminals for supplying first and second different power source voltages to the first and second integration circuits are provided. The first power source voltage is supplied to the former-stage first integration circuit having a SNR which is largely affected by the magnitude of the power source voltage. The second power source voltage lower than the first power source voltage is supplied to the latter-stage second integration circuit having a SNR which is not largely affected by the magnitude of the power source voltage. | 11-27-2008 |
| 20090289705 | PULSE MODULATION TYPE ELECTRIC POWER AMPLIFIER - A pulse modulation type electric power amplifier includes a pulse modulator that receives as input a clock and an input signal, and converts the input signal to a pulse train, an output control circuit that receives as input the pulse train output by the pulse modulator, and controls output of the pulse train, an output circuit that performs switching according to the pulse train output by the output control circuit, a comparator that converts an output terminal voltage of the output circuit to a high or a low digital value, and a short-circuit determination circuit that determines whether an output short circuit has occurred based on a state of an output signal of the comparator, and outputs an output prohibition signal to the output control circuit when an output short circuit is detected. The output control circuit controls output of the pulse train when the output prohibition signal is input, so that the output circuit stops the switching operation. An output short-circuit protection circuit can thereby be configured simply with little circuitry, and is thus small, low power, and integrated easily. | 11-26-2009 |
| 20100126271 | INERTIAL VELOCITY SENSOR SIGNAL PROCESSING CIRCUIT AND INERTIAL VELOCITY SENSOR DEVICE INCLUDING THE SAME - An inertial velocity sensor signal processing circuit ( | 05-27-2010 |
| 20100289480 | PHYSICAL QUANTITY DETECTION CIRCUIT - A PLL circuit generates a plurality of oscillated clocks having different phases. A selector selects one of the plurality of oscillated clocks generated by the PLL circuit. A detection circuit detects a physical quantity signal corresponding to the physical quantity given to a physical quantity sensor from a sensor signal received from the physical quantity sensor based on the oscillated clock selected by the selector. | 11-18-2010 |
| 20110095813 | MOS TRANSISTOR RESISTOR, FILTER, AND INTEGRATED CIRCUIT - A MOS transistor including a first MOS transistor M | 04-28-2011 |
| 20110260788 | AMPLIFIER DEVICE AND SENSOR MODULE - A first low-pass filter circuit includes a first input terminal which receives a sensor signal, a second input terminal, and an output terminal which outputs a first output signal. A second low-pass filter circuit includes an input terminal connected to the second input terminal of the first low-pass filter circuit, and an output terminal. A third low-pass filter circuit includes an input terminal connected to the output terminal of the second low-pass filter circuit, and an output terminal which outputs a second output signal. | 10-27-2011 |
Hitoshi Kobayashi, Hyogo-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20110068528 | PAPER SHEET PROCESSING DEVICE AND METHOD FOR CONTROLLING PAPER SHEET PROCESSING DEVICE - The present invention avoids a problem in that wound-up banknotes are located unevenly on substantially the same position on a winding drum. The paper sheet processing device is configured to process paper sheets. The paper sheet processing device includes: a receiving unit configured to receive paper sheets one by one in a predetermined receiving cycle; a transport unit configured to transport the paper sheets received by the receiving unit; a storing and feeding unit including a winding drum that winds up the paper sheets together with a tape, the storing and feeding unit being configured to receive and feed the paper sheets transported by the transport unit, by winding up and winding off the tape; a drive unit configured to drive the receiving unit, the transport unit, and the storing and feeding unit: and a control unit configured to control the drive unit to maintain a tape winding amount per receiving cycle, such that a storing pitch of the paper sheets wound up by the winding drum deviates from a predetermined range relative to an outer peripheral length of the tape wound up by the winding drum. | 03-24-2011 |
Hitoshi Kobayashi, Kanagawa-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20090079762 | METHOD FOR PRODUCING MULTI-VIEWPOINT IMAGE FOR THREE-DIMENSIONAL IMAGE DISPLAY AND PROGRAM THEREFOR - A method for producing a multi-viewpoint image for a three-dimensional image display, includes: providing a plurality of viewpoints to be spaced at equal intervals in direction perpendicular to a single reference projection plane including target viewpoints serving as reference are spaced at constant intervals in a first direction parallel to the reference projection plane; providing a plurality of individual target viewpoints which are respectively different from the target viewpoints serving as reference and serve as feet of a perpendicular to the plurality of viewpoints, corresponding to the respective viewpoint, on a projection plane which is a plane including the reference projection plane; making determination such that the shapes and the sizes of the individual projection planes are included in the reference projection plane in overlapping regions of the individual projection planes acquired from two viewpoints positioned at the outermost positions of the plurality of viewpoints; and clipping only regions of the reference projection plane from the individual projection planes acquired from the respective viewpoints to form a multi-viewpoint image for three-dimensional image display. | 03-26-2009 |
| 20110032339 | THREE-DIMENSIONAL IMAGE DISPLAY METHOD AND APPARATUS - It is made possible to mitigate appearance of the strap-shaped disturbance image and shift to the side lobe naturally. The sense of incongruity for an image viewed in a transitional zone is reduced by performing interpolation processing between parallax information pieces displayed on pixels associated with adjacent exit pupils. | 02-10-2011 |
| 20110242091 | IMAGE PROCESSING CIRCUIT - An image processing circuit includes a first memory, a second memory, a write unit and a read unit. The first and second memories alternately store sub pixels of an input image including a plurality of parallax images corresponding to different view point directions. The write unit writes the sub pixels to one of the first and second memories. The read unit reads the sub pixels as an output image from the other of the first and second memories. Each of the first and second memories stores sub pixels for a plurality of successive lines. While the write unit writes the sub pixels of the input image to one of the first and second memories, the read unit reads the sub pixels of the output image from the other of the first and second memories. The first and the second memories are alternately changed. | 10-06-2011 |
Hitoshi Kobayashi, Kawasaki-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090051685 | STEREOSCOPIC IMAGE DISPLAY APPARATUS - A stereoscopic image display apparatus includes: a plane display device including a display panel formed of pixels arranged in a matrix form and an image display controller controlling an image displayed on the display panel; an optical plate including a plurality of lenses provided in front of the display panel and controlling light rays illuminated from the pixels; a display mode selector selecting one of stereoscopic image display and two-dimensional image display as a display mode; an analyzer analyzing image information contained in a two-dimensional image displayed based on a display information and determine whether to process the two-dimensional image when two-dimensional image display as a display mode be selected; and an image processor processing the two-dimensional image based on a result of the analysis conducted by the analyzer, sending the processed two-dimensional image to the image display controller, and causing the image display controller to display the processed two-dimensional image on the display panel. | 02-26-2009 |
| 20100073347 | STEREOSCOPIC IMAGE DISPLAY APPARATUS - It is made possible to prevent luminance falling and moire occurrence and change over between a two-dimensional image and a three-dimensional image partially. When displaying one of a three-dimensional image and a two-dimensional image on a background and displaying the other image in a window, a flag bit indicating whether the first and second electrodes overlap the window is set. Waveforms differing according to the flag bit are applied to the first and second electrodes as pulses applied to the opposed first and second electrodes of a variable polarization cell. As a result, three-dimensional image display is partially conducted in the window and two-dimensional image display is conducted in areas other than the window. Or two-dimensional image display is partially conducted in the window and three-dimensional image display is conducted in areas other than the window. | 03-25-2010 |
Hitoshi Kobayashi, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20080208426 | BRAKE CONTROL APPARATUS AND BRAKE CONTROL METHOD - A brake control apparatus has wheel cylinders, hydraulic pressure supply sources pressurizing an inside of the wheel cylinder, control valves performing a pressure-raising/reducing control of the inside of the wheel cylinder, and at least two actuator units grouped according to a diagonal wheel cylinder system or a fore-and-aft wheel cylinder system, one of which has a main control section and the other of which has a sub control section. Both the control sections control the plurality of hydraulic pressure supply sources and the control valves based on a vehicle status amount input to both the control sections via communication lines. When the actuator unit in which the main control section is included becomes abnormal, the sub control section drives the hydraulic pressure supply source and the control valves belonging to the actuator unit of the sub control section and controls the internal pressures of the wheel cylinders. | 08-28-2008 |
| 20080232015 | CIRCUIT ABNORMALITY DETERMINING APPARATUS AND METHOD - In circuit abnormality determining apparatus and method applicable to a brake control apparatus, an abnormality determining section determines at least one of an abnormality location of the electric circuit and an abnormality kind of the electric circuit on a basis of monitoring results of a current state in the electric circuit detected by a current detection section, a voltage state of the electric circuit detected by a open circuit detection section, and a power supply voltage. | 09-25-2008 |
| 20090091180 | BRAKE CONTROL APPARATUS, AND PROCESS OF OPERATING THE SAME - In a brake control apparatus, a fluid passage section is hydraulically connected between a hydraulic pressure source and a wheel cylinder. A first pressure sensor measures a first quantity correlated to a hydraulic pressure outputted by the hydraulic pressure source. A second pressure sensor measures a second quantity correlated to an internal pressure of the wheel cylinder. A controller controls a braking force of a wheel by the wheel cylinder. The controller is configured to: allow the first pressure sensor to obtain a value of the first quantity, and allow the second pressure sensor to obtain a value of the second quantity, while allowing a selector to regulate fluid communication between the hydraulic pressure source and the wheel cylinder; and calibrate the first and second pressure sensors with respect to each other in accordance with the obtained values of the first and second quantities. | 04-09-2009 |
Hitoshi Kobayashi, Kudamatsu-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090081872 | PLASMA ETCHING METHOD FOR ETCHING SAMPLE - The invention provides an etching method having selectivity of a high-K material such as Al | 03-26-2009 |
Hitoshi Kobayashi, Ishikawa-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20110318894 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include forming a first semiconductor region of a second conductivity type on a semiconductor layer of a first conductivity type, forming a mask selectively opening a surface of the first semiconductor region, and forming a trench penetrating through the first semiconductor region to reach the semiconductor layer. The method can include exposing further a part of the surface of the first semiconductor region from the mask. The method can include forming a control electrode in the trench, and forming selectively a second semiconductor region of the first conductivity type on the surface of the first semiconductor region. The method can include removing the mask having the opening. The method can include forming selectively a third conductor region of the second conductivity type on the surface of the first semiconductor region. | 12-29-2011 |
Hitoshi Kobayashi, Nagano JP
| Patent application number | Description | Published |
|---|---|---|
| 20120125067 | ORIFICE PLATE AND MANUFACTURING METHOD OF THE ORIFICE PLATE - An orifice plate for liquid injection made of plate-shaped stainless steel, wherein an orifice is formed by shearing, is characterized in that the average crystal grain size of the stainless steel is 3 μm or less. The thickness of the plate-shaped stainless steel is 1.2 mm or less, and preferably 0.1 mm or less. The aspect ratio of the orifices is 0.8 or lower. The orifices are formed orthogonal to the plate surface, or slanted by 50° or at smaller angles. The plate-shaped stainless steel has a composition containing C, Mn, and Si. | 05-24-2012 |
Hitoshi Kobayashi, Kudamatsu JP
| Patent application number | Description | Published |
|---|---|---|
| 20120125890 | PLASMA PROCESSING METHOD - In the present invention, provided is a plasma processing method which reduces or eliminates the emission of contaminating matters caused by a quality-altered layer on the surface of yttria of a processing chamber's inner wall and parts inside the processing chamber. It is the plasma processing method including an etching step of setting a sample inside the processing chamber, and etching the sample, a deposition-product removing step of removing a deposition product by using a plasma, the deposition product being deposited inside the processing chamber by the etching step, the plasma being generated using a gas which contains fluorine or chlorine, and a step of exposing, to a rare-gas-based plasma, the inside of the processing chamber after the deposition-product removing step. | 05-24-2012 |