| Patent application number | Description | Published |
| 20100164103 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor layer composed of one of GaAs based semiconductor, InP-based semiconductor, and GaN-based semiconductor; a first silicon nitride film that is provided on the semiconductor layer, and of which an end portion is in contact with a surface of the semiconductor layer; a protective film that is composed of one of polyimide and benzocyclobutene, and is provided on the semiconductor layer and the first silicon nitride film, the protective film covering the end portion of the first silicon nitride film; and a first metallic layer that is composed of one of titanium, tantalum and platinum, and is continuously provided from a first portion located between the semiconductor layer and the protective film to a second portion located between the end portion of the first silicon nitride film and the protective film, the first metallic layer being in contact with the surface of the semiconductor layer and a surface of the end portion of the first silicon nitride film. | 07-01-2010 |
| 20100164112 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor layer, an electrode pad that is composed of Au and is provided on the semiconductor layer, a silicon nitride film provided on the semiconductor layer and the electrode pad so that an end portion of the silicon nitride film is located, and a metal layer that contacts a part of a surface of the electrode pad and the end portion of the silicon nitride film and is provided so that another part of the surface of the electrode pad is exposed, the metal layer including any of Ti, Ta and Pt. | 07-01-2010 |
| 20100193894 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor chip, and a guard ring made of an electrically conductive material and arranged between electrodes on the semiconductor chip and side edges of the semiconductor chip, the guard ring being divided by isolating sections on the semiconductor chip. | 08-05-2010 |
| Patent application number | Description | Published |
| 20100172189 | NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE - A non-volatile semiconductor storage device includes: a memory string including a plurality of memory cells connected in series; a first selection transistor having one end connected to one end of the memory string; a first wiring having one end connected to the other end of the first selection transistor; a second wiring connected to a gate of the first selection transistor. A control circuit is configured to boost voltages of the second wiring and the first wiring in the erase operation, while keeping the voltage of the first wiring greater than the voltage of the second wiring by a certain potential difference. The certain potential difference is a potential difference that causes a GIDL current. | 07-08-2010 |
| 20100214838 | NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE - A non-volatile semiconductor storage device includes a control circuit performing an erase operation to erase data from a selected one of memory transistors. The control circuit applies a first voltage to the other end of selected one of selection transistors, causes the selected one of the selection transistors to turn on, and causes any one of the memory transistors to turn on that is closer to the selection transistor than the selected one of the memory transistors. The control circuit also applies a second voltage lower than the first voltage to a gate of the selected one of the memory transistors. Such a potential difference between the first voltage and the second voltage causing a change in electric charges in the electric charge storage layer. | 08-26-2010 |
| 20100238732 | NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE - When a data erase operation is performed in one memory cell block, a first voltage is applied to one source line selected from m source lines in the one memory cell block. A second voltage equal to a voltage of the source lines before the data erase operation begins is applied to the other source lines. Then, after a certain time delay from application of the first voltage, a third voltage smaller than the first voltage is applied to a third conductive layer of a source-side selection transistor connected to a selected source line. Then, a hole current is produced near a third gate insulation layer due to a potential difference between the first and third voltage. A fourth voltage is applied to one of first conductive layers connected to one of the memory transistor to be erased. The other first conductive layers are brought into a floating state. | 09-23-2010 |
| 20110013454 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device comprises: a plurality of first memory strings; a first select transistor having one end thereof connected to one end of the first memory strings; a first line commonly connected to the other end of a plurality of the first select transistors; a switch circuit having one end thereof connected to the first line; and a second line commonly connected to the other end of a plurality of the switch circuits. The switch circuit controls electrical connection between the second line and the first line. | 01-20-2011 |
| 20120069655 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A memory string is configured by a plurality of memory transistors and a spare memory transistor connected in series. Word lines are connected to gates of the memory transistors. A spare word line is connected to a gate of the spare memory transistor. The memory string comprises a first semiconductor layer, a charge storage layer, a plurality of first conductive layers, and a second conductive layer. The first semiconductor layer extends in a perpendicular direction with respect to a substrate. The charge storage layer surrounds a side surface of the first semiconductor layer. The plurality of first conductive layers surround a side surface of the first semiconductor layer with the charge storage layer interposed therebetween, and function as the word lines. The second conductive layer surrounds a side surface of the first semiconductor layer with the charge storage layer interposed therebetween, and functions as the spare word line. | 03-22-2012 |
| Patent application number | Description | Published |
| 20090126788 | SOLAR CELL AND SOLAR CELL MODULE INCLUDING THE SAME - Provided is a solar cell in which a linear n finger electrode and a linear p finger electrode are alternately arranged on a projection plane parallel to a main surface of a substrate, and which is arranged in a predetermined arrangement direction, including an n-side bus bar electrode connected to the n finger electrode and insulated from the p finger electrode and a p-side bus bar electrode connected to the p finger electrode and insulated from the n finger electrode. The n-side bus bar electrode and the p-side bus bar electrode are provided on a same main surface side of the substrate, intersect with the n finger electrode and the p finger electrode respectively on the projection plane, and have a slope angle relative to the predetermined arrangement direction. | 05-21-2009 |
| 20090183759 | SOLAR CELL MODULE - To suppress a decrease in power collection efficiency, provided is a solar cell module including; first and second solar cells arranged in a first direction; and a wiring member electrically connecting the first and second solar cells. In the solar cell module, the first and second solar cells each include a light-receiving surface receiving light, a back surface provided on the opposite side of the light-receiving surface, and p-side and n-side electrodes formed on the back surface; the wiring member is connected to the n-side electrode of the first solar cell at a first connecting point, and connected to the p-side electrode of the second solar cell at a second connecting point; and, in a planar view of the back surface, the first and second connecting points are located on a line intersecting with the first direction. | 07-23-2009 |
| Patent application number | Description | Published |
| 20080276981 | SOLAR CELL MODULE - The first and second solar cells are arranged to be adjacent to each other in the arrangement direction. On the back surface of the first solar cell, the multiple first n-type regions are formed in the arrangement direction and the multiple first p-type regions are formed between each of the multiple first n-type regions. On the back surface of the second solar cell, the multiple second p-type regions are formed in the arrangement direction and the multiple second n-type regions are formed between each of the multiple second p-type regions. Each of the multiple first n-type regions and each of the multiple second p-type regions are formed on the back surface in a substantially straight line. Each of the multiple first p-type regions and each of the multiple second n-type regions are formed on the back surface in a substantially straight line. | 11-13-2008 |
| 20090056804 | SOLAR CELL - A solar cell having a through-hole electrode with an improved manufacturing yield is provided. The solar cell includes a through-hole passing through a photoelectric converter from a light-receiving surface to the back surface of the photoelectric converter. One end portion on the back surface side of the through-hole branches off in multiple back surface side branch portions and the back surface side branch portions open on the back surface of the photoelectric converter. | 03-05-2009 |
| 20090314346 | SOLAR CELL AND MANUFACTURING METHOD OF THE SOLAR CELL - A p type amorphous silicon layer is stacked, by a CVD method, on a main surface of an n type single-crystalline silicon substrate; an n type amorphous silicon layer is stacked, by the CVD method, on a surface opposite to the surface on which the p type amorphous silicon layer is stacked; and, by using a laser ablation processing method, through-holes are formed in the n type single-crystalline silicon substrate, the p type amorphous silicon layer, and the n type amorphous silicon layer. Subsequently, an insulating layer is formed on an inner wall surface of each of the through-holes, and then a conductive material is filled therein. | 12-24-2009 |
| Patent application number | Description | Published |
| 20090219342 | INKJET PRINTER - An inkjet printer including a UVLED unit which emits ultraviolet light to a print medium supported on a supporting table to cure UV ink droplets deposited on the print medium. The inkjet printer further includes a controller which adjust the light quantity of ultraviolet light, emitted from the UVLED unit to the UV ink droplets deposited on the print medium, from a light quantity for temporary curing to a light quantity for final curing, and a control unit capable of selecting between a two-stage curing mode in which UV ink droplets deposited on the print medium are temporarily cured ant are then finally cured and a single-stage curing mode in which UV ink droplets are finally cured by an irradiation with ultraviolet light at one time by means of the UVLED unit and the controller. | 09-03-2009 |
| 20090244157 | INKJET PRINTER AND PRINTING METHOD - An inkjet printer including an inkjet head unit having inkjet heads for ejecting UV inks, an UVLED unit having a UVLED for emitting ultraviolet light, and a control unit for controlling the inkjet head unit and the UVLED unit. The control unit controls the inkjet head unit and the UVLED unit to move in the scanning direction, controls the inkjet heads to eject UV inks, and controls the UVLED to emit ultraviolet light of a first light quantity. After that, the control unit controls the inkjet head unit and the UVLED unit to move in the direction opposite to the scanning direction and controls the UVLED to emit ultraviolet light of a second light quantity. | 10-01-2009 |
| 20090244230 | ULTRAVIOLET CURING INKJET PRINTER, PRINTING METHOD USED IN ULTRAVIOLET CURING INKJET PRINTER, AND HEAD - An ultraviolet curing inkjet printer includes a first ejecting device, a first ultraviolet light irradiation device, and a second ultraviolet light irradiation device. The first ultraviolet light irradiation device is configured to emit ultraviolet light of a first light quantity for temporarily curing the ultraviolet curable inks ejected from the first ejecting device. The first ultraviolet light irradiation device is disposed posterior to the first ejecting device in a first direction as a scanning direction. The second ultraviolet light irradiation device is configured to emit ultraviolet light of a second light quantity for finally curing the ultraviolet curable inks temporarily cured by the first ultraviolet light irradiation device. The second ultraviolet light irradiation device is disposed anterior to the first ejecting device in a second direction, which is perpendicular to the first direction and is a moving direction of a recording medium relative to the first ejecting device. | 10-01-2009 |