Patent application number | Description | Published |
20110057166 | NONPOLAR III-NITRIDE LIGHT EMITTING DIODES WITH LONG WAVELENGTH EMISSION - A III-nitride film, grown on an m-plane substrate, includes multiple quantum wells (MQWs) with a barrier thickness of 27.5 nm or greater and a well thickness of 8 nm or greater. An emission wavelength can be controlled by selecting the barrier thickness of the MQWs. Device fabricated using the III-nitride film include nonpolar III-nitride light emitting diodes (LEDs) with a long wavelength emission. | 03-10-2011 |
20110233689 | SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND PROCESS FOR PRODUCING SEMICONDUCTOR SUBSTRATE - There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material. | 09-29-2011 |
20110237054 | PLANAR NONPOLAR GROUP III-NITRIDE FILMS GROWN ON MISCUT SUBSTRATES - A nonpolar III-nitride film grown on a miscut angle of a substrate. The miscut angle towards the <000-1> direction is 0.75° or greater miscut and less than 27° miscut towards the <000-1> direction. Surface undulations are suppressed and may comprise faceted pyramids. A device fabricated using the film is also disclosed. A nonpolar III-nitride film having a smooth surface morphology fabricated using a method comprising selecting a miscut angle of a substrate upon which the nonpolar III-nitride films are grown in order to suppress surface undulations of the nonpolar III-nitride films. A nonpolar III-nitride-based device grown on a film having a smooth surface morphology grown on a miscut angle of a substrate which the nonpolar III-nitride films are grown. The miscut angle may also be selected to achieve long wavelength light emission from the nonpolar film. | 09-29-2011 |
20120175739 | PLANAR NONPOLAR GROUP-III NITRIDE FILMS GROWN ON MISCUT SUBSTRATES - A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an α-axis direction comprising a 0.15° or greater miscut angle towards the α-axis direction and a less than 30° miscut angle towards the α-axis direction. | 07-12-2012 |
Patent application number | Description | Published |
20100012626 | WIRE ELECTRICAL DISCHARGE MACHINING APPARATUS - A wire electrical discharge machining apparatus includes a unit capable of separately opening and closing each of a high impedance path and a low impedance path, a unit that sets an open/close pattern in which a combination of closing one of the feeding paths and opening another one of the feeding paths is designated for switching power feeding between the high impedance path and the low impedance path, a unit that changes pulse energy per feeding pulse in a present feeding path to reduce a difference in discharge pulse energy applied to an inter-electrode gap from a machining power supply between at a time of high-impedance-path feeding and at a time of low-impedance-path feeding, and a unit that controls opening and closing of the path open/close unit in accordance with the changed open/close pattern. | 01-21-2010 |
20100084378 | WIRE ELECTRICAL DISCHARGE MACHINING APPARATUS - A machining-energy calculating unit accumulates a discharge current value for each discharge position to calculate a machining energy in a certain time period from the present time to the past time. An energy-distribution changing unit determines the presence or absence of imbalance in the energy by obtaining a machining energy distribution in an up-down direction of the machining gap based on the machining energy, and when there is imbalance, the energy-distribution changing unit produces a new open/close pattern in which a machining energy distribution that eliminates the imbalance. Power feeding is then performed based on the new open/close pattern. | 04-08-2010 |
20100219164 | FLUID-QUALITY CONTROL METHOD, FLUID-QUALITY CONTROL APPARATUS, AND ELECTRIC-DISCHARGE MACHINING APPARATUS EMPLOYING THE SAME - Target fluid is made into electrolyte solution when measured fluid-quality value is lower than a first condition value, by substituting an impurity anion contained in the target fluid with a predetermined anion and substituting an impurity cation contained in the target fluid with a predetermined cation, and purified when the fluid-quality value is higher than a second condition value. The above procedures are repeated, so that the fluid-quality value of the target fluid falls within a predetermined range, to make the target fluid into electrolyte solution with a correlation between pH and conductivity. | 09-02-2010 |
20100224596 | WIRE ELECTRICAL DISCHARGE MACHINING APPARATUS - In a wire electrical discharge machining apparatus, an upper main-discharge power supply is connected between an upper conducting terminal and a workpiece using an upper main-feeder line capable of configuring outward and homeward paths, and a lower main-discharge power supply is connected between a lower conducting terminal and the workpiece using a lower main-feeder line capable of configuring outward and homeward paths. Moreover, a sub-discharge power supply is connected between the upper conducting terminal and the workpiece and between the lower conducting terminal and the workpiece using an upper and a lower sub-feeder lines that have higher impedances than the impedances of the upper and the lower main-feeder lines and can configure outward and homeward paths. | 09-09-2010 |
Patent application number | Description | Published |
20090057274 | ELECTRIC DISCHARGE MACHINE AND ELECTRIC DISCHARGE MACHINING METHOD - In an electric discharge machining apparatus that machines a workpiece ( | 03-05-2009 |
20090116893 | Printing Device and Printing Method - A first cutter | 05-07-2009 |
20090277876 | ELECTRICAL DISCHARGE MACHINING APPARATUS AND ELECTRICAL DISCHARGE MACHINING METHOD - An electrical-discharge machining apparatus for machining a workpiece ( | 11-12-2009 |
20090314747 | WIRE ELECTRIC DISCHARGE MACHINE - A wire electric discharge machine includes a wire electrode; a machining power supply that supplies a machining current to between the wire electrode and a workpiece; a first power feed contact and a second power feed contact that respectively feed power to the wire electrode; a first machining-current loop that lets a first machining current to flow from the first power feed contact toward the workpiece; a second machining-current loop that lets a second machining current to flow from the second power feed contact toward the workpiece; an impedance switching circuit that is provided in at least any one of the first machining-current loop and the second machining-current loop; and a control unit that controls a flow ratio of the first machining current and the second machining current by changing an impedance of the impedance switching circuit. | 12-24-2009 |
20100133237 | Wire-Discharge Machining Apparatus - A wire-discharge machining apparatus controls a short circuit between a wire electrode and a workpiece and wire-breakage, and makes it easy to improve productivity, by performing power supply control to mix an upper-side power supply state in which a high-frequency pulse voltage is applied from an upper-side power supplying unit, a lower-side power supply state in which the high-frequency pulse voltage is applied from a lower-side power supplying unit, and a both-sides power supply state in which the high-frequency pulse voltage is applied to the wire electrode from both power supplying units in synchronization with each other during a period of electric discharge machining. | 06-03-2010 |
Patent application number | Description | Published |
20080304401 | INFORMATION RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical information recording medium includes pre-grooves with an irregular shape and lands each of which is sandwiched between the pre-grooves adjacent to each other, where the pre-grooves and lands are defined on an interface between a recording layer and a light reflection layer in a recording film, where the recording film includes a light reflectivity that enables reproduction with light of 650±5 nm, the recording layer includes a recording sensitivity with respect to light by a wavelength shorter than 650±5 nm, and a recording mark can be formed on the pre-groove by using light with a wavelength shorter than 650±5 nm. | 12-11-2008 |
20090003159 | OPTICAL DISK APPARATUS AND OPTICAL DISK RECORDING METHOD - According to one embodiment, there is provided an optical disk apparatus including a recording unit which irradiates an optical disk with a laser beam to record information in a first format and a second format, a generation unit which generates warning information to an optical disk apparatus capable of performing a read process in the second format while being not capable of performing the read process in the first format, the warning information warning that information is recorded in the first format in the optical disk, and a control unit which controls the recording unit to record the warning information in the second format in the optical disk apparatus when the information is recorded in the first format in the optical disk. | 01-01-2009 |
20090292896 | INFORMATION MANAGEMENT METHOD, RECORDING/PLAYBACK APPARATUS, AND INFORMATION STORAGE MEDIUM - In an information management method according to an embodiment of the invention, one or more freely installable memory cards are used. A suitable information management can be made even if a part or all of the memory cards is/are optionally attached or detached. Digital AV information of which recording may be distributed over the one or more memory cards is managed according to a prescribed format (which is common to all of the memory cards). Identification information for identifying the card is recorded on each of the memory cards. Allocation information (FAT) indicating where is allocated a portion of the digital AV information is also recorded on each of the memory cards. The allocation information of each of the memory cards identified by the identification information is acquired, and the acquired allocation information is integrated. The acquisition and integration are performed each time the memory card is attached or detached. | 11-26-2009 |
20100135436 | SIGNAL PROCESSING SYSTEM AND INFORMATION STORAGE MEDIUM - According to one embodiment, a first encoder encodes main information, a second encoder encodes sub-information, a first modulator modulates a carrier based on an output of the first encoder, a duplicating module duplicates an output of the second encoder to generate encoded sub-information units, and a second modulator amplitude-modulates an output of the first modulator based on the encoded sub-information units. The second modulator amplitude-modulates with σ/(μ×(2 | 06-03-2010 |
Patent application number | Description | Published |
20080308907 | PLANAR NONPOLAR m-PLANE GROUP III NITRIDE FILMS GROWN ON MISCUT SUBSTRATES - A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction. | 12-18-2008 |
20090039339 | NONPOLAR III-NITRIDE LIGHT EMITTING DIODES WITH LONG WAVELENGTH EMISSION - A III-nitride film, grown on an m-plane substrate, includes multiple quantum wells (MQWs) with a barrier thickness of 27.5 nm or greater and a well thickness of 8 nm or greater. An emission wavelength can be controlled by selecting the barrier thickness of the MQWs. Device fabricated using the III-nitride film include nonpolar III-nitride light emitting diodes (LEDs) with a long wavelength emission. | 02-12-2009 |
20090039356 | PLANAR NONPOLAR M-PLANE GROUP III-NITRIDE FILMS GROWN ON MISCUT SUBSTRATES - A nonpolar III-nitride film grown on a miscut angle of a substrate. The miscut angle towards the <000-1> direction is 0.75° or greater miscut and less than 27° miscut towards the <000-1> direction. Surface undulations are suppressed and may comprise faceted pyramids. A device fabricated using the film is also disclosed. A nonpolar III-nitride film having a smooth surface morphology fabricated using a method comprising selecting a miscut angle of a substrate upon which the nonpolar III-nitride films are grown in order to suppress surface undulations of the nonpolar III-nitride films. A nonpolar III-nitride-based device grown on a film having a smooth surface morphology grown on a miscut angle of a substrate which the nonpolar III-nitride films are grown. The miscut angle may also be selected to achieve long wavelength light emission from the nonpolar film. | 02-12-2009 |
20090194761 | ENHANCEMENT OF OPTICAL POLARIZATION OF NITRIDE LIGHT-EMITTING DIODES BY INCREASED INDIUM INCORPORATION - An increase in the Indium (In) content in light-emitting layers of light-emitting diode (LED) structures prepared on nonpolar III-nitride substrates result in higher polarization ratios for light emission than LED structures containing lesser In content. Polarization ratios should be higher than 0.7 at wavelengths longer than 470 nm. | 08-06-2009 |
20100052008 | ENHANCEMENT OF OPTICAL POLARIZATION OF NITRIDE LIGHT-EMITTING DIODES BY WAFER OFF-AXIS CUT - An off-axis cut of a nonpolar III-nitride wafer towards a polar (−c) orientation results in higher polarization ratios for light emission than wafers without such off-axis cuts. A 5° angle for an off-axis cut has been confirmed to provide the highest polarization ratio (0.9) than any other examined angles for off-axis cuts between 0 and 27°. | 03-04-2010 |
Patent application number | Description | Published |
20110227042 | METHOD FOR PRODUCING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING ELECTRONIC DEVICE, AND REACTION APPARATUS - There is provided a method of producing a semiconductor wafer by thermally processing a base water having a portion to be thermally processed that is to be thermally processed. The method comprises a step of providing, on the base wafer, a portion to be heated that generates heat through absorption of an electromagnetic wave and selectively heats the portion to be thermally processed, a step of applying an electromagnetic wave to the base wafer, and a step of lowering the lattice defect density of the portion to he thermally processed, by means of the heat generated by the portion to be heated through the absorption of the electromagnetic wave. | 09-22-2011 |
20110227199 | METHOD FOR PRODUCING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING ELECTRONIC DEVICE, AND REACTION APPARATUS - There is provided a method of producing a semiconductor wafer by thermally processing a base wafer having a portion to be thermally processed that has a single-crystal layer and is to be subjected to thermal processing and a portion to be protected that is to be protected from heal, to be added during the thermal processing. The method comprises a step of forming, above the portion to be protected, a protective layer for protecting the portion to be protected from an electromagnetic wave to be applied to the base wafer, and a step of annealing the portion to be thermally processed, by applying the electromagnetic wave to the entire base wafer. | 09-22-2011 |
20120205747 | SEMICONDUCTOR SUBSTRATE, FIELD-EFFECT TRANSISTOR, INTEGRATED CIRCUIT, AND METHOD FOR FABRICATING SEMICONDUCTOR SUBSTRATE - A semiconductor substrate includes a substrate, an insulating layer, and a semiconductor layer. The insulating layer is over and in contact with the substrate. The insulating layer includes at least one of an amorphous metal oxide and an amorphous metal nitride. The semiconductor layer is over and in contact with the insulating layer. The semiconductor layer is formed by crystal growth. | 08-16-2012 |
20130341721 | SEMICONDUCTOR WAFER, FIELD-EFFECT TRANSISTOR, METHOD OF PRODUCING SEMICONDUCTOR WAFER, AND METHOD OF PRODUCING FIELD-EFFECT TRANSISTOR - Provided is a semiconductor wafer including a base wafer, a first insulating layer, and a semiconductor layer. Here, the base wafer, the first insulating layer and the semiconductor layer are arranged in an order of the base wafer, the first insulating layer and the semiconductor layer, the first insulating layer is made of an amorphous metal oxide or an amorphous metal nitride, the semiconductor layer includes a first crystal layer and a second crystal layer, the first crystal layer and the second crystal layer are arranged in an order of the first crystal layer and the second crystal layer in such a manner that the first crystal layer is positioned closer to the base wafer, and the electron affinity E | 12-26-2013 |
20140091392 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING SEMICONDUCTOR WAFER, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - There is provided a semiconductor device including a first channel-type first MISFET formed and a second channel-type second MISFET: a first source and a first drain of the first MISFET and a second source and a second drain of the second MISFET are made of the same conductive substance, and the work function Φ | 04-03-2014 |
20140091393 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING SEMICONDUCTOR WAFER, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - There is provided a semiconductor device including: a first source and a first drain of a first-channel-type MISFET formed on a first semiconductor crystal layer, which are made of a compound having an atom constituting the first semiconductor crystal layer and a nickel atom, a compound having an atom constituting the first semiconductor crystal layer and a cobalt atom, or a compound having an atom constituting the first semiconductor crystal layer, a nickel atom, and a cobalt atom; and a second source and a second drain of a second-channel-type MISFET formed on a second semiconductor crystal layer, which are made of a compound having an atom constituting the second semiconductor crystal layer and a nickel atom, a compound having an atom constituting the second semiconductor crystal layer and a cobalt atom, or a compound having an atom constituting the second semiconductor crystal layer, a nickel atom, and a cobalt atom. | 04-03-2014 |
20140091398 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING SEMICONDUCTOR WAFER, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - Provided is a semiconductor device including a first source and a first drain of a P-channel-type MISFET formed on a Ge wafer, which are made of a compound having a Ge atom and a nickel atom, a compound having a Ge atom and a cobalt atom, or a compound having a Ge atom, a nickel atom, and a cobalt atom, and a second source and a second drain of an N-channel-type MISFET formed on the Group III-V compound semiconductor, which are made of a compound having a Group III atom, a Group V atom, and a nickel atom, a compound having a Group III atom, a Group V atom, and a cobalt atom, or a compound having a Group III atom, a Group V atom, a nickel atom, and a cobalt atom. | 04-03-2014 |
20140203408 | METHOD OF PRODUCING COMPOSITE WAFER AND COMPOSITE WAFER - There is provided a method that includes forming a sacrificial layer and the semiconductor crystal layer on a semiconductor crystal layer formation wafer in the stated order, bonding together the semiconductor crystal layer formation wafer and a transfer-destination wafer such that a first surface of the semiconductor crystal layer and a second surface of the transfer-destination wafer face each other, and splitting the transfer-destination wafer from the semiconductor crystal layer formation wafer with the semiconductor crystal layer remaining on the transfer-destination wafer side, by etching away the sacrificial layer by immersing the semiconductor crystal layer formation wafer and the transfer-destination wafer wholly or partially in an etchant. Here, the transfer-destination wafer includes an inflexible wafer and an organic material layer, and a surface of the organic material layer is the second surface. | 07-24-2014 |