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Hisashi Kaneko
Hisashi Kaneko, Fujisawa-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080237863 | Semiconductor device and manufacturing method of semiconductor device - A semiconductor device, which is comprised of a copper wiring layer which is formed above a semiconductor substrate, a pad electrode layer which conducts electrically to the copper wiring layer and has an alloy, which contains copper and a metal whose oxidation tendency is higher than copper, formed to extend to the bottom surface, and an insulating protective film which has an opening extended to the pad electrode layer, is provided. | 10-02-2008 |
| 20100003816 | Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed - An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF | 01-07-2010 |
| 20100115479 | Method for generating pattern, method for manufacturing semiconductor device, semiconductor device, and computer program - A method for generating a pattern includes reading out an interconnect layout and a hole layout, the interconnect layout prescribing interconnect patterns, the hole layout prescribing hole patterns configured to connect to the interconnect patterns; extracting one of the hole patterns to be connected within the same interconnect layer level to one of the interconnect patterns in a pattern processing area; extracting a first processing area including the extracted hole pattern; calculating a first pattern density of the interconnect patterns included in the first processing area; and generating first additional patterns in the first processing area based on the first pattern density. | 05-06-2010 |
Hisashi Kaneko, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20090067086 | STORAGE DEVICE - A storage device includes plural recording media, a housing configured to accommodate the plural recording media, a plate that is fixed and extends round between two adjacent recording media in the housing, plural sliders each of which is mounted with a magnetic head that is configured to record information in or reproduce the information from a corresponding one of the plural recording media, and plural arms, each of which is mounted with one of the plural sliders only on a single surface, and configured to move the one of the plural sliders. | 03-12-2009 |
| 20090290261 | CARRIAGE ASSEMBLY AND DISK DRIVE - A carriage block body is coupled to a support shaft for relative rotation. A carriage arm extends from the carriage block body along an imaginary plane perpendicular to the longitudinal axis of the support shaft. A head suspension is attached to the tip end of the carriage arm. A wiring extends outside the contour of the head suspension along the side of the carriage arm. A projection protrudes from the side of the carriage arm. An adhesive is utilized to bond the wiring to the projection. Even though airflow generated along the surface of a rotating disk medium collides against the carriage arm, the wiring is reliably prevented from fluttering outside the contour of the head suspension. The vibration of the wiring is thus significantly suppressed. The carriage arm is prevented from vibrating. | 11-26-2009 |
Hisashi Kaneko, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20080299766 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, includes forming a first dielectric film above a substrate, forming an opening in the first dielectric film, forming a catalytic characteristic film using at least one of a metal having catalytic characteristics and a conductive oxide having catalytic characteristics as its material on sidewalls and at a bottom of the opening, depositing a conductive material film using a conductive material in the opening in which the catalytic characteristic film is formed on the sidewalls and at the bottom, removing the catalytic characteristic film formed on the sidewalls of the opening, and forming a second dielectric film above the first dielectric film and the conductive material film after the removing. | 12-04-2008 |
| 20090156002 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND MANUFACTURING APPARATUS FOR SEMICONDUCTOR DEVICE - A wafer is placed on a lower electrode disposed in a reaction chamber; process gas is introduced into the reaction chamber; a magnetic field is applied at a position spaced from a surface of the wafer to be processed; plasma is generated by applying a high-frequency voltage between the lower electrode and an upper electrode disposed to face the lower electrode; the magnetic field is removed after the plasma is stabilized; and the wafer is plasma-processed. | 06-18-2009 |
Hisashi Kaneko, Kanagawa-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20080251385 | PLATING APPARATUS - A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion | 10-16-2008 |
| 20080296165 | PLATING APPARATUS - A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion | 12-04-2008 |