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Hisamatsu, Tokyo
Fumiaki Hisamatsu, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20100095144 | INFORMATION PROCESSING UNIT, POWER-SAVING MANAGEMENT PROGRAM, AND STORAGE MEDIUM STORED WITH THE POWER-SAVING MANAGEMENT PROGRAM - An information processing unit having an auto power-off function includes: a mode setting means for setting one mode from a plurality of pre-prepared power-saving modes in conformity with input by a user, wherein the plurality of power-saving modes includes a first mode and a second mode, and the first mode and the second mode differ in electricity consumption reduction effectiveness; a determination means for determining whether a non-operated state in which no input operation has been carried out by the user has continued for a predetermined time or longer; a processing execution means for executing internal processing; and a decision means for deciding whether or not to execute the auto power-off function based on the mode set by the mode setting means and internal processing executed by the processing execution means when the determination means has determined that the non-operated state has continued for a predetermined time or longer. A storage medium stores a computer program for power-saving management. A power-saving management method includes a mode setting step, a determination step, a processing execution step, and a decision step. | 04-15-2010 |
Hidenori Hisamatsu, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20080310415 | APPARATUS FOR PROCESSING PACKETS AND METHOD OF DOING THE SAME - An apparatus for processing a packet includes a packet processor operating in accordance with a clock signal having a predetermined frequency, to process a packet, and a clock-signal generator producing the clock signal and transmitting the clock signal to the packet processor, wherein the clock-signal generator generates a clock signal having a frequency defined in accordance with a time interval at which packets are input into the apparatus. | 12-18-2008 |
| 20090268629 | PACKET PROCESSING APPARATUS - A packet processing apparatus includes a packet buffer unit that temporarily holds packet data, a packet processing unit that processes packet data output from the packet buffer unit, a clock supply unit that supplies a clock signal to the packet processing unit, and a control unit that detects a buffer vacant time indicating a time during which no packet data exists in the packet buffer unit based on an accumulation amount of the packet data in the packet buffer unit, and controls an operational state of the clock supply unit in accordance with the buffer vacant time. | 10-29-2009 |
| 20090271647 | POWER SUPPLY CONTROL METHOD AND CURCUIT IN COMMUNICATION EQUIPMENT - A circuit includes: an input buffer for storing input data; a plurality of processing sections connected in series including a head processing section and a tail-end processing section to sequentially process the input data; and a power supply controller for controlling power supply to each of the plurality of processing sections depending on a lapse of time during which no input data is stored in the input buffer. | 10-29-2009 |
| 20090285105 | PACKET PROCESSOR, PACKET CONTROL METHOD, AND PACKET CONTROL PROGRAM - A packet processor having one or two or more packet processing units is provided with a packet detector which detects whether or not a packet exists in a packet processing unit, and outputs a packet detection signal indicating a result of the detection, and a clock frequency controller which controls a clock to be supplied to the packet processing unit based on the packet detection signal. | 11-19-2009 |
Kazuhito Hisamatsu, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20090011623 | Low profile board-mounted connector - An electrical connector mountable to a circuit board is disclosed. The disclosed connector includes a shell which comprises a first plate-like portion, a second plate-like portion and connection portions. The first plate-like portion extends in a predetermined direction and is provided with fixed portions at opposite ends thereof in the predetermined direction. The fixed portion is to be fixed to the circuit board. The second plate-like portion extends in the predetermined direction. Each of the connection portions connects the first and the second plate-like portion. The second plate-like portion is provided with force resist portions at opposite ends thereof in the predetermined direction. The force resist portions are configured so that, when a force is applied to the electrical connector along a direction from the first plate-like portion towards the second plate-like portion, the force resist portions resist the force. | 01-08-2009 |
| 20100167598 | Socket contact - A socket contact is configured to receive a part of a mating contact. The socket contact comprises a spring portion, a spring support portion and a lance. The spring portion is brought into contact with the mating contact when the socket contact receives the part of the mating contact. The spring support portion supports the spring portion. The lance is provided on the spring support portion. | 07-01-2010 |
Kenji Hisamatsu, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20090250258 | Wiring Substrate, Semiconductor Package, Electronic Instrument, And Wiring Substrate Manufacturing Method - One embodiment of the invention is a wiring substrate including an insulating base material layer, a metal layer on the insulating base material layer, and a solder resist laminated to the most superficial surface of the wiring substrate above the insulating base material layer, wherein the metal layer has a loop shaped pattern formed along the edge of the insulating base material layer, and the solder resist is formed in such a way that one portion of the pattern is exposed from, and one portion covered with, an extremity of the solder resist on the edge side, along the pattern. | 10-08-2009 |
Tadakazu Hisamatsu, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20100062413 | METHOD OF EVALUATING IBD, AMINO ACID DATA PROCESSOR, AMINO ACID DATA-PROCESSING METHOD, AMINO ACID DATA-PROCESSING SYSTEM, AMINO-ACID DATA-PROCESSING PROGRAM AND RECORDING MEDIUM - According to the method of evaluating IBD of the present invention, amino acid concentration data on the concentration value of amino acid in blood collected from a subject to be evaluated is measured, and an inflammatory bowel disease state in the subject is evaluated based on the measured amino acid concentration data of the subject. | 03-11-2010 |