| Patent application number | Description | Published |
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| 20110038194 | SEMICONDUCTOR STORAGE DEVICE - According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion. | 02-17-2011 |
| 20110069524 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a control circuit. The control circuit applies a first voltage to a selected one of a upper interconnections, applies a second voltage to an unselected one of the upper interconnections, applies a third voltage to a first dummy upper interconnection and independently controls the first to third voltages to be set to different values. | 03-24-2011 |
| 20110204309 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a semiconductor memory device includes a first interconnect, a second interconnect, a first fringe and a second fringe. The first interconnect is connected to a first memory cell. The second interconnect is connected to a second memory cell and is arranged at a first interval from the first interconnect in a first direction. The first fringe is formed on one end of the first interconnect. The second fringe is formed on one end of the second interconnect. The first fringe and the second fringe are arranged at the first interval in a second direction orthogonal to the first direction. | 08-25-2011 |
| Patent application number | Description | Published |
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| 20090173981 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor storage device has a first laminated portion including first insulating layers and first conductive layers laminated alternately, and a second laminated portion provided on an upper surface of the first laminated portion and including a second conductive layer formed between second insulating layers. The first laminated portion has a first semiconductor layer formed so as to contact with a gate insulating film and extend in a laminated direction. The second laminated portion has a second semiconductor layer formed so as to contact with a third insulating layer and the first semiconductor layer and extend in the laminated direction. The first semiconductor layer is of a first conductive type, and a portion of the second semiconductor layer which contacts with the side surface of the second conductive layer is of a second conductive type. | 07-09-2009 |
| 20100052017 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor memory device includes a first block having first memory cells and first select transistors, a second block having second memory cells and second select transistors, and arranged adjacent to the first block in a first direction, the second select transistor being arranged to face the first select transistor and commonly having a diffusion region with the first select transistor, a first interconnection layer provided on the diffusion region between the first and second blocks and extending in a second direction, and a second interconnection layer having a first portion provided in contact with an upper portion of the first interconnection layer and extending to a portion outside the first interconnection layer, and a second portion extending in the second direction and connected to the first portion in a portion outside a portion on the first interconnection layer. | 03-04-2010 |
| 20100052030 | NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory of an aspect of the present invention including a plurality of first active areas which are provided in the memory cell array side-by-side in a first direction and which have a dimension smaller than a fabrication limit dimension obtained by lithography, a second active area provided between the first active areas adjacent in the first direction, a memory cell unit which is provided in each of the plurality of first active areas and which has memory cells and select transistors, and a linear contact which is connected to one end of the memory cell unit and which extends in the first direction, wherein an area in which the linear contact is provided is one semiconductor area to which the plurality of first active areas are connected by the plurality of second active areas, and the bottom surface of the linear contact is planar. | 03-04-2010 |
| 20100155813 | SEMICONDUCTOR MEMORY DEVICE HAVING STACK GATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor memory device includes select transistors, cell transistors, and cell units. The select transistors formed on a substrate and include first electrodes. The cell transistors include second electrodes with a charge storage layer and a control. The cell units including a plurality of the cell transistors connected together in series between the two select transistors. A distance between the first electrodes and a distance between the first electrodes which is adjacent to the second electrodes and adjacent second electrodes are each at least double a distance between second electrodes. A surface of the substrate between second electrodes is flush with the surface of the substrate between the first electrode and the adjacent second electrodes. The surface of the substrate between the first electrodes is positioned lower than the surface of the substrate between the first electrodes and the second electrodes. | 06-24-2010 |
| 20100202208 | SEMICONDUCTOR DEVICE INCLUDING CONTACT PLUG HAVING AN ELLIPTICAL SECTIONAL SHAPE - A semiconductor device includes a first MOS transistor, second MOS transistors, first contact plugs, and a second contact plug. The first MOS transistor with a first conductivity is formed on a semiconductor substrate. The second MOS transistors with a second conductivity are formed on the semiconductor substrate. The first contact plugs has a circular planar shape. The second contact plug has an elliptical planar shape and is formed on a source or a drain in one of the second MOS transistors. The first contact plugs are formed on sources or drains in the remaining second MOS transistors and the first MOS transistor. | 08-12-2010 |
