Patent application number | Description | Published |
20090127630 | Method for Fabricating Isolated Integrated Semiconductor Structures - An integrated semiconductor structure and a method for fabricating an integrated semiconductor structure in a bulk semiconductor wafer. | 05-21-2009 |
20100032804 | HIGH VOLTAGE BIPOLAR TRANSISTOR AND METHOD OF FABRICATION - High voltage bipolar transistors built with a BiCMOS process sequence exhibit reduced gain at high current densities due to the Kirk effect. Threshold current density for the onset of the Kirk effect is reduced by the lower doping density required for high voltage operation. The widened base region at high collector current densities due to the Kirk effect extends laterally into a region with a high density of recombination sites, resulting in an increase in base current and drop in the gain. The instant invention provides a bipolar transistor in an IC with an extended unsilicided base extrinsic region in a configuration that does not significantly increase a base-emitter capacitance. Lateral extension of the base extrinsic region may be accomplished using a silicide block layer, or an extended region of the emitter-base dielectric layer. A method of fabricating an IC with the inventive bipolar transistor is also disclosed. | 02-11-2010 |
20100308416 | Method of Fabricating an Integrated Circuit with Gate Self-Protection, and an Integrated Circuit with Gate Self-Protection - An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor layer with electrically active regions in which and on which the MOS device and the bipolar device are formed and electrically inactive regions for isolating the electrically active regions from each other. The MOS device comprises a gate structure and a body contacting structure, wherein the body contacting structure is formed of a base layer deposited in a selected region over an electrically active region of the semiconductor layer, and the body contacting structure is electrically connected with the gate structure. The base layer forming the body contacting structure also forms the base of the bipolar device. The present invention further relates to a method for fabricating such an integrated circuit. | 12-09-2010 |
20110057289 | Ultrashallow Emitter Formation Using ALD and High Temperature Short Time Annealing - An integrated circuit containing a bipolar transistor including an emitter diffused region with a peak doping density higher than 1·10 | 03-10-2011 |
20130032892 | BIPOLAR TRANSISTOR IN BIPOLAR-CMOS TECHNOLOGY - A process of forming an integrated circuit containing a bipolar transistor and an MOS transistor, by forming a base layer of the bipolar transistor using a non-selective epitaxial process so that the base layer has a single crystalline region on a collector active area and a polycrystalline region on adjacent field oxide, and concurrently implanting the MOS gate layer and the polycrystalline region of the base layer, so that the base-collector junction extends into the substrate less than one-third of the depth of the field oxide, and vertically cumulative doping density of the polycrystalline region of the base layer is between 80 percent and 125 percent of a vertically cumulative doping density of the MOS gate. An integrated circuit containing a bipolar transistor and an MOS transistor formed by the described process. | 02-07-2013 |
20130328130 | BIPOLAR TRANSISTOR IN BIPOLAR-CMOS TECHNOLOGY - A process of forming an integrated circuit containing a bipolar transistor and an MOS transistor, by forming a base layer of the bipolar transistor using a non-selective epitaxial process so that the base layer has a single crystalline region on a collector active area and a polycrystalline region on adjacent field oxide, and concurrently implanting the MOS gate layer and the polycrystalline region of the base layer, so that the base-collector junction extends into the substrate less than one-third of the depth of the field oxide, and vertically cumulative doping density of the polycrystalline region of the base layer is between 80 percent and 125 percent of a vertically cumulative doping density of the MOS gate. An integrated circuit containing a bipolar transistor and an MOS transistor formed by the described process. | 12-12-2013 |
20140339678 | Ultrashallow Emitter Formation Using ALD and High Temperature Short Time Annealing - An integrated circuit containing a bipolar transistor including an emitter diffused region with a peak doping density higher than 1·10 | 11-20-2014 |
Patent application number | Description | Published |
20080211376 | Electron gun, electron beam exposure apparatus, and exposure method - An electron gun having an electron source emitting electrons includes: an acceleration electrode which accelerates the electrons; an extraction electrode which has a spherical concave surface having the center on an optical axis and facing the electron emission surface, and which extracts an electron from the electron emission surface; and a suppressor electrode which suppresses electron emission from a side surface of the electron source. In the electron gun, an electric field is applied to the electron emission surface while the electron source is kept at a low temperature in such an extent that sublimation of a material of the electron source would not be caused, to cause the electron source to emit a thermal field emission electron. | 09-04-2008 |
20080315089 | Electron gun, electron beam exposure apparatus, and exposure method - An electron gun includes an electron source configured to emit electrons. The electron source includes an electron emission region configured to emit the electrons and an electron emission restrictive region configured to restrict emission of the electrons. The electron emission restrictive region is located on a side surface of the electron source except an electron emission surface on a tip of the electron source and is covered with a different material from the electron source. The electron gun emits thermal field-emitted electrons by applying an electric field to the tip while maintaining a sufficiently low temperature to avoid sublimation of a material of the electron source. The material of the electron source may be lanthanum hexaboride (LaB | 12-25-2008 |
20100019172 | Multi-column electron beam exposure apparatus and multi-column electron beam exposure method - A multi-column electron beam exposure apparatus includes: a plurality of column cells; a wafer stage including an electron-beam-property detecting unit for measuring an electron beam property; and a controller for measuring beam properties of electron beams used in all the column cells by using the electron-beam-property detecting unit, and for adjusting the electron beams of the respective column cells so that the properties of the electron beams used in the column cells may be approximately identical. The electron beam property may be any of a beam position, a beam intensity, and a beam shape of the electron beam to be emitted. The electron-beam-property detecting unit may be a chip for calibration with a reference mark formed thereon or a Faraday cup. | 01-28-2010 |
20100019648 | Electron gun and electron beam exposure apparatus - An electron gun includes: an electron source; an accelerating electrode; an extraction electrode for extracting electrons from an electron emission surface of the electron source; a suppressor electrode for suppressing emission of electrons from a side surface of the electron source; and an electron beam converging unit for converging an electron beam of thermal field emission electrons emitted from the electron emission surface by applying an electric field to the electron emission surface. The electron beam converging unit is an electrostatic lens electrode which is placed between the extraction electrode and the accelerating electrode and having an opening portion in its center. A voltage is applied to the electrostatic lens electrode to converge the electron beam. | 01-28-2010 |
20110148297 | Multi-column electron beam exposure apparatus and magnetic field generation device - A multi-column electron beam exposure apparatus includes: multiple column cells; an electron beam converging unit in which two annular permanent magnets and electromagnetic coils are surrounded by a ferromagnetic frame, each of the two annular permanent magnets being magnetized in an optical axis direction and being symmetrical about the optical axis, the electromagnetic coils disposed near the annular permanent magnets and used to adjust magnetic fields of the annular permanent magnets; and a substrate provided with circular apertures through which electron beams used in the column cells pass, respectively, the substrate having the electron beam converging unit disposed in a side portion of each of the circular apertures. The two annular permanent magnets may be disposed one above the other in the optical axis direction with same polarities facing each other, and the electromagnetic coils may be provided inside or outside the annular permanent magnets in their radial direction. | 06-23-2011 |
20110226967 | Electron beam lithography apparatus and electron beam lithography method - An electron beam lithography apparatus includes a storage for storing data on a drawing pattern assigned a rank based on an accuracy required for a device pattern, a drawing pattern adjustment unit to generate data on divided drawing patterns based on the rank, a settlement wait time adjustment unit to determine a settlement wait time based on the rank, and a controller to draw the device pattern while irradiating an electron beam based on the data on the divided drawing patterns and the settlement wait time. The drawing pattern adjustment unit determines upper limits on the long-side length of a divided drawing pattern or on the area of the divided drawing pattern based on the rank, and divides the drawing pattern based on the upper limits. | 09-22-2011 |
20140231668 | ELECTRON BEAM LITHOGRAPHY DEVICE AND LITHOGRAPHIC METHOD - A high-accuracy and high-speed lithographic pattern is acquired by forming a square lattice matrix beam group with an interval which is an integral multiple of a beam size in a two-dimensional plane, switching on and off the mesh of a device to be drawn by a bitmap signal, forming a desired beam shape, deflecting the beam to a necessary position, and radiating a beam with a whole blanker being opened after the beam state is stabilized. On and off signals and a vector scan signal of each beam are provided, and the whole blanker is released after the beam is stabilized, and thus high-accuracy and high-speed lithography is performed with a small amount of data. When the total number of shots exceeds a constant value, the pattern data are modified and high-speed lithography is achieved. A semiconductor reversed bias p-n junction technique is preferably used for an individual blanker electrode. | 08-21-2014 |
Patent application number | Description | Published |
20090149676 | METHOD OF MANUFACTURING 3, 3' , 4, 4'-TETRAAMINOBIPHENYL - An object of the present invention is to provide an efficient method of manufacturing 3,3′,4,4′-tetraaminobiphenyl with a smaller number of steps. The manufacturing method of 3,3′,4,4′-tetraaminobiphenyl includes reacting the amino groups of a 4-halo-o-phenylenediamine with an inorganic sulfur compound to lead to a 5-halo-2,1,3-benzothiadiazole, subsequently coupling two molecules of the benzothiadiazole together to form a 5,5′-bis(2,1,3-benzothiadiazole) and then deprotecting the amino groups to yield 3,3′,4,4′-tetraaminobiphenyl. | 06-11-2009 |
20110172421 | N-(alpha-AROMATIC GROUP-SUBSTITUTED-2-NITRO-4,5-DIALKOXYBENZYLOXYCARBONYL)AMINE COMPOUND AND PROCESS FOR PRODUCING THE SAME - An object of the present invention is to provide a novel photobase generator which can sensitively generate a base even by h-ray in place of a conventional 2-nitro-4,5-dimethoxybenzyloxycarbonylamine compound. Disclosed is an N-(α-aromatic group-substituted-2-nitro-4,5-dialkoxybenzyloxycarbonyl)amine compound represented by the following general formula (I). | 07-14-2011 |