| Patent application number | Description | Published |
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| 20100223671 | Document checking apparatus, computer-readable recording medium, and document checking method - A document checking apparatus includes a keyword appearance position extracting unit that extracts keywords and the appearance positions of the keywords from a target document including a confidential document; a keyword pair extracting unit that treats each keyword of the appearance positions of the extracted keywords as a target and determines whether there is another extracted keyword within a predetermined range before and after the target keyword; a feature element matrix creating unit that generates, when it is determined that there is the another keyword, combination information obtained by combining the determination target keyword and the another keyword in association with anteroposterior information of the appearance positions of the keywords; and a computing unit that determines whether the number of combination information, among the plurality of combination information of the generated target document, identical to the combination information of the confidential document is not less than a predetermined value. | 09-02-2010 |
| 20100235452 | Email wrong transmission preventing apparatus and method - An email wrong transmission preventing apparatus calculates memory ratios of addresses of emails in a transmission log by a model expression in which the memory ratios decline over time, compiles the memory ratios of the emails for each destination to set weights, and records the weights in a user weight list. When receiving a planned outgoing email, the apparatus compares the weight of the destination of the planned outgoing email obtained by referring to the user weight list with a predetermined threshold and determines that the destination is “reliable” only if the weight is over the threshold. If even one of the destinations of the planned outgoing email is not “reliable”, the apparatus causes a sender terminal to display an address check screen to prompt address checking. When “checked” is inputted, the apparatus transfers the planned outgoing email to an email transmission server. | 09-16-2010 |
| 20110067102 | Outgoing email check system, check data providing apparatus, check data inspecting apparatus, and outgoing email check method - To allow inspecting whether a security check of a planned outgoing email is finished in an outgoing email check system, a check data providing apparatus | 03-17-2011 |
| 20110231607 | DATA PROCESSING METHOD FOR REMOVABLE STORAGE MEDIUM AND DATA PROCESSING DEVICE - A computer-implemented method that enables an operation relative to a removable storage medium connected with a computer includes, obtaining an erasing flag to be set to the removable storage medium on the basis of a predetermined rule when the removable storage medium being connected, obtaining a connection time when the removable storage medium is connected, and identifying whether a program being activated on the computer is an erasing program for erasing data stored in the removable storage medium. The computer-implemented method enables concealing, upon the erasing flag is being on and the program being activated being other than the erasing program, data to be erased classified on the basis of the connection time included in the data stored in the removable storage medium. | 09-22-2011 |
| Patent application number | Description | Published |
|---|
| 20090251275 | Semiconductor device - A semiconductor device | 10-08-2009 |
| 20100032798 | Semiconductor device - The semiconductor device includes: a substrate; an electric fuse that includes a lower-layer wiring formed on the substrate, a first via provided on the lower-layer wiring and connected to the lower-layer wiring, and an upper-layer wiring provided on the first via and connected to the first via, a flowing-out portion of a conductive material constituting the electric fuse being formed in a cut-off state of the electric fuse; and a heat diffusion portion that includes a heat diffusion wiring that is formed in the same layer as one of the upper-layer wiring and the lower-layer wiring and is placed on a side of the one of the upper-layer wiring and the lower-layer wiring, the heat diffusion portion being electrically connected to the one of the upper-layer wiring and the lower-layer wiring. | 02-11-2010 |
| 20100096723 | Semiconductor device - A semiconductor device includes an electric fuse and first and second large area wirings for applying a voltage to the electric fuse. The electric fuse includes a fuse unit which includes an upper-layer fuse wiring, a lower-layer fuse wiring, and a via connecting the upper-layer fuse wiring and the lower-layer fuse wiring, an upper-layer lead-out wiring which connects the upper-layer fuse wiring and the first large area wiring and has a bent pattern, and a lower-layer lead-out wiring which connects the lower-layer fuse wiring and the second large area wiring and has a bent pattern. | 04-22-2010 |
| 20100096724 | Semiconductor device - A semiconductor device ( | 04-22-2010 |
| 20100133650 | Semiconductor device - A semiconductor device includes an electric fuse formed on a substrate. The electric fuse includes: a first interconnect formed on one end side thereof; a second interconnect formed in a layer different from a layer in which the first interconnect is formed; a first via provided in contact with the first interconnect and the second interconnect to connect those interconnects; a third interconnect formed on another end side thereof, the third interconnect being formed in the same layer in which the first interconnect is formed, as being separated from the first interconnect; and a second via provided in contact with the third interconnect and the second interconnect to connect those interconnects, the second via being lower in resistance than the first via. The electric fuse is disconnected by a flowing-out portion to be formed of a conductive material forming the electric fuse which flows outwardly during disconnection. | 06-03-2010 |
| 20110019494 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - In a method of manufacturing a semiconductor device, element properties of an element property extraction pattern formed on a semiconductor wafer is extracted as element properties of a current control element corresponding to the element property extraction pattern. A supply energy to the current control element is set which is formed between nodes on the semiconductor wafer, based on the extracted element properties. The set supply energy is supplied to the current control element to irreversible control an electrical connection between the nodes through the device breakdown by the current control element. | 01-27-2011 |
| 20110108923 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device has a conventional NMOS transistor and an NMOS transistor functioning as an anti-fuse element and having an n type channel region. The conventional NMOS transistor is equipped with an n type extension region and a p type pocket region, while the anti-fuse element is not equipped with an extension region and a pocket region. This makes it possible to improve the performance of the transistor and at the same time improve the characteristics of the anti-fuse element after breakdown of its gate dielectric film. | 05-12-2011 |
| 20110272778 | Semiconductor device - A semiconductor device includes an electric fuse and first and second large area wirings for applying a voltage to the electric fuse. The electric fuse includes a fuse unit which includes an upper-layer fuse wiring, a lower-layer fuse wiring, and a via connecting the upper-layer fuse wiring and the lower-layer fuse wiring, an upper-layer lead-out wiring which connects the upper-layer fuse wiring and the first large area wiring and has a bent pattern, and a lower-layer lead-out wiring which connects the lower-layer fuse wiring and the second large area wiring and has a bent pattern. | 11-10-2011 |
