| Patent application number | Description | Published |
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| 20080211703 | Digital-to-analog converter circuit, data driver, and display device using the digital-to-analog converter circuit - Disclosed is a data driver including a reference voltage generation circuit that generates and outputs a plurality of reference voltages, a decoder circuit that selects from among the reference voltages n (where n is an integer greater than or equal to two) reference voltages inclusive of reference voltages that may be identical and outputs the n reference voltages from n output terminals thereof, and an amplifying circuit that includes n differential circuits, a feedback resistor, and a resistor. The n output terminals are connected to non-inverting input terminals of the n differential circuits, respectively. The amplifying circuit outputs an output voltage obtained by operating and synthesizing the n reference voltages. One end of the feedback resistor is connected to an output terminal of the amplifying circuit, and the other end is connected to inverting input terminals of the n differential circuits connected in common. The resistor is connected between a voltage supply and the commonly coupled inverting input terminals of the n differential circuits. | 09-04-2008 |
| 20080303700 | Amplifier circuit, digital-to-analog conversion circuit, and display device - Disclosed is a digital-to-analog conversion circuit in which first and second serial DACs and an amplifier circuit for driving a data line are provided. In a first data period, the first serial DAC converts a first digital signal received in the first data period to a first signal, the second serial DAC holds a signal obtained by converting a digital signal received in a data period one period before the first data period, and the amplifier circuit amplifies and outputs the signal held in the second serial DAC, to the data line. In a second data period following after the first data period, the second serial DAC converts the second digital signal received in a second data period, the first serial DAC holds the first signal converted in the first data period, and an amplifier circuit amplifies and outputs the first signal held in the first serial DAC, to the data line. | 12-11-2008 |
| 20090109077 | Digital-to-anolog converter circuit, data driver and display device - Disclosed is a digital-to-analog converter circuit having first to (2×h+1)th reference voltages (where h is a prescribed positive integer) grouped into the following groups: a first reference voltage group comprising h-number of (2×j−1)th (where j is a prescribed positive integer of 1 to h) reference voltages; a second reference voltage group comprising h-number of (2×j)th reference voltages; and a third reference voltage group comprising h-number of (2×j+1)th reference voltages. The digital-to-analog converter circuit includes: a first subdecoder for receiving the first reference voltage group and selecting a reference voltage Vrk based upon an input digital signal; a second subdecoder for receiving the second reference voltage group and selecting a reference voltage Vr(k+1) based upon the input digital signal; a third subdecoder for receiving the third reference voltage group and selecting a reference voltage Vr(k+2) based upon the input digital signal; a fourth subdecoder for receiving the reference voltages Vr, Vr(k+1), and Vr(k+2) that have been selected by respective one of the first to third subdecoders, selecting two of these reference voltages (inclusive of selecting the same voltage redundantly) based upon an input digital signal, and outputting the selected two reference voltages; and an amplifier circuit for receiving the two reference voltages that have been selected by the fourth subdecoder and outputting result of an operation applied to the two reference voltages. | 04-30-2009 |
| 20090160848 | Level shift circuit, and driver and display system using the same - Disclosed is a level shift circuit including a first level shift circuit that is connected between a first power supply terminal and first and second output terminals and receives first and second input signals from the first and second input terminals, respectively, and sets one of the first and second output terminals to a first voltage level, based on the first and second input signals; a second level shift circuit that is connected between a second power supply terminal and the first and second output terminals, and sets the other of the first and second terminals to a second voltage level; and a circuit that performs control to disconnect a current path in the second level shifter between the second power supply terminal and one of the first and second output terminals that is driven to the second voltage level at a time point when the first and second input signals are supplied to the first and second input terminals for a predetermined period including the time point when the first and second input signals are supplied to the first and second input terminals, and to cancel the disconnection of the current path in the second level shifter between the one output terminal and the second power supply terminal after the predetermined period. Output amplitudes at the first and second output terminals are set to be larger than amplitudes of the first and second input signals. | 06-25-2009 |
| 20090184983 | Displaying apparatus, displaying panel driver and displaying panel driving method - A display apparatus includes a display panel; and a display panel driver configured to drive signal lines of the display panel. The display panel driver includes: a color reducing circuit configured to be possible to generate a first color reduction image data from a first input image data by executing an error diffusion process by using a first error value, and to generate a second color reduction image data from the first input image data by executing the error diffusion process by using a second error value which is different from the first error value; and a driving section configured to drive a first pixel positioned on a horizontal line of the display panel in response to the first color reduction image data, and drive a second pixel positioned on the horizontal line and adjacent to a the first pixel in a horizontal direction, in response to the second color reduction image data. | 07-23-2009 |
| 20090195291 | Level shift circuit, and driver and display system using the same - Disclosed is a level shift circuit that includes a first level shifter which is connected between an output terminal and a first power supply terminal that supplies a first voltage and sets the output terminal to a level of the first voltage when an input signal received at an input terminal assumes a first value; a second level shifter which is connected between the output terminal and a second power supply terminal that supplies a second voltage and sets the output terminal to a level of the second voltage when the input signal assumes a complementary value of the first value; and a feedback control unit that performs control of deactivating the first level shifter during a predetermined time interval including a point of time when the input signal is supplied when it is detected that the output terminal immediately before the input signal is received at the input terminal assumes the first voltage level. When the input signal supplied in the predetermined time interval assumes a value that sets the output terminal to the second voltage level, the second level shifter sets the output terminal to the second voltage level with the first level shifter deactivated. | 08-06-2009 |
| 20090213051 | Digital-to-analog converting circuit, data driver and display device - Disclosed is a digital-to-analog converting circuit (DAC) which in accordance with an m-bit digital signal, selects two reference voltages, inclusive of redundant selection of the same reference voltage (inclusive also of reference voltages other than adjacent voltages) out of a plurality of reference voltages and outputs a voltage level that is the result of interpolation from the two reference voltages. The plurality of reference voltages are grouped into first to (3S+1)th reference voltage groups (where S is an integer that is a power of 2). An ith reference voltage group [where i is 1 to (3S+1)] includes [3S×(j−1)+i]th reference voltages (where j=1, 2, . . . h, and h is a prescribed integer). The DAC has a decoder and an interpolation amplifier. The decoder includes first to (3S+1)th subdecoders provided in correspondence with the first to (3S+1)th reference voltage groups for selecting one reference voltage out of the plurality of reference voltages of respective ones of the corresponding reference voltage groups in accordance with values of a first bit group on a higher order side of the input digital signal; and a (3S+1)-input and 2-output subdecoder for selecting two reference voltages, inclusive of redundant selection of the same reference voltage, out of (3S+1) reference voltages selected by the respective first to (3S+1)th subdecoders, in accordance with values of a second bit group on a lower order side of the input digital signal, and outputting the selected two reference voltages. The interpolation amplifier outputs a voltage level obtained by interpolating the two reference voltages with an interpolation ratio 1:1. | 08-27-2009 |
| 20090231319 | Differential amplifier and drive circuit of display device using the same - Disclosed is a differential amplifier of the present invention includes a differential pair differentially receiving a signal, a current source connected between a first voltage supply and the differential pair, for driving the differential pair, a current-to-voltage converter circuit receiving output currents of the differential pair and producing first and second voltage signals, first and second transistors of mutually different conductivity types connected in series between the first voltage supply and a second voltage supply and respectively receiving the first and second voltage signals at control terminals thereof, a third transistor connected between the second voltage supply and an output terminal and receiving the first voltage signal at a control terminal thereof, and a fourth transistor of the same conductivity type as that of the third transistor, the fourth transistor being connected between the output terminal and the first voltage supply and having a control terminal thereof connected to a connecting node between the first and second transistors. | 09-17-2009 |
| 20090244056 | Output amplifier circuit and data driver of display device using the same - Disclosed is an output amplifier circuit including a differential stage, a first output stage that receives outputs of the differential stage, and a second output stage having an output thereof electrically connected to a load. The differential stage receives an input signal at a non-inverting input thereof. In the first connection configuration, an output of the first output stage is electrically disconnected from the output of the second output stage, outputs of the differential stage are electrically disconnected from inputs of the second output stage, and a second input of the differential stage is electrically connected to the output of the first output stage. In the second connection configuration, the output of the first output stage is electrically connected to the output of the second output stage, and the outputs of the differential stage is electrically connected to the inputs of the second output stage. | 10-01-2009 |
| 20090273618 | Digital-to-analog converter circuit, data driver, and display device using the digital-to-analog converter circuit - A data driver having a positive-polarity reference voltage generation circuit, a positive-polarity decoder, a first amplifier that outputs a positive-polarity gray scale voltage, a negative-polarity reference voltage generation circuit that generates a plurality of negative-polarity reference voltages, a negative-polarity decoder that outputs first to nth negative-polarity reference voltages from among the negative-polarity reference voltages, a negative-polarity amplifier that receives the selected first to nth negative-polarity reference voltages and outputs a negative-polarity gray scale voltage, and an output switch circuit that switches and controls whether to directly connect the first output terminal and the second output terminal to first and second data lines, respectively, or to cross-connect the first output terminal and the second output terminal to the second data line and the first data line, respectively, based on a control signal. | 11-05-2009 |
| 20090295767 | Digital-to-analog converting circuit, data driver and display device - Disclosed is a digital-to-analog converter in which a plurality of reference voltages that differ from one another are grouped into first to (S+1)th reference voltage groups. The digital-to-analog converter has a decoder and an amplifying circuit. The decoder includes: first to (S+1)th subdecoders for selecting respective ones of reference voltages corresponding to a value of a first bit group on an upper bit side of an input digital signal from the reference voltages of the first to (S+1)th reference voltage groups; and an (S+1)-input and 2-output type subdecoder for selecting and outputting two reference voltages out of reference voltages selected by the first to (S+1)th subdecoders, in accordance with a value of a second bit group on a lower side of the input digital signal. The amplifying circuit receives the two reference voltages as inputs and outputs a voltage level obtained by interpolation at a prescribed ratio | 12-03-2009 |
| 20100013686 | Sample and hold circuit and digital-to-analog converter circuit - Disclosed is a sample and hold circuit including a differential circuit, an amplifier stage and a sampling voltage supply circuit. The differential circuit includes first and second capacitance elements, electric charge of which is distributed by a first switch, a first MOS transistor having a gate connected via a second switch to one end of the first capacitance element and also connected via a third switch to an output terminal, and having a source connected to a first current source, a second MOS transistor having a gate connected to one end of the second capacitance element and having a source connected to a second current source and also connected via a forth switch to the source of the first MOS transistor, and a load circuit connected between the drains of the first and second MOS transistors and a terminal of a second power supply. The amplifier stage receives an output of the differential circuit and has an output connected to the output terminal. The sampling voltage supply circuit delivers a sampling voltage to the one end of at least one of the first and second capacitance elements. | 01-21-2010 |
| 20100271348 | Semiconductor device and data driver of display apparatus using the same - There is provided a decoder in which a matrix of transistors, a plurality of reference voltage signal lines arranged on a first interconnect layer and extended in a row direction, being separated to one another over the matrix, and a plurality of reference voltage signal lines arranged on a second interconnect layer and extended in the row direction, being separated to one another over the matrix. The reference voltage signal lines on the mutually different layers are respectively connected to impurity diffusion layers of the transistors that are adjacent in the row direction. The reference voltage signal lines on the mutually different layers are respectively connected to the impurity diffusion layers of the transistors that are adjacent in a column direction | 10-28-2010 |
| 20110050746 | LEVEL SHIFT CIRCUIT, AND DRIVER AND DISPLAY DEVICE USING THE SAME - A level shift circuit includes a first circuit connected between a first power supply terminal (PST) and an output terminal (OT) of the level shift circuit to set OT to a first voltage (V | 03-03-2011 |
| 20110080214 | OUTPUT AMPLIFIER CIRCUIT AND DATA DRIVER OF DISPLAY DEVICE USING THE CIRCUIT - An output amplifier includes a differential stage having a reference voltage supplied to a first input, a first output stage that receives an output of the differential stage, a second output stage whose output is connected to a load, a capacitor element having a first end connected to a second input of the differential stage, and connection control circuits that control switching of first and second connection modes. In the first connection mode, there are provided a non-conductive state between output of the differential stage and input of the second output stage, a non-conductive state between output of the first output stage and output of the second output stage, a conductive state between output of the first output stage and the second input of the differential stage, and voltage of a second end of the capacitor element is an input voltage from the input terminal. In the second connection mode, there are provided a conductive state between output of the differential stage and input of the second output stage, a conductive state between output of the first output stage and output of the second output stage; a non-conductive state between output of the first output stage and the second input of the differential stage, a non-conductive state of the second end of the capacitor element from the input terminal, and a conductive state between the output of the first output stage and the second end of the capacitor element. | 04-07-2011 |
