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Hiroshi Ohta

Hiroshi Ohta, Toshima-Ku JP

Patent application numberDescriptionPublished
200903064082-Amino-Bicyclo (3.1.0) Hexane-2,6-Dicarboxylic Ester Derivative - A drug effective for the treatment and prevention of psychiatric disorders such as schizophrenia, anxiety and related ailments thereof, depression, bipolar disorder and epilepsy. The drug antagonizes the action of group II metabotropic glutamate receptors and shows high activity in oral administration12-10-2009
20100267687PHENYLPYRAZOLE DERIVATIVES - The present invention provides a prophylactic or therapeutic agent for dementia, Alzheimer's disease, attention-deficit hyperactivity disorder, schizophrenia, eating disorders, obesity, diabetes, hyperlipidemia, sleep disorders, narcolepsy, sleep apnea syndrome, circadian rhythm disorder, depression, allergic rhinitis or other diseases.10-21-2010
20110065667PHENYLPYRAZOLE DERIVATIVES - The present invention provides a prophylactic or therapeutic agent for dementia, Alzheimer's disease, attention-deficit hyperactivity disorder, schizophrenia, eating disorders, obesity, diabetes, hyperlipidemia, sleep disorders, narcolepsy, sleep apnea syndrome, circadian rhythm disorder, depression, allergic rhinitis or other diseases.03-17-2011
20110065668PHENYLPYRAZOLE DERIVATIVES - The present invention provides a prophylactic or therapeutic agent for dementia, Alzheimer's disease, attention-deficit hyperactivity disorder, schizophrenia, eating disorders, obesity, diabetes, hyperlipidemia, sleep disorders, narcolepsy, sleep apnea syndrome, circadian rhythm disorder, depression, allergic rhinitis or other diseases.03-17-2011

Patent applications by Hiroshi Ohta, Toshima-Ku JP

Hiroshi Ohta, Aichi-Ken JP

Patent application numberDescriptionPublished
20110052957CELL HOLDING DEVICE, ASSEMBLED BATTERY, AND VEHICLE - In a cell holding device, engaging members (03-03-2011

Hiroshi Ohta, Hyogo-Ken JP

Patent application numberDescriptionPublished
20090273031SEMICONDUCTOR DEVICE - A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a major surface of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the major surface of the first semiconductor layer, the third semiconductor layer forming a structure of periodical arrangement with the second semiconductor layer; a fourth semiconductor layer of the second conductivity type provided above the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively provided on a surface of the fourth semiconductor layer; a first main electrode electrically connected to the first semiconductor layer; a second main electrode provided to contact a surface of the fifth semiconductor layer and a surface of the fourth semiconductor layer; and a control electrode provided above the fifth semiconductor layer, the fourth semiconductor layer, and the second semiconductor layer via an insulative film. A portion is provided locally in the third semiconductor layer, the portion depleting at a voltage not more than one third of a voltage at which the second semiconductor layer and the third semiconductor layer completely deplete.11-05-2009
20100096692SEMICONDUCTOR DEVICE - A semiconductor device of the invention includes: a super junction structure of an n-type pillar layer and a p-type pillar layer; a base layer provided on the p-type pillar layer; a source layer selectively provided on a surface of the base layer; a gate insulating film provided on a portion being in contact with the base layer, a portion being in contact with the source layer and a portion being in contact with the n-type pillar layer on a portion of a junction between the n-type pillar layer and the p-type pillar layer; a control electrode provided opposed to the base layer, the source layer and the n-type pillar layer through the gate insulating film; and a source electrode electrically connected to the base layer, the source layer and the n-type layer. The source electrode is contact with the surface of the n-type pillar layer located between the control electrodes to form a Schottky junction.04-22-2010
20100123186POWER SEMICONDUCTOR DEVICE - In a vertical power semiconductor device having the super junction structure both in a device section and a terminal section, an n-type impurity layer is formed on the outer peripheral surface in the super junction structure. This allows an electric field on the outer peripheral surface of the super junction structure region to be reduced. Accordingly, a reliable vertical power semiconductor device of a high withstand voltage can be provided.05-20-2010
20100264489SEMICONDUCTOR DEVICE - A transistor contains a first semiconductor layer of a first conductivity type and a drift layer having a pillar structure in which a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type are alternately disposed in a direction parallel to a surface of the first semiconductor layer. The fourth semiconductor layer of the first conductivity type and the fifth semiconductor layer of the second conductivity type are alternately disposed and parallel to the drift layer. The fifth semiconductor layer has a larger amount of impurities than the fourth semiconductor layer. The sixth semiconductor layer of the first conductivity type and the seventh semiconductor layer of the second conductivity type are alternately disposed and parallel to the fourth and the fifth semiconductor layers. The seventh semiconductor layer has a smaller amount of impurities than the sixth semiconductor layer.10-21-2010
20110018055POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a power semiconductor device includes a first semiconductor layer, and first, second and third semiconductor regions. The first semiconductor layer has a first conductivity type. The first semiconductor regions have a second conductivity type, and are formed with periodicity in a lateral direction in a second semiconductor layer of the first conductivity type. The second semiconductor layer is provided on a major surface of the first semiconductor layer in a device portion with a main current path formed in a vertical direction generally perpendicular to the major surface and in a terminal portion provided around the device portion. The second semiconductor region has the first conductivity type and is a portion of the second semiconductor layer sandwiched between adjacent ones of the first semiconductor regions. The third semiconductor regions have the second conductivity type and are provided below the first semiconductor regions in the terminal portion.01-27-2011

Patent applications by Hiroshi Ohta, Hyogo-Ken JP

Hiroshi Ohta, Shizuoka JP

Patent application numberDescriptionPublished
20090123302SCREW COMPRESSOR - A screw compressor comprising: a low pressure stage compressor body; a high pressure stage compressor body that further compresses a compressed air compressed by the low pressure stage compressor body; pinion gears for example, respectively, provided on, for example, a male rotor of the low pressure stage compressor body and, for example, a male rotor of the high pressure stage compressor body; a motor; a bull gear for example, provided on a rotating shaft of the motor; and an intermediate shaft supported rotatably and provided with a pinion gear, which meshes with the bull gear, and a bull gear, which meshes with the pinion gears. Thereby, it is possible to make the motor relatively low in rotating speed while inhibiting the gears from being increased in diameter, thus enabling achieving reduction in cost.05-14-2009
20100233004Air Compressor of Water Injection Type - In a water injection air compressor including a compressor main body for compressing air, a water-feed line for feeding water to an actuation chamber in the compressor main body, an air release valve for releasing the compressed air from the compressor main body, and a control panel for executing an on-load operation mode in which water is fed into the actuation chamber and an air release valve is closed and a no-load operation mode in which the water is fed into the actuation chamber and the air release valve is opened, wherein the control panel further executes a dry operation mode in which the water is prevented from being fed into the actuation chamber and with the air release valve is opened.09-16-2010
20100303658Water-Cooled Oil-Free Air Compressor - A water-cooled oil-free air compressor which features compactness and ensures improved productivity and maintainability. The compressor is an oil-free screw compressor which includes a low pressure stage compressor body, an intercooler for water-cooling the compressed air discharged from the low pressure stage compressor body, a high pressure stage compressor body for further compressing the compressed air cooled by the intercooler, and an aftercooler for water-cooling the air discharged from the high pressure stage compressor body. The intercooler and aftercooler each have a plurality of units, all of which are almost equal in shape. A cooler header on each or either of the inlet and outlet sides for compressed air is shared by the units of each cooler.12-02-2010

Patent applications by Hiroshi Ohta, Shizuoka JP

Hiroshi Ohta, Himeji-Shi JP

Patent application numberDescriptionPublished
20090236697SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a super junction region that has a first-conductivity-type first semiconductor pillar region and a second-conductivity-type second semiconductor pillar region alternately provided on the semiconductor substrate. The first semiconductor pillar region and the second semiconductor pillar region in a termination region have a lamination form resulting from alternate lamination of the first semiconductor pillar region and the second semiconductor pillar region on the top surface of the semiconductor substrate. The first semiconductor pillar region and/or the second semiconductor pillar region at a corner part of the termination region exhibit an impurity concentration distribution such that a plurality of impurity concentration peaks appear periodically. The first semiconductor pillar region and/or the second semiconductor pillar region at a corner part of the termination region have an impurity amount such that it becomes smaller as being closer to the circumference of the corner part.09-24-2009
20100038712POWER SEMICONDUCTOR DEVICE - A semiconductor device according to an embodiment of the present invention includes a device part and a terminal part. The device includes a first semiconductor layer, and second and third semiconductor layers formed on the first semiconductor layer, and alternately arranged along a direction parallel to a surface of the first semiconductor layer, wherein the device part is provided with a first region and a second region, each of which includes at least one of the second semiconductor layers and at least one of the third semiconductor layers, and with regard to a difference value ΔN (=N02-18-2010
20100102381POWER SEMICONDUCTOR DEVICE - A power semiconductor device according to an embodiment of the present invention includes a first semiconductor layer of a first conductivity type, second semiconductor layers of the first conductivity type and third semiconductor layers of a second conductivity type, which are formed on the first semiconductor layer, have stripe shapes extending in a first horizontal direction, and are alternately arranged along a second horizontal direction orthogonal to the first horizontal direction, a fourth semiconductor layer of the second conductivity type, selectively formed on a surface of one of the third semiconductor layers, a fifth semiconductor layer of the first conductivity type, selectively formed on a surface of the fourth semiconductor layer, and formed into a stripe shape extending in the first horizontal direction without being formed into a stripe shape extending in the second horizontal direction, and a control electrode formed on the second, third, fourth, and fifth semiconductor layers via an insulating layer, and having a plane pattern periodical in the first horizontal direction and the second horizontal direction.04-29-2010
20100187604SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor region of the first conductivity type on the semiconductor substrate, and a plurality of second semiconductor regions of a second conductivity type disposed separately in the first semiconductor region. A difference between a charge quantity expressed by an integral value of a net activated doping concentration in the second semiconductor regions in the surface direction of the semiconductor substrate and a charge quantity expressed by an integral value of a net activated doping concentration in the first semiconductor region in the surface direction of the semiconductor substrate is always a positive quantity and becomes larger from the depth of the first junction plane to a depth of a second junction plane on an opposite side from the first junction plane.07-29-2010
20100230745POWER SEMICONDUCTOR DEVICE - A power semiconductor device according to an embodiment of the present invention includes a first semiconductor layer of a first or second conductivity type, a second semiconductor layer of the first conductivity type formed on the first semiconductor layer, a third semiconductor layer of the second conductivity type selectively formed on a surface of the second semiconductor layer, at least one trench formed in a periphery of the third semiconductor layer on the surface of the second semiconductor layer, a depth of a bottom surface of the at least one trench being deeper than a bottom surface of the third semiconductor layer, and shallower than a top surface of the first semiconductor layer, and some or all of the at least one trench being in contact with a side surface of the third semiconductor layer, at least one insulator buried in the at least one trench, a first main electrode electrically connected to the first semiconductor layer, and a second main electrode electrically connected to the third semiconductor layer.09-16-2010

Hiroshi Ohta, Shinjuku-Ku JP

Patent application numberDescriptionPublished
20090316246PHOTOCHROMIC FILM, PHOTOCHROMIC LENS COMPRISING THE SAME, AND METHOD OF MANUFACTURING PHOTOCHROMIC LENS - The present invention relates to a photochromic film comprising a photochromic dye and a resin component. The photochromic film has a nanoindentation hardness of equal to or greater than 800 nm on at least one of surfaces, surface A, thereof. The present invention further relates to a method of manufacturing a photochromic lens. The method of manufacturing a photochromic lens of the present invention comprises forming a photochromic film having a nanoindentation hardness ranging from 500 to 5000 nm on an outermost surface thereof as well as having a smaller nanoindentation hardness on a surface facing a first mold than that on the outermost surface by coating a photochromic liquid comprising a photochromic dye and a curable component on one surface of the first mold for formation of one of surfaces of a lens and subjecting the photochromic liquid to curing treatment, and a photochromic lens comprising a photochromic film on a lens substrate is obtained by means of the above first mold.12-24-2009

Hiroshi Ohta, Hyogo JP

Patent application numberDescriptionPublished
20090178150Novel Method for Generating Non-Human ES Animals - The present invention provides a method for generating non-human animals by transferring ES cells to three or four tetraploid embryos to produce chimeric embryos and implanting the chimeric embryos to a psudopregnant non-human animal.07-09-2009

Hiroshi Ohta, Fukushima-Ken JP

Patent application numberDescriptionPublished
20090140214Material for negative electrode of non-aqueous electrolyte secondary battery, process for producing the same, negative electrode and battery - A negative electrode material for non-aqueous electrolyte secondary batteries, comprises: a carbon material having a sphericity of at least 0.8, and exhibiting an average (002) interlayer spacing d06-04-2009
20110116964SUPPORT MEMBER FOR HIGH-TEMPERATURE HEAT-TREATED METAL MOLDING OBJECT AND PROCESS FOR PRODUCTION THEREOF - A carbonaceous support member for a high-temperature heat-treated metal molding object, particularly a setter for heat-treatment in powder metallurgy, is formed as a carbon-ceramic composite shaped product having a bulk density of 1.2-1.6 g/ml and including a carbonaceous matrix and 3-20 wt. % of ceramic particles which are uniformly dispersed in the carbonaceous matrix and partly exposed to the surface of the composite. The support member can effectively prevent carburization of a metal molding object supported thereby during the heat-treatment without causing a problem of peeling of coating layer as encountered in a ceramic-coated support member. The support member may be prepared by compression molding of a powdery mixture of a fine carbon precursor and ceramic particles, followed by heating at 1000-2000° C. to carbonize the fine carbon precursor.05-19-2011

Patent applications by Hiroshi Ohta, Fukushima-Ken JP

Hiroshi Ohta, Oyama-Shi JP

Patent application numberDescriptionPublished
20090029190PERPENDICULAR MAGNETIC RECORDING MEDIUM, PRODUCTION PROCESS THEREOF, AND PERPENDICULAR MAGNETIC RECORDING AND REPRODUCING APPARATUS - A process for producing a perpendicular magnetic recording medium comprises forming metallic nuclei or a seed layer on a non-magnetic substrate, and forming a soft magnetic under layer on the metallic nuclei or the seed layer by means of electroless plating. The soft magnetic under layer is formed while an external parallel magnetic field is applied to the non-magnetic substrate, and the substrate is rotated such that the substrate is maintained parallel to the parallel magnetic field.01-29-2009

Hiroshi Ohta, Kanagawa-Ken JP

Patent application numberDescriptionPublished
20080239000NOZZLE PLATE, INK EJECTION HEAD, AND IMAGE FORMING APPARATUS - A nozzle plate includes: a plate substrate in which a nozzle is formed, ink being ejected through an ejection port of the nozzle in the plate substrate; and a p-type doped layer which forms a whole perimeter of an edge portion defining an inner perimeter of the ejection port of the nozzle in the plate substrate.10-02-2008