| Patent application number | Description | Published |
|---|
| 20100097127 | BOOSTER CIRCUIT AND VOLTAGE SUPPLY CIRCUIT - A voltage supply circuit includes a booster circuit and a ripple filter circuit. The ripple filter circuit has a first resistor connected to a first output terminal at one end thereof. The ripple filter circuit also has a first switch circuit connected between the other end of the first resistor and a second output terminal. In addition, the ripple filter circuit has a second switch circuit connected between the first output terminal of the booster circuit and the first switch circuit. | 04-22-2010 |
| 20100097860 | NAND FLASH MEMORY - A NAND flash memory, in a read operation, a p-type semiconductor substrate is set at a ground potential, a bit line is charged to a first voltage, a source line, a n-type well and a p-type well are charged to a second voltage, which lies between a ground potential and a first voltage, and in a block not selected by said row decoder, said drain-side select gate line and said source-side select gate line are charged to a third voltage, which is higher than said ground potential and is equal to or lower than said second voltage. | 04-22-2010 |
| 20100208510 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device comprises: a memory cell array having memory cells disposed at a crossing-point of a plurality of first lines and a plurality of second lines; and a control circuit configured to apply a first voltage to selected one of the first lines, and to apply a second voltage to selected one of the second lines. The control circuit comprises: a first isolation latch circuit configured to set the first lines to a floating state; and a second isolation latch circuit configured to set the second lines to the floating state. During a forming operation, the first and second isolation latch circuits set one of the first lines and one of the second lines to which a defective memory cell is connected to the floating state, the defective memory cell being one of the memory cells that allows a current to flow due to application of a voltage. | 08-19-2010 |
| 20100214820 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device comprises: a memory cell array having memory cells disposed at a crossing-point of a plurality of first lines and a plurality of second lines and a control circuit configured to apply a first voltage to selected one or more of the first lines, and to apply a second voltage having a value smaller than the first voltage to selected one of the second lines, such that a certain potential difference is applied to selected one or more of the memory cells. The control circuit adjusts the second voltage based on a position of the selected one or more of the memory cells within the memory cell array and a number of the selected one or more of the memory cells on which an operation is simultaneously executed, during application of the potential difference to the selected one or more of the memory cells. | 08-26-2010 |
| 20110069533 | RESISTANCE CHANGE MEMORY AND CONTROL METHOD THEREOF - According to one embodiment, a resistance change memory includes a memory cell array in which a plurality of blocks are provided, resistance change storage elements which are provided in blocks and which store data in accordance with a change in resistance state, first and second wirings in the blocks, each of the first and second wirings being connected to each of resistance change storage elements, and a control circuit which controls the state of a selected block targeted for operation and the state of unselected blocks except the selected block among the blocks. The control circuit respectively applies first and second unselect potentials to the first and second wirings in at least one of the unselected blocks during a period in which the selected block is in operation. | 03-24-2011 |
| 20110116300 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to an embodiment comprises a memory cell array including plural mutually crossing first and second lines and memory cells arranged at intersections of the first and second lines, each memory cell containing a variable resistance element and a rectifier element connected in series; and a data write/erase circuit operative to apply a voltage required for data write/erase to the memory cell via the first and second lines. The data write/erase circuit includes a first current limit circuit operative to limit the current flowing in the cathode-side line provided on the cathode side of the rectifier element, of the first and second lines, at the time of data write/erase. | 05-19-2011 |
| 20110140766 | BOOSTER CIRCUIT AND VOLTAGE SUPPLY CIRCUIT - A booster circuit includes a pump circuit having a plurality of charge pump circuits for outputting a boosted voltage to a first output terminal. The booster circuit also includes a clock adjusting circuit that generates, from a first clock signal, a second clock signal for operating the charge pump circuits. A pump controlling circuit outputs the first clock signal for operating the pump circuit. A first comparator outputs a first output signal. A second comparator outputs a second output signal. A third comparator outputs a third output signal. A gradient of the boosted voltage is decreased when the first output signal is output. A frequency of the first clock signal is reduced when the second output signal is output. The third output signal is output when the boosted voltage is higher than a set value of the boosted voltage. | 06-16-2011 |
| 20110149653 | NAND FLASH MEMORY - A NAND flash memory, in a read operation, a p-type semiconductor substrate is set at a ground potential, a bit line is charged to a first voltage, a source line, a n-type well and a p-type well are charged to a second voltage, which lies between a ground potential and a first voltage, and in a block not selected by said row decoder, said drain-side select gate line and said source-side select gate line are charged to a third voltage, which is higher than said ground potential and is equal to or lower than said second voltage. | 06-23-2011 |
