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| 20080252617 | DISPLAY APPARATUS WITH OPTICAL INPUT FUNCTION - In making a contact determination between an object and a display screen, a display apparatus of the present invention is capable of adjusting a region on which to make a contact determination in response to the displayed image in a liquid crystal panel, so that the influence by the displayed image can be suppressed. Moreover, for simplifying the contact determination process, the display apparatus sets solid a region in the picked-up image that is not a target of the contact determination, with a predetermined gradation value. | 10-16-2008 |
| 20080303786 | DISPLAY DEVICE - An object of the present invention is to achieve an advanced input operation without complicating image processing. A display device of the present invention includes a display unit, an optical input unit, and an image processor. The display unit displays an image on a display screen. The optical input unit captures an image of an object approaching the display screen. The image processor detects that the object comes into contact with the display screen on the basis of a captured image captured by the optical input unit, and then performs image processing to obtain the position coordinates of the object. In the display device, the image processor divides the captured image into a plurality of regions, and performs the image processing on each of the divided regions. | 12-11-2008 |
| 20090115760 | Field-Through Compensation Circuit and Display Device - In order to reduce a field-through voltage generated by switching elements, and to decrease a difference between the field-through voltages generated by the respective switching elements arranged on the same scanning line, a negative charge, which is leaked when an input switching element SWa is changed from ON to OFF, is cancelled by using a positive charge discharged by changing a field-through compensation switch from ON to OFF. | 05-07-2009 |
| 20090122024 | Display Device Provided With Optical Input Function - In a display device, an object approaching a display unit is detected by referring to an image picked up by the display unit. An alternating current drive circuit drives an alternating current signal to the display unit, so that a detection circuit detects an amplitude change or a phase shift. Alternatively, a liquid crystal panel is vibrated at a predetermined frequency, so that the strength of the frequency of the vibration sound is detected. This makes it possible to more accurately detect the timing when the object touches the display unit. | 05-14-2009 |
| 20090128477 | Display Device Capable of Measuring an Illuminance and Widening a Dynamic Range of the Measured Illuminance - A capacitor charged beforehand is discharged according to a light surrounding a display unit. A data is decreased similarly to the voltage between the electrodes of the capacitor. A trigger signal is outputted if the data becomes equal to or less than a threshold value. A clock signal whose cycle of changing levels gradually becomes long is generated. A count value is updated at each change of the clock signal's level and the updated count value is outputted. The count value is sampled when the trigger signal is outputted. | 05-21-2009 |
| 20100301342 | INCREASED GRAIN SIZE IN METAL WIRING STRUCTURES THROUGH FLASH TUBE IRRADIATION - A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer. | 12-02-2010 |
| 20100311238 | METHOD OF FORMING COPPER WIRING LAYER - A method of forming a copper wiring layer, which includes forming a pattern of copper seed layer on a substrate, and forming a copper wiring pattern on the pattern of copper seed layer by means of electroless plating. At least one component of semiconductor device selected from the group consisting of the gate electrode, the source electrode, the drain electrode, and a wiring connected with at least one of these electrodes is formed by a method comprising forming a pattern of copper seed layer, and forming a copper wiring pattern on the pattern of copper seed layer by means of electroless plating. | 12-09-2010 |
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| 20090057722 | Semiconductor device - There is provided a semiconductor device formed of a highly integrated high-speed CMOS inverter coupling circuit using SGTs provided on at least two stages. A semiconductor device according to the present invention is formed of a CMOS inverter coupling circuit in which n (n is two or above) CMOS inverters are coupled with each other, each of the n inverters has: a pMOS SGT; an nMOS SGT, an input terminal arranged so as to connect a gate of the pMOS SGT with a gate of the nMOS SGT; an output terminal arranged to connect a drain diffusion layer of the pMOS SGT with a drain diffusion layer of the nMOS SGT in an island-shaped semiconductor lower layer; a pMOS SGT power supply wiring line arranged on a source diffusion layer of the pMOS SGT; and an nMOS SGT power supply wiring line arranged on a source diffusion layer of the NMOS SGT, and an n−1th output terminal is connected with an nth input terminal. | 03-05-2009 |
| 20090065832 | SOLID-STATE IMAGING DEVICE - It is an object of the present invention to provide an image sensor having a high ratio of a surface area of a light receiving element to a surface area of one pixel. The above-described object is achieved by an inventive solid-state imaging device unit comprising solid-state imaging devices arranged on a substrate according to the present invention. The solid-state imaging device comprises a signal line formed on the substrate, an island shaped semiconductor placed over the signal line, and a pixel selection line connected to an upper portion of the island shaped semiconductor. The island shaped semiconductor comprises a first semiconductor layer disposed in a lower portion of the island shaped semiconductor and connected to the signal line, a second semiconductor layer disposed adjacent to an upper side of the first semiconductor layer, a gate connected to the second semiconductor layer via an insulating film, an electric charge accumulator comprising a third semiconductor layer connected to the second semiconductor layer and carrying a quantity of electric charges which varies in response to a light reception, and a fourth semiconductor layer disposed adjacent to an upper side of the second semiconductor layer and the third semiconductor layer and connected to the pixel selection line. The solid-state imaging devices are arranged on the substrate in a honeycomb configuration. | 03-12-2009 |
| 20090129171 | Nonvolatile semiconductor memory and method of driving the same - It is an object of the present invention to provide a nonvolatile semiconductor memory including memory cells using side walls of island semiconductor layers which avoid lowing of the writing speed and the reading speed. In the nonvolatile semiconductor memory having the nonvolatile semiconductor memory cells each having an island semiconductor layer formed on a semiconductor substrate, the island semiconductor layer having a drain diffusing layer formed on top thereof, a source diffusion layer formed on the lower side thereof, a charge-storage layer formed on a channel area on the side wall interposed between the drain diffusion layer and the source diffusion layer via a gate insulation film, and a control gate formed on the charge-storage layer arranged in matrix, bit lines connected to the drain diffusion layers are arranged in the column direction, control gate lines are arranged in the row direction, and source lines connected to the source diffusion layers are arranged in the column direction, the above-described object is achieved by the nonvolatile semiconductor memory characterized in that common source lines connected to the source lines are formed at every predetermined number of control gate lines, the common source lines are formed of metal, and the common source lines are arranged in the row direction. | 05-21-2009 |
| 20090161441 | Nonvolatile semiconductor memory and method for driving the same - To provide a NOR-type nonvolatile semiconductor memory that can inject electric charge into a charge accumulation layer through the use of an FN tunnel current without compromising an increase in the packing density of memory cells. The above problem is solved by a nonvolatile semiconductor memory in which nonvolatile semiconductor memory cells are arranged in a matrix, each nonvolatile semiconductor memory cell having an island semiconductor layer in which a drain diffusion layer formed in the upper part of the island semiconductor layer, a source diffusion layer formed in the lower part of the island semiconductor layer, a charge accumulation layer formed on a channel region of the side wall sandwiched between the drain diffusion layer and the source diffusion layer via a gate insulation film, and a control gate formed on the charge accumulation layer are formed. Further, bit lines connected to the drain diffusion layer are laid out in a column direction, control gate lines are laid out in a row direction, and source lines connected to the source diffusion layer are laid out in the column direction. | 06-25-2009 |
| 20090283804 | SOLID-STATE IMAGE SENSOR, SOLID-STATE IMAGE SENSING DEVICE, AND METHOD OF PRODUCING THE SAME - It is an object to provide a CCD solid-state image sensor, in which an area of a read channel is reduced and a rate of a surface area of a light receiving portion (photodiode) to an area of one pixel is increased. There is provided a solid-state image sensor, including: a first conductive type semiconductor layer; a first conductive type pillar-shaped semiconductor layer formed on the first conductive type semiconductor layer; a second conductive type photoelectric conversion region formed on the top of the first conductive type pillar-shaped semiconductor layer, an electric charge amount of the photoelectric conversion region being changed by light; and a high-concentrated impurity region of the first conductive type formed on a surface of the second conductive type photoelectric conversion region, the impurity region being spaced apart from a top end of the first conductive type pillar-shaped semiconductor layer by a predetermined distance, wherein a transfer electrode is formed on the side of the first conductive type pillar-shaped semiconductor layer via a gate insulating film, a second conductive type CCD channel region is formed below the transfer electrode, and a read channel is formed in a region between the second conductive type photoelectric conversion region and the second conductive type CCD channel region. | 11-19-2009 |
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| 20080206941 | Method for manufacturing sic semiconductor device - A method for manufacturing a SiC semiconductor device includes: preparing a SiC substrate having a (11-20)-orientation surface; forming a drift layer on the substrate; forming a base region in the drift layer; forming a first conductivity type region in the base region; forming a channel region on the base region to couple between the drift layer and the first conductivity type region; forming a gate insulating film on the channel region; forming a gate electrode on the gate insulating film; forming a first electrode to electrically connect to the first conductivity type region; and forming a second electrode on a backside of the substrate. The device controls current between the first and second electrodes by controlling the channel region. The forming the base region includes epitaxially forming a lower part of the base region on the drift layer. | 08-28-2008 |
| 20080315211 | SIC semiconductor device with BPSG insulation film and method for manufacturing the same - A SiC device includes: a substrate; a drift layer; a base region; a source region; a channel layer connecting the drift layer and the source region; a gate oxide film on the channel layer and the source region; a gate electrode on the gate oxide film; an interlayer insulation film with a contact hole having a barrier layer and a BPSG insulation film on the gate electrode; a source electrode having upper and lower wiring electrodes on the interlayer insulation film and in the contact hole for connecting the base region and the source region; and a drain electrode on the substrate. The barrier layer prevents a Ni component in the lower wiring electrode from being diffused into the BPSG insulation film. | 12-25-2008 |
| 20080318400 | Method for manufacturing SIC semiconductor device - A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed a carbon layer; annealing the SiC layer to activate the impurity; and removing the carbon layer. The annealing the SiC layer includes: increasing a temperature of the SiC layer from a second temperature to a first temperature within a first time duration; and decreasing the temperature of the SiC layer from the first temperature to the second temperature within a second time duration. The first temperature is equal to or higher than 1800° C., and the second temperature is lower than 1800° C. The first and second time durations are small. | 12-25-2008 |
| 20080318438 | Method for manufacturing sic semiconductor device - A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed to a carbon layer; annealing the SiC layer to activate the impurity with covering the SiC layer with the carbon layer; removing the carbon layer; and performing a sacrifice oxidation process. The performing the sacrifice oxidation process includes: forming a sacrifice oxide film; and removing the sacrifice oxide film. The forming the oxide film is performed after the performing the sacrifice oxidation process. | 12-25-2008 |
| 20090127624 | Semiconductor device having soi substrate and method for manufacturing the same - A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region. | 05-21-2009 |
