Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Hirofuji
Hajimu Hirofuji, Ibaraki-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20110021452 | LYOPHILIZED PREPARATION OF STABILIZED ANTHRACYCLINE COMPOUNDS - The present invention provides a lyophilized preparation of amrubicin, which contains L-cysteine or a salt thereof and has a water content of 0 to about 4% by weight within the preparation, and is stable even in a long-term storage, and further provides a method for production of said preparation. Said preparation is useful as a chemotherapeutic agent for cancers. | 01-27-2011 |
Hajimu Hirofuji, Niihama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20120077768 | STABILIZED AND LYOPHILIZED FORMULATION OF ANTHRACYCLINE COMPOUNDS - The present invention provides a lyophilized amrubicin formulation and a process thereof. In the process, the concentration of the aqueous solution before lyophilization is controlled to about 7.5 mg(potency)/mL or more. Thus, the formulation decreases the production of desaccharified compound and is stable to storage for a long period. The formulation is useful as a cancer chemotherapeutic agent. | 03-29-2012 |
Masanori Hirofuji, Osaka JP
| Patent application number | Description | Published |
|---|---|---|
| 20090001364 | Semiconductor Device - Plural I/O cells ( | 01-01-2009 |
| 20090146273 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device adopting, as a layout of pads connected to an external package on an LSI, a zigzag pad layout in which the pads are arranged shifted alternately, which can avoid occurrences of short-circuiting of wires, an increase in chip size due to avoidance of short-circuiting, propagation of power supply or GND noise due to reduction in IO cell interval, and signal transmission delay difference due to displacement of pad positions. | 06-11-2009 |
| 20110012245 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device adopting, as a layout of pads connected to an external package on an LSI, a zigzag pad layout in which the pads are arranged shifted alternately, which can avoid occurrences of short-circuiting of wires, an increase in chip size due to avoidance of short-circuiting, propagation of power supply or GND noise due to reduction in IO cell interval, and signal transmission delay difference due to displacement of pad positions. In a semiconductor device wherein plural pads on a semiconductor element which are connected to function terminals on an external package are arranged in two lines along the periphery of the semiconductor element, an arrangement order of the plural pads on the semiconductor element is different from an arrangement order of the function terminals on the external package. | 01-20-2011 |
Yuichi Hirofuji, Osaka JP
| Patent application number | Description | Published |
|---|---|---|
| 20100289608 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate including at least one of a circuit and a circuit element, and an inductor element having a coil axis extending in a direction parallel to a main surface of the semiconductor substrate and disposed adjacent to the main surface. A main direction of a magnetic field induced by passing a current through the inductor element is parallel to the main surface. | 11-18-2010 |
| 20120037960 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode. | 02-16-2012 |
