| Patent application number | Description | Published |
|---|
| 20080251385 | PLATING APPARATUS - A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion | 10-16-2008 |
| 20080256550 | Parallel processing system by OS for single processor - The present invention relates to a parallel processing system by an OS for single processor capable of operating an OS for single processor and an existing application on a multiprocessor and achieving parallel processing by a multiprocessor with respect to the application, wherein the multiprocessor are logically divided into two groups, i.e., a first processor side and a second processor side, and units of work that are parallelizable within the application operating on the processors on the first processor side are controlled as new units of work on the processors on the second processor side. | 10-16-2008 |
| 20080296165 | PLATING APPARATUS - A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion | 12-04-2008 |
| 20080318417 | METHOD OF FORMING RUTHENIUM FILM FOR METAL WIRING STRUCTURE - A method of depositing a ruthenium(Ru) thin film on a substrate in a reaction chamber, includes: (i) supplying a gas of a ruthenium precursor into the reaction chamber so that the gas of the ruthenium precursor is adsorbed onto the substrate, wherein the ruthenium precursor a ruthenium complex contains a non-cyclic dienyl; (ii) supplying an excited reducing gas into the reaction chamber to activate the ruthenium precursor adsorbed onto the substrate; and (iii) repeating steps (i) and (ii), thereby forming a ruthenium thin film on the substrate. | 12-25-2008 |
| 20090119541 | Information Processing Device, Recovery Device, Program and Recovery Method - The information processing device which recovers a domain developing a fault caused by added application and device driver while maintaining security and reliability includes a plurality of processors, wherein the plurality of processors form a plurality of domains according to processing contents to be executed, and the processors in different domains communicate with each other through a communication unit, and which further includes a recovery unit for executing, for a domain developing a fault, failure recovery processing based on a failure recovery request notified by the domain and a recovery condition set in advance for each domain. | 05-07-2009 |
| 20090240980 | INFORMATION PROCESSING DEVICE AND FAILURE CONCEALING METHOD THEREFOR - An information processing device comprises a plurality of processing units on which OSs and execution environments operate, and shared peripheral devices shared by the plurality of processing units. The information processing device is provided with a failure concealing device for concealing a failure which has occurred in a processing unit. The failure concealing device determines a substitutional processing unit that will act as a substitute for a failed processing unit so that the OS and execution environment which have operated on the failed processing unit will operate on the substitutional processing unit, switches the OS and execution environment which have operated on the failed processing unit so that they will operate on the substitutional processing unit, and switches a shared resource used by the failed processing unit such that it is available to the substitutional processing unit. | 09-24-2009 |
| 20090247142 | INFORMATION COMMUNICATION PROCESSING DEVICE, INFORMATION COMMUNICATION TERMINAL, INFORMATION COMMUNICATION SYSTEM, FUNCTION SWITCHING METHOD AND FUNCTION SWITCHING PROGRAM - Provided is the information communication processing device capable of executing terminal function switching control in linkage with an external communication content on one information communication processing device based on the external communication content without a problem in switching. The information communication processing device has at least one information processing device having a plurality of function environments for executing an application, and a switching control unit for switching a function environment, in which the switching control unit determines a function environment to be switched based on contents of communication with the outside of the information communication processing device and sets context of the function environment to be switched at context of a function environment being executed, thereby executing switching to the function environment to be switched. | 10-01-2009 |
| 20100070802 | SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD THEREFOR - A semiconductor integrated circuit comprises a plurality of cores ( | 03-18-2010 |
| 20100077259 | APPARATUS AND METHOD FOR PERFORMING A SCREENING TEST OF SEMICONDUCTOR INTEGRATED CIRCUITS - An apparatus for performing a screening test of a semiconductor integrated circuit is disclosed, the semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, and the processors being programmatically operable. The apparatus for performing a screening test of a semiconductor integrated circuit comprises: an instruction/data signal synchronization circuit for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and a trace comparison circuit for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information. | 03-25-2010 |
| 20100100706 | MULTIPLE PROCESSOR SYSTEM, SYSTEM STRUCTURING METHOD IN MULTIPLE PROCESSOR SYSTEM AND PROGRAM THEREOF - For flexibly setting up an execution environment according to contents of processing to be executed while taking stability or a security level into consideration, the multiple processor system includes the execution environment main control unit | 04-22-2010 |
| 20100100886 | TASK GROUP ALLOCATING METHOD, TASK GROUP ALLOCATING DEVICE, TASK GROUP ALLOCATING PROGRAM, PROCESSOR AND COMPUTER - Even if a multiprocessor includes an uneven performance core, an inoperative core or a core that does not satisfy such a performance as designed but if the contrivance of task allocation can satisfy the requirement of an application to be executed, the multiple processors are shipped. In a task group allocation method for allocating, to a processor having a plurality of cores, task groups included in an application for the processor to execute, a calculation section measures performances and disposition patterns of the cores, generates a restricting condition associating the measured performances and disposition patterns of the cores with information indicating whether the application can be executed, and, with reference to the restricting condition, reallocates to the cores, the task groups that have previously been allocated to the cores. | 04-22-2010 |
| 20100153784 | SEMICONDUCTOR INTEGRATED CIRCUITS AND METHOD OF DETECTING FAULTS OF PROCESSORS - A semiconductor integrated circuit comprising a processor having an output signal of instruction log information and being operable in a program in memory is disclosed. The semiconductor integrated circuit comprises trace determination circuit for comparing an instruction code that corresponds to the instruction log information from a processor with an instruction code that is read from the memory to detect faults. | 06-17-2010 |
| 20100172366 | SEMICONDUCTOR INTEGRATED CIRCUIT AND FILTER CONTROL METHOD - A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. The adaptors keep delivery information indicating a delivery condition of a request signal received from the cores and control delivery of the request signal received from the cores in accordance with the delivery information. | 07-08-2010 |
| 20100183015 | SEMICONDUCTOR INTEGRATED CIRCUIT AND FILTER CONTROL METHOD - A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. Transmission side adaptors store first delivery information, and control delivery of the request signal to be received from the first core in accordance with the first delivery information. Reception side adaptors store second delivery information, and control delivery of the request signal to be received through the interconnecting network to the second core in accordance with the second delivery information. The first delivery information and the second delivery information are hierarchically set. | 07-22-2010 |
| 20100199052 | INFORMATION PROCESSING APPARATUS, EXECUTION ENVIRONMENT TRANSFERRING METHOD AND PROGRAM THEREOF - Provided is an information processing device which enables transfer of an execution environment in a short time period without degrading basic performance of an execution environment and without requiring a large amount of memory. | 08-05-2010 |
