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Hioka

Eiichi Hioka, Aichi-Ken JP

Patent application numberDescriptionPublished
20100106355CONTROL UNIT AND CONTROL METHOD FOR VARIABLE VALVE TIMING MECHANISM, PROGRAM FOR IMPLEMENTING THE CONTROL METHOD, AND RECORDING MEDIUM ON WHICH THE PROGRAM IS RECORDED - An ECU executes a program based on which, when a fuel-supply cutoff control is executed or when a hybrid vehicle travels in a second mode in which the engine is stopped and the hybrid vehicle travels using only the drive power generated by a second MG an intake VVT mechanism is controlled so that a valve phase is brought to the mechanically determined most retarded phase. The phase, which is detected by a cam position sensor, is learned as the most retarded phase.04-29-2010

Eiichi Hioka, Toyota-Shi JP

Patent application numberDescriptionPublished
20100270963MALFUNCTION DETERMINATION DEVICE FOR MOTOR CONTROL SYSTEM - A malfunction determination device for a motor control system, outputs a position signal that indicates a moved position of a movable member of a motor and a direction signal that indicates a movement direction of the movable member. The malfunction determination device determines a malfunction has occurred if a relationship between the position signal and the direction signal differs from that when the motor control system is operating normally. The malfunction determination device outputs a pulse signal that varies periodically along with variations in the moved position of the movable member as the position signal; outputs a periodic pulse signal in the same phase with the position signal as the direction signal if the movable member is moving in one direction; and outputs a periodic pulse signal in an opposite phase to the position signal as the direction signal if the movable member is moving in the other direction.10-28-2010

Katsuya Hioka, Tokyo JP

Patent application numberDescriptionPublished
20110241674Sample Tube and Measurement Method for Solid-State NMR - A solid-state NMR sample tube and method of using same which can be spun stably and at high speed while suppressing its bending resonance. A solid sample to be investigated by solid-state NMR spectroscopy can be sealed in the sample tube. The sample tube includes a hollow cylinder having opposite ends. At least one of the ends is open. The sample tube has a length L, an outside diameter D, and an inside diameter d which satisfy a given relationship disclosed herein.10-06-2011

Takaaki Hioka, Chiba-Shi JP

Patent application numberDescriptionPublished
20120001279Hall sensor - Provided is a highly-sensitive Hall element capable of eliminating an offset voltage without increasing the chip size. At the four vertices of a square Hall sensing portion, Hall voltage output terminals and control current input terminals are respectively arranged independently from each other. The Hall voltage output terminals all have the same shape. The control current input terminals are arranged on both sides of the Hall voltage output terminals, respectively, to be spaced apart from the Hall voltage output terminals so as to prevent electrical connection to the Hall voltage output terminals, and have the same shape at the four vertices.01-05-2012
20120001280Hall sensor - Provided is a highly-sensitive Hall element capable of eliminating an offset voltage without increasing the chip size. The Hall element includes: a Hall sensing portion having a shape of a cross and four convex portions; Hall voltage output terminals which are arranged at the centers of the front edges of the four convex portions, respectively; and control current input terminals which are arranged on side surfaces of each of the convex portions independently of the Hall voltage output terminals. In this case, the Hall voltage output terminal has a small width and the control current input terminal has a large width.01-05-2012

Takehiko Hioka, Ritto-Shi JP

Patent application numberDescriptionPublished
20090024230PROGRAM DEVELOPMENT SUPPORT APPARATUS OF SAFETY CONTROLLER - The arrangement of the function block to the programming field is performed according to the guide by a function block arrangement template in which block arrangeable positions are defined vertically and horizontally and in which one end side in a row direction is defined as an input terminal side and the other end side is defined as an output terminal side; and the template is separated into an input side template positioned on an input side and including a series of plural columns respectively accepting the arrangement of a predetermined type of function block related to an input signal, and an output side template positioned on an output side and including a series of plural columns respectively accepting the arrangement of a predetermined type of function block related to an output signal.01-22-2009
20090171472SAFETY MASTER - A safety master configured to communicate with a plurality of safety slaves over a safety field network or with a plurality of safety local I/O units connected by a safety back plane bus of the safety master, wherein each of the plurality of safety slaves and safety local I/O units allow connection to safety I/O devices in a plurality of cell equipment, and wherein the safety master receives a status signal indicating a “safe state” or an “unsafe state” related to cell equipment from each of the corresponding plurality of safety slaves or safety local I/O units, and controls operation/stop of cell equipment by executing an interlock operation program with the received status signal as an input to output an operation instruction signal.07-02-2009

Takeshi Hioka, Yokohama-Shi JP

Patent application numberDescriptionPublished
20110234306BOOSTER CIRCUIT - In a booster, a first transistor of a second conduction-type is formed on a first conduction-type substrate and connected to between a voltage-source and an output so that the first transistor functions as a diode. A first capacitor is connected to a first node of the first transistor on a voltage-source side, and transmits a first clock to the first node. A second transistor of the first conduction-type is connected to a second node of the first transistor on an output side to receive the first clock. A second capacitor is connected to the second node and transmits a second clock having an opposite phase of the first clock to the second node. The first transistor transfers the first node's voltage stepped up by the first clock to the second node. The second transistor transfers the second node's voltage stepped up by the second clock to an output side.09-29-2011

Takeshi Hioka, Kawasaki-Shi JP

Patent application numberDescriptionPublished
20100237933CURRENT SUPPLY CIRCUIT - A current supply circuit according to an embodiment of the present invention includes an operational amplifier having first and second input terminals and an output terminal, a transistor having a control terminal connected to the output terminal of the operational amplifier, and having first and second main terminals, a first resistance arranged between the first input terminal of the operational amplifier and the first main terminal of the transistor, a second resistance arranged between a predetermined node and a ground line, the predetermined node being between the first input terminal of the operational amplifier and the first resistance, first to Nth transistors, each of which has a control terminal connected to the control terminal or the second main terminal of the transistor, and has a main terminal outputting a current, where N is an integer of two or larger, and first to Nth switching transistors, each of which has a main terminal, the main terminals of the first to Nth switching transistors being respectively connected to the main terminals of the first to Nth transistors, a pulse width of a signal provided to a control terminal of the respective first to Nth switching transistors being set to be constant regardless of a pulse frequency of the signal.09-23-2010