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Hinkle, US
Chad Hinkle, Kettering, OH US
| Patent application number | Description | Published |
|---|---|---|
| 20080205692 | Method and Kit for Determining Consumer Preferences - A method and kit for determining consumer preferences and desires for a product line or service, utilizing images which symbolize archetypes and/or represent emotional drivers of human behavior. Images are used to determine consumer preferences for product lines or services by examining Respondents' psychological framework to reveal the “must have” emotional components for a product or service. Since the Respondent typically is not able to explain exactly what their preferences are as consumers, the use of the present invention provides symbology to allow them to reveal their inarticulable preferences for a product or service. | 08-28-2008 |
| 20110213640 | METHOD AND KIT FOR DETERMINING CONSUMER PREFERENCES - A method and kit for determining consumer preferences and desires for a product line or service, utilizing images which symbolize archetypes and/or represent emotional drivers of human behavior. Images are used to determine consumer preferences for product lines or services by examining Respondents' psychological framework to reveal the “must have” emotional components for a product or service. Since the Respondent typically is not able to explain exactly what their preferences are as consumers, the use of the present invention provides symbology to allow them to reveal their inarticulable preferences for a product or service. | 09-01-2011 |
Chad Hinkle, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110191760 | METHOD AND APPARATUS FOR ENHANCING COMPREHENSION OF CODE TIME COMPLEXITY AND FLOW - A method and apparatus that utilizes techniques for formatting assembly and/or machine code, including using arrows, indentations and textual symbols, so that a programmer who reads the code has an enhanced understanding of the program flow. Different methods of assessing computing time complexity (e.g., the up branch method and the strongly connected subgraph method) have strengths and weaknesses but benefit from being used together. | 08-04-2011 |
David A. Hinkle, Knoxville, TN US
| Patent application number | Description | Published |
|---|---|---|
| 20090309738 | Animal Deterrent Mat - An animal deterrent mat with animal detection capability. The animal deterrent mat produces a detection pulse that is attenuated when an object makes contact with the animal deterrent mat. The animal deterrent mat monitors the amplitude of the detection pulse and compares the measured detection pulse amplitude to one or more threshold values. When the amplitude of the detection pulse is below an upper threshold corresponding to the attenuated signal caused by an animal making contact with the animal deterrent mat and, optionally, above lower threshold corresponding to the attenuated signal caused by another object making contact with the animal deterrent mat, such as a human, a deterrent pulse selected to deter the animal from crossing or remaining on the animal deterrent mat is generated. When the amplitude of the detection pulse is below the optional lower threshold, no deterrent stimulus is generated. | 12-17-2009 |
Donald George Hinkle, Merlin, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20110067335 | Deck track - Deck Track (new invention) consisting of a steel self fastening, concealed track system. Manufactured of various environmental resistant coatings. Comprising a series of formed recievers and fasteners spaced equally to receive 5.5″inch composite deckboards with pre-formed slots (grooved) on two sides. The new invention (Deck Track) will allow patios, walkways and marine decking materials to be installed without use of nails, screws, or individual fasteners (prior art). The installation time of deckboards being reduced by upwards of 50% from any existing (prior art) concealed fastening systems. The integrated fasteners and recievers of the steel self fastening system (new invention) maintains appropriate gaps between composite deckboards after fasteners are secured, for the life of the deck. | 03-24-2011 |
Hal Hinkle, Geyserville, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120109812 | System and Method for Use in Auditing Financial Transactions - A data processing system that records detailed market information for one or more financial markets to facilitate the audit of executed trades for time, quantity, and price as being reasonable. The system receives and records data from financial markets, including the date and time trades are executed and the prices at which the financial instruments traded. The system provides users the ability to compare a particular transaction for a financial instrument to transaction data for the same and/or related financial instruments at around the same time, to determine whether the price paid for the financial instrument is reasonable for the time the trade was executed. A trade confirmation service is also provided to permit traders to verify the parameters of executed transactions. | 05-03-2012 |
James Hinkle, Toledo, OH US
| Patent application number | Description | Published |
|---|---|---|
| 20120000247 | HIGH-TEMPERATURE ACTIVATION PROCESS - A method for processing a coated glass substrate may include a high-temperature activation process. | 01-05-2012 |
James Hinkle, Lambertville, MI US
| Patent application number | Description | Published |
|---|---|---|
| 20120032694 | IN-PROCESS ELECTRICAL CONNECTOR - Characteristics of partially assembled photovoltaic modules can be determined using electrical connection apparatuses and methods. | 02-09-2012 |
James Ernest Hinkle, Lambertville, MI US
| Patent application number | Description | Published |
|---|---|---|
| 20090214784 | Transport Device, In Particular for Transporting Sheet-Like Substrates Through a Coating Installation - The transporting device according to the invention, in particular for transporting sheet-like substrates through a coating installation, comprises transporting rollers which are rotatably mounted on both sides and horizontally arranged transversely in relation to the transporting direction, the uppermost surface lines of the transporting rollers defining the transporting plane, and is characterized in that the end parts of the transporting rollers have a smaller diameter than the middle part of the transporting rollers and in that baffles which are mounted displaceably in the axial direction of the transporting rollers between a first position and a second position are arranged between the end parts of the transporting rollers and the transporting plane. The fact that the baffles are mounted in an axially displaceable manner has the effect of considerably extending the cleaning intervals of the transporting device. At first the baffles are arranged in a first position, in which the end of the baffle lies underneath the substrate and, in the horizontal direction, as close as possible to the middle of the transporting roller Vapour-depositing material that gets beyond the edge of the substrate hits the baffle. During operation of the transporting device, the baffles are continuously displaced from the middle part to the ends of the transporting rollers. As a result, the increase in thickness of the layer produced on the baffles is limited, since the vapour keeps hitting new portions of the baffle. | 08-27-2009 |
Jason Hinkle, Superior, CO US
| Patent application number | Description | Published |
|---|---|---|
| 20080283670 | K-truss deployable boom system - An outer space deployable boom system is formed of a plurality of interconnected longeron members that are linked by diagonal members and batten frames. The diagonal members are arranged in a unique K-type configuration that provides a predictable and orderly folding dynamic as the boom system transitions from a stowed state to a deployed state. | 11-20-2008 |
Jonathan R. Hinkle, Raleigh, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20080301352 | BUS ARCHITECTURE - A system and method for implementing a bus. In one embodiment, the system includes a bus switch operative to couple to a bus, and a plurality of trace segments coupled to the bus switch, where the trace segments have different lengths. The bus switch is operative to connect one of the trace segments to the bus based on at least one system requirement, and the selected trace segment cancels signal reflections on the bus. | 12-04-2008 |
| 20090164672 | Computer Memory Subsystem For Enhancing Signal Quality - Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal. | 06-25-2009 |
| 20100008034 | TUBULAR MEMORY MODULE - Memory systems and methods of forming memory modules. In one embodiment, a computer memory system includes a substantially tubular frame with an elongate card edge extending along the frame. A flexible circuit comprising a flexible substrate, a plurality of memory chips affixed to the flexible substrate, and a plurality of electrical terminals interconnected with the memory chips, is secured along a perimeter of the tubular frame with the electrical terminals arranged along the card edge. | 01-14-2010 |
| 20100124035 | Integrating Capacitors Into Vias Of Printed Circuit Boards - A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates. | 05-20-2010 |
| 20110104913 | Edge card connector having solder balls and related methods - An edge card connector includes: a substantially rigid, insulating housing having internal electrical contacts to engage the edge of a first circuit board inserted into the housing; solder balls arranged on an outer surface of the housing in a selected pattern to establish connections to corresponding conductive pads on a second circuit board when the solder balls are at least partially melted; and, electrical connections between the internal electrical contacts and the solder balls. The socket may contain additional features for added strength, ease of assembly, and other purposes. The system is assembled by placing the socket onto a circuit board, aligning the solder balls with respective contact pads, and fusing the solder balls to establish electrical connectivity. A standoff structure may be provided to avoid excessive compaction of the solder balls. | 05-05-2011 |
| 20110153903 | METHOD AND APPARATUS FOR SUPPORTING STORAGE MODULES IN STANDARD MEMORY AND/OR HYBRID MEMORY BUS ARCHITECTURES - A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus. | 06-23-2011 |
| 20120059967 | MEMORY BUS ARCHITECTURE FOR CONCURRENTLY SUPPORTING VOLATILE AND NON-VOLATILE MEMORY MODULES - A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus. | 03-08-2012 |
| 20120059970 | MEMORY CONTROLLER SUPPORTING CONCURRENT VOLATILE AND NONVOLATILE MEMORY MODULES IN A MEMORY BUS ARCHITECTURE - A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus. | 03-08-2012 |
Jonathan R. Hinkle, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100008175 | BATTERY-LESS CACHE MEMORY MODULE WITH INTEGRATED BACKUP - A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level. | 01-14-2010 |
Jonathan Randall Hinkle, Raleigh, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20090088008 | METHOD FOR HORIZONTAL INSTALLATION OF LGA SOCKETED CHIPS - Method and apparatus for installing a processor into electronic communication with a socket. The land grid array socket connector includes a socket housing secured to a circuit board and an array of upwardly extending pins for electronic communication with contact pads on the processor. The socket connector provides a carriage configured to receiving the processor through a lateral opening and support a perimeter edge of the processor. A mechanical linkage couples the carriage and the socket housing for substantially vertically translating the processor relative to the socket. A plurality of alignment features upwardly extends from the socket housing along the perimeter of the array of pins. Each of the alignment features has an inwardly-facing tapered surface for registering the edge of the processor and biasing the processor into a position where the array of contact pads are aligned with the array of pins as the processor is lowered. | 04-02-2009 |
| 20100030942 | ENCODED CHIP SELECT FOR SUPPORTING MORE MEMORY RANKS - Method and systems are disclosed for increasing the number of ranks supported in a memory system. In one embodiment, a plurality of predefined subsets of memory chips on a memory module is selected. A chip select signal uniquely identifying the selected subset of memory chips is generated. The chip select signal is encoded as a multi-bit word having a bit width that is less than the number of predefined subsets of memory chips. Each bit of the encoded chip select signal is transmitted along a separate chip select line. The transmitted chip select signal is decoded to determine the identity of the selected subset of memory chips. The selected subset of memory chips identified by the decoded chip select signal are read or written. | 02-04-2010 |
Kevin Hinkle, King Of Prussia, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20100105712 | CHEMICAL COMPOUNDS - Pyrimidine derivatives, which are useful as VEGFR2 inhibitors are described herein. The described invention also includes methods of making such pyrimidine derivatives as well as methods of using the same in the treatment of hyperproliferative diseases. | 04-29-2010 |
Kurt Warren Hinkle, Queen Creek, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20090127903 | SAFETY SEAT - A chair includes a chair base and seat frame extending upwardly from the chair base. The chair includes an interlock assembly, and an infant chair repeatably moveable between stowed and deployed positions with the chair base. The interlock assembly restricts and allows the ability of the infant chair to move between the stowed and deployed positions. The interlock assembly restricts the ability of the chair base to rotate in response to the infant chair being in the deployed position. | 05-21-2009 |
| 20120019032 | SAFETY SEAT - A chair includes a chair base and seat frame extending upwardly from the chair base. The chair includes an interlock assembly, and an infant chair repeatably moveable between stowed and deployed positions with the chair base. The interlock assembly restricts and allows the ability of the infant chair to move between the stowed and deployed positions. The interlock assembly restricts the ability of the chair base to rotate in response to the infant chair being in the deployed position. | 01-26-2012 |
Lee Hinkle, Houston, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20110271106 | Communication Channel of a Device - A method including transferring a device ID through a first communication channel between a device and a transaction device, configuring the device to send secured information in response to receiving a transaction request and sending user information to a service provider through a second communication channel in response to receiving a request to authenticate the secured information. | 11-03-2011 |
Rebecca Hinkle, Oklahoma City, OK US
| Patent application number | Description | Published |
|---|---|---|
| 20100189527 | METHOD AND APPARATUS FOR RESTRAINING CARGO ITEMS ON AN AIRCRAFT - A method and apparatus for restraining cargo items on an aircraft is disclosed. The apparatus may include a base that attaches to the cargo item, a lever coupled to the base, and a foot coupled to the lever, wherein the foot is placed into a seat track attached to the aircraft, the seat track having a cutout portion and a cavity beneath the cutout portion, and the lever is moved to turn the foot within the cavity to lock down the cargo item to the seat track to restrain its movement. | 07-29-2010 |