Patent application number | Description | Published |
20120018067 | MOTORCYCLE TIRE FOR RUNNING ON ROUGH TERRAIN - A motorcycle tire for running on rough terrain comprises a tread portion having a developed tread width and provided with a plurality of tread blocks. The tread blocks include a plurality of crown blocks defined as having a ground contacting top surface whose centroid is located within a crown region defined as having a developed width of ⅓ of the developed tread width and centered on the tire equator. The crown blocks include a plurality of central crown blocks whose axial distance from the tire equatorial plane to the centroid is not more than 2% of the developed tread width, and a plurality of off-center crown blocks whose axial distance from the tire equatorial plane to the centroid is more than 2% and not more than 6% of the developed tread width. | 01-26-2012 |
20120305154 | MOTORCYCLE TIRE FOR RUNNING ON ROUGH TERRAIN - A motorcycle tire for running on rough terrain has a block pattern that includes major groups arranged circumferentially of the tire at intervals, and minor groups arranged between the major groups. The major group consists of four blocks arranged axially of the tire and each connected to the next with a tie bar, wherein each is defined as having the centroid of its top surface within a tread center region having a developed width of 60% of a developed tread width, and angles (θ | 12-06-2012 |
20120312436 | MOTORCYCLE TIRE FOR UNEVEN TERRAIN | 12-13-2012 |
20130167992 | MOTORCYCLE TIRE FOR UNEVEN TERRAIN - A motorcycle tire includes a tread having shoulder blocks, and sidewalls. Each shoulder block includes a main portion and an end portion. The main portion is formed by a first crosslinked rubber composition. The end portion and the sidewalls are formed by a second crosslinked rubber composition. JIS-A hardness Ha of the main portion is greater than JIS-A hardness Hb of the end portion and the sidewalls. Difference (Ha−Hb) is greater than or equal to 5, and is not greater than 12. A ratio (H | 07-04-2013 |
20130263986 | PNEUMATIC TIRE FOR RUNNING ON ROUGH TERRAIN - A pneumatic tire for rough terrain comprises a tread portion provided with a block having a top face and a sidewall face extending radially inwardly from the peripheral edge of the top face, wherein the top face has a polygonal shape having a plurality of sides, and the sidewall face comprises a plurality of strip surfaces extending radially inwardly from the above-mentioned sides, respectively, so as to define a corner between every two adjacent strip surfaces. At least one of the corners is chamfered by a circular arc in a cross section parallel with the top face, wherein the center of the circular arc is positioned inside the block, and the radius of the circular arc is gradually increased from the radially outside to the radially inside of the tire. | 10-10-2013 |
20150122383 | OFF-ROAD PNEUMATIC TIRE - An off-road pneumatic tire has a tread having an outer surface forming a tread surface, the tread including a body and multiple blocks projecting from the body substantially outward in radial direction. The blocks have a center block group, a pair of shoulder block groups and a pair of middle block groups. The center group includes center blocks at interval in circumferential direction on plane of equator. Each shoulder group includes shoulder blocks at interval in the circumferential direction on an edge of the tread surface. Each middle group includes middle blocks at interval in the circumferential direction between the center and one shoulder groups. The center group has units each having first, second, third and fourth center blocks in the order of the first, second, third and fourth blocks in the circumferential direction. | 05-07-2015 |
Patent application number | Description | Published |
20090121775 | TRANSISTOR AND METHOD FOR OPERATING THE SAME - In a transistor, an AlN buffer layer | 05-14-2009 |
20090146182 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride semiconductor device includes: first through third nitride semiconductor layers formed in sequence over a substrate. The second nitride semiconductor layer has a band gap energy larger than that of the first nitride semiconductor layer. The third nitride semiconductor layer has an opening. A p-type fourth nitride semiconductor layer is formed so that the opening is filled therewith. A gate electrode is formed on the fourth nitride semiconductor layer. | 06-11-2009 |
20100327293 | FIELD-EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME - An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased. | 12-30-2010 |
20110012173 | SEMICONDUCTOR DEVICE - A semiconductor device includes an undoped GaN layer ( | 01-20-2011 |
20110024797 | NITRIDE-BASED SEMICONDUCTOR DEVICE WITH CONCAVE GATE REGION - In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion. | 02-03-2011 |
20110037100 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride semiconductor device includes: first through third nitride semiconductor layers formed in sequence over a substrate. The second nitride semiconductor layer has a band gap energy larger than that of the first nitride semiconductor layer. The third nitride semiconductor layer has an opening. A p-type fourth nitride semiconductor layer is formed so that the opening is filled therewith. A gate electrode is formed on the fourth nitride semiconductor layer. | 02-17-2011 |
20110095335 | NITRIDE SEMICONDUCTOR DEVICE - A high breakdown voltage GaN-based transistor is provided on a silicon substrate. A nitride semiconductor device including: a silicon substrate, a SiO | 04-28-2011 |
20110114967 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode. | 05-19-2011 |
20120068227 | SEMICONDUCTOR DEVICE - A normally off semiconductor device with a reduced off-state leakage current, which is applicable to a power switching element, includes: a substrate; an undoped GaN layer formed above the substrate; an undoped AlGaN layer formed on the undoped GaN layer; a source electrode and a drain electrode, formed on the undoped GaN layer or the undoped AlGaN layer; a P-type GaN layer formed on the undoped AlGaN layer and disposed between the source electrode and the drain electrode; and a gate electrode formed on the P-type GaN layer, wherein the undoped GaN layer includes an active region including a channel and an inactive region not including the channel, and the P-type GaN layer is disposed to surround the source electrode. | 03-22-2012 |
20120126290 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region. | 05-24-2012 |
20120299011 | FIELD-EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME - An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased. | 11-29-2012 |
Patent application number | Description | Published |
20110215379 | FIELD EFFECT TRANSISTOR - A field effect transistor includes a semiconductor stack formed on a substrate, and having a first nitride semiconductor layer and a second nitride semiconductor layer. A source electrode and a drain electrode are formed on the semiconductor stack so as to be separated from each other. A gate electrode is formed between the source electrode and the drain electrode so as to be separated from the source electrode and the drain electrode. A hole injection portion is formed near the drain electrode. The hole injection portion has a p-type third nitride semiconductor layer, and a hole injection electrode formed on the third nitride semiconductor layer. The hole injection electrode and the drain electrode have substantially the same potential. | 09-08-2011 |
20110227093 | FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - The present invention has an object to provide an FET and a method of manufacturing the FET that are capable of increasing the threshold voltage as well as decreasing the on-resistance. The FET of the present invention includes a first undoped GaN layer; a first undoped AlGaN layer formed on the first undoped GaN layer, having a band gap energy greater than that of the first undoped GaN layer; a second undoped GaN layer formed on the first undoped AlGaN layer; a second undoped AlGaN layer formed on the second undoped GaN layer, having a band gap energy greater than that of the second undoped GaN layer; a p-type GaN layer formed in the recess of the second undoped AlGaN layer; a gate electrode formed on the p-type GaN layer; and a source electrode and a drain electrode which are formed in both lateral regions of the gate electrode, wherein a channel is formed at the heterojunction interface between the first undoped GaN layer and the first undoped AlGaN layer. | 09-22-2011 |
20110266554 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE DEVICE - In a manufacturing method of a semiconductor device, first, a first semiconductor layer, a second semiconductor layer, and a p-type third semiconductor layer are sequentially epitaxially grown on a substrate. After that, the third semiconductor layer is selectively removed. Then, a fourth semiconductor layer is epitaxially grown on the second semiconductor layer. Then, a gate electrode is formed on the third semiconductor layer. | 11-03-2011 |
20110272740 | FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A field-effect transistor includes a first semiconductor layer formed on a substrate, and a second semiconductor layer. The first semiconductor layer has a containing region provided as an isolation region which contains non-conductive impurities, and a non-containing region which contains no non-conductive impurities. A first region is defined by a vicinity of a portion of the interface between the containing region and the non-containing region, the portion of the interface being below a gate electrode, the vicinity including the portion of the interface and being included in the containing region. The second semiconductor layer includes a second region which is located directly above the first region. The concentration of the non-conductive impurities of the second region is lower than that of the first region. | 11-10-2011 |
20110278540 | FIELD-EFFECT TRANSISTOR - Provided is a field-effect transistor which is capable of suppressing current collapse. An HEMT as the field-effect transistor includes: a first semiconductor layer made of a first nitride semiconductor; and a second semiconductor layer formed on the first semiconductor layer and made of a second nitride semiconductor having a greater band gap than a band gap of the first nitride semiconductor, wherein the first semiconductor layer includes a region in which a threading dislocation density increases in a stacking direction. | 11-17-2011 |
20110297960 | TRANSISTOR ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a transistor assembly includes the steps of: (a) forming a transistor; (b) polishing a base substrate; and (c) securing the transistor of which the base substrate is polished to a support substrate. The step (a) is a step of forming a first semiconductor layer and a second semiconductor layer on a principle surface of the base substrate. The step (b) is a step of polishing a surface of the base substrate opposite to the principle surface. The step (c) is a step of securing the transistor on the support substrate in the presence of a stress applied on the base substrate in such a direction that a warp of the base substrate is reduced. The base substrate is made of a material different from that of the first semiconductor layer and the second semiconductor layer, and a tensile stress is applied on the second semiconductor layer. | 12-08-2011 |
20120146093 | NITRIDE SEMICONDUCTOR DEVICE - A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semiconductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer | 06-14-2012 |
20140097468 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer ( | 04-10-2014 |
20140103360 | SEMICONDUCTOR DEVICE - A semiconductor device having: a substrate; a nitride semiconductor layer including a first semiconductor layer made of GaN or In | 04-17-2014 |
20140231873 | NITRIDE SEMICONDUCTOR DEVICE - A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semicnductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer | 08-21-2014 |
Patent application number | Description | Published |
20100080963 | PHOTOSENSITIVE RESIN COMPOSITION, POLYMER COMPOUND, METHOD OF FORMING A PATTERN, AND ELECTRONIC DEVICE - A polymer compound is provided which is excellent in heat resistance and insulating property, and a photosensitive resin composition is provided which includes the polymer compound, and may form a cured pattern or a cured film excellent in pattern forming property, resolution, heat resistance and insulating property. Also, a method for forming a cured pattern excellent in pattern forming property, resolution, heat resistance and insulating property using the photosensitive resin composition, and an electronic device having high reliance for a semiconductor device or for a display device are provided. The photosensitive resin composition includes a polymer compound obtained by reacting a monomer represented by Formula (1) and a monomer represented by Formula (2), and a photosensitizing agent. | 04-01-2010 |
20120045616 | POSITIVE PHOTOSENSITIVE RESIN COMPOSITION, METHOD FOR FORMING CURED FILM, CURED FILM, ORGANIC EL DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY DEVICE - A positive photosensitive resin composition including: a resin comprising a structural unit having an acid dissociative group and a structural unit having a functional group capable of forming a covalent bond by reacting with a carboxyl group or a phenolic hydroxyl group; and an acid generator represented by the following formula (I): | 02-23-2012 |
20140005409 | POSITIVE PHOTOSENSITIVE RESIN COMPOSITION, METHOD FOR FORMING CURED FILM, CURED FILM, ORGANIC EL DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY DEVICE | 01-02-2014 |
Patent application number | Description | Published |
20100194717 | ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE - The present invention provides an organic electroluminescence display device including an organic electroluminescence element which includes a transparent electrode, a counter electrode, and an organic compound layer provided between the transparent electrode and the counter electrode, the organic compound layer including a light emitting layer, and a fine particle-containing layer positioned in the optical path of light emitted from the light emitting layer and adjacent to the transparent electrode, wherein the fine particle-containing layer contain an organic resin material having a refractive index equal to or lower than the refractive index of the transparent electrode, and fine particles having a refractive index higher than the refractive index of the organic resin material and a weight average particle diameter of 0.5 μm to 5 μm, and the fine particle-containing layer has a thickness of 2 μm to 10 μm. | 08-05-2010 |
20120088189 | CONDUCTIVE COMPOSITION, TRANSPARENT CONDUCTIVE FILM, DISPLAY ELEMENT AND INTEGRATED SOLAR BATTERY - To provide a conductive composition including: a binder, a photosensitive compound, metal nanowires, and a solvent, wherein the solvent has a solubility parameter value of 30 MPa | 04-12-2012 |
Patent application number | Description | Published |
20150086303 | PROCESSING OBJECT TRANSPORT SYSTEM, AND SUBSTRATE INSPECTION SYSTEM - A substrate inspection system includes a plurality of processing units, and each processing unit is provided with a transport mechanism configured to transport an substrate to be inspected along a transport passage which extends substantially horizontally, a lift mechanism configured to lift the substrate to be inspected to a height position, at a set position on the transport passage, and processors each configured to perform a predetermined process on the substrate to be inspected positioned at the height position. The processing units are arranged such that transport passages thereof are aligned and such that the transport directions thereof are the same direction. Between two adjacent transport passages, the substrate to be inspected is delivered from the transport passage on an upstream side to the transport passage on a downstream side. | 03-26-2015 |
20150212625 | TOUCH PANEL INSPECTING APPARATUS - A touch panel inspecting apparatus includes a workpiece holder, a pseudo finger, an X-Y movement mechanism, a memory part, an electric pneumatic regulator, and a panel signal acquiring part. The workpiece holder allows a touch panel, which is an inspection target, to be set thereon. The pseudo finger is contactable with the touch panel set on the workpiece holder. The X-Y movement mechanism moves the pseudo finger relative to the touch panel. The memory part stores therein a set value of pressing force of the pseudo finger, in a changeable manner. The electric pneumatic regulator regulates the pressing force to bring the pseudo finger into contact with the touch panel, based on the set value stored in the memory part. The panel signal acquiring part acquires an electric signal output from the touch panel. | 07-30-2015 |
20150268298 | FLEXIBLE CIRCUIT BOARD INSPECTING APPARATUS - A flexible circuit board inspecting apparatus for conducting an inspection on a flexible circuit board includes a transport path and an inspection part mechanism. The transport path is configured to successively transport the flexible circuit board having a plurality of unit circuit boards arranged thereon. The inspection part mechanism is configured to bring and distance a jig for inspecting the flexible circuit board transported on the transport path close to and from the flexible circuit board. The transport path includes a longitudinal transport portion for transporting the flexible circuit board in a downward vertical direction. The inspection part mechanism moves the jig in a direction perpendicular to the flexible circuit board transported on the longitudinal transport portion to bring and distance the jig close to and from the flexible circuit board. | 09-24-2015 |
20150310161 | METHOD OF DESIGNING CIRCUIT BOARD INSPECTING JIG, CIRCUIT BOARD INSPECTING JIG, AND CIRCUIT BOARD INSPECTING APPARATUS - Provided is a method of designing a circuit board inspecting jig having a contact to be brought into conductive contact with a test point on a circuit board to be inspected. The method includes: preparing temporary design data by temporarily designing the circuit board inspecting jig based on design data for the circuit board to be inspected (a first designing process); acquiring an expansion and contraction ratio of the circuit board based on a condition upon manufacturing the circuit board (and an environmental condition upon inspecting the circuit board) (an expansion and contraction ratio acquiring process); and obtaining design data for the circuit board inspecting jig to be actually manufactured by scaling the temporary design data up and down by the expansion and contraction ratio (a second designing process). | 10-29-2015 |
Patent application number | Description | Published |
20150343392 | POLYMER COMPOSITION AND POROUS MEMBRANE - A polymer composition containing a polymer (B) obtained by polymerizing a monomer composition containing: a methacrylic acid ester macromonomer (b1) represented by the following formula (1); and another monomer (b2). Also, a porous membrane formed from a membrane forming polymer (A) and the aforementioned polymer composition. | 12-03-2015 |
20160038884 | RESIN COMPOSITION, MEMBRANE-FORMING STOCK SOLUTION, POROUS MEMBRANE, AND HOLLOW FIBER MEMBRANE, WATER TREATMENT DEVICE, ELECTROLYTE SUPPORT, AND SEPARATOR USING POROUS MEMBRANE - The present invention pertains to a resin composition which includes component: a membrane-forming polymer, component: a polymer obtained by polymerizing a monomer composition which includes a (meth)acrylic ester macromonomer represented by general formula and another monomer, and component: a polymer including a vinylpyrrolidone unit, a membrane-forming stock solution which includes the resin composition, a porous membrane obtained by forming with the membrane-forming stock solution, and a hollow fiber membrane, a water treatment device, an electrolyte support, and a separator which use the porous membrane. According to the present invention, it is possible to provide a porous membrane which has pores with high uniformity wherein the formation of large pores with a diameter of 1 μm or higher is suppressed and which has excellent fractionation performance and high water permeability, and a hollow fiber membrane, water treatment device, electrolyte support, and separator which use the porous membrane. | 02-11-2016 |
Patent application number | Description | Published |
20080221341 | Trisoxetane compound, process for producing the same, and opitcal waveguide using the same - The present invention relates to a trisoxetane compound represented by the following formula (1): | 09-11-2008 |
20100008621 | MANUFACTURING METHOD OF OPTO-ELECTRIC HYBRID BOARD AND OPTO-ELECTRIC HYBRID BOARD OBTAINED THEREBY - A method of manufacturing an opto-electric hybrid board which is capable of reducing the number of steps for the manufacture of the opto-electric hybrid board and which achieves the reduction in thickness of the opto-electric hybrid board to be manufactured, and an opto-electric hybrid board obtained thereby. A plurality of protruding cores (optical interconnect lines) | 01-14-2010 |
20100067849 | MANUFACTURING METHOD OF OPTICAL WAVEGUIDE DEVICE AND OPTICAL WAVEGUIDE DEVICE OBTAINED THEREBY - A manufacturing method of an optical waveguide device and an optical waveguide device obtained thereby. An under cladding layer is formed on the front surface of a colored-layer-coated PET substrate including a PET substrate portion and a colored layer of a color that absorbs irradiation light and formed on the back surface of the PET substrate portion, and then a photosensitive resin layer for the formation of cores is formed thereon. In forming the cores, when the irradiation light reaches the bottom surface of the PET substrate portion, most of the irradiation light is absorbed by the colored layer, so that there is little irradiation light reflected from the bottom surface of the PET substrate portion. This significantly reduces the irradiation light reflected diffusely from the PET substrate portion and reaching the photosensitive resin layer to thereby effectively suppress the surface roughening of the side surfaces of the cores. | 03-18-2010 |
20100104254 | COMPOSITION FOR OPTICAL WAVEGUIDE, PREPARATION METHOD FOR THE COMPOSITION, OPTICAL WAVEGUIDE PRODUCED BY USING THE COMPOSITION, AND OPTICAL WAVEGUIDE MANUFACTURING METHOD - A composition for an optical waveguide is provided which contains no halogen atom and has no light absorption band in a visible to near-infrared spectral range. A method of preparing the composition is also provided. The composition includes: (A) a fine particulate zirconium oxide material including zirconium oxide fine particles, and a silicone oligomer and a silicone oligomer polymer bonded to outer peripheral surfaces of the zirconium oxide fine particles; and (B) a photoacid generator. For preparation of the composition, the fine particulate zirconium oxide material (A) is prepared by mixing a silicone oligomer in an aqueous dispersion of zirconium oxide fine particles, polymerizing the silicone oligomer in an acidic pH range to provide a silicone oligomer polymer, and bonding the silicone oligomer and the silicone oligomer polymer to outer peripheral surfaces of the zirconium oxide fine particles. Then, the photoacid generator (B) is blended with the fine particulate zirconium oxide material (A). | 04-29-2010 |
20130118788 | POLYIMIDE PRECURSOR COMPOSITION, AND WIRING CIRCUIT BOARD EMPLOYING THE COMPOSITION - A polyimide precursor composition comprises (A), and at least one of (B) and (C), (B) and (C) being present in a proportion of 30-100 parts by weight based on 100 parts by weight of (A):
| 05-16-2013 |
20130163941 | RESIN COMPOSITION FOR FORMING OPTICAL WAVEGUIDE AND OPTICAL WAVEGUIDE USING THE COMPOSITION - A resin composition for forming an optical waveguide brings together excellent bending resistance, a low refractive index, and low tackiness suitable for a roll-to-roll (R-to-R) process as a material for forming an optical waveguide, in particular, a material for forming a clad layer. The resin composition for forming an optical waveguide to be used in formation of an optical waveguide includes a polyvinyl acetal compound having a structural unit represented by the following general formula (1) as a main component: | 06-27-2013 |
Patent application number | Description | Published |
20080282044 | DATA CONTROL SYSTEM, CONTROL SERVER, DATA CONTROL METHOD, AND PROGRAM - There is provided a data control system that includes a control server and an information processing terminal equipped with a non-contact type IC chip. The information processing terminal includes a chip memory and a consistency check request portion. The chip memory includes at least one service area that stores a service data item and an index area that stores a link information item for accessing the service area. The consistency check request portion transmits a consistency check request. The control server includes a data acquisition portion that acquires the link information item according to the check request, an area determination portion that determines whether the corresponding service area exists for each link information item, a reading portion that reads the determined service area, and a data update portion that, if the service area could not be read, updates the link information item with information not indicating any access destination. | 11-13-2008 |
20080283595 | Authentication Information Management System, Authentication Information Management Server, Authentication Information Management Method and Program - There is provided an authentication information management system including: an information processing terminal mounted with an IC chip capable of non-contact communication with a reader/writer; and an authentication information management server capable of communication with the information processing terminal, wherein the information processing terminal includes: a plurality of memory areas provided in the IC chip for each of functions of the IC chip; and a plurality of applications for achieving each of the functions of the IC chip, and the authentication information management server includes: an authentication information setting portion for setting authentication information in the first memory area in response to a request sent from the first application of the information processing terminal; and an authentication information notifying portion which in response to a request sent from a second application of the information processing terminal, notifies the second application of the authentication information of the first memory area. | 11-20-2008 |
20080284572 | DATA CONTROL SYSTEM, CONTROL SERVER, DATA CONTROL METHOD, AND PROGRAM - There is provided a data control system that includes a control server and an information processing terminal equipped with a non-contact type IC chip. The information processing terminal includes an internal memory in the IC chip and an update request portion. The internal memory includes at least one service area that can store a service data item and a control information item and includes an index area that stores a link information item for accessing the service area The update request portion transmits an update request that specifies the link information item and service area to be updated, as well as a type of update processing. The control server includes a data update portion that responds to the update request, performing the specified type of update processing on the specified link information item and service area and causing the specified link information item and service area to be updated. | 11-20-2008 |
20090222662 | CARD ISSUING SYSTEM, CARD ISSUING SERVER, CARD ISSUING METHOD AND PROGRAM - The present invention provides a service providing server including an authentication ticket creating unit for encrypting access authentication information and creating an authentication ticket, and an authentication ticket transmitting unit for transmitting the authentication ticket to a card issuing server; where the card issuing server includes an authentication ticket verifying unit for decrypting the authentication ticket and verifying the authentication ticket, a verification result notifying unit for notifying the verification result of the authentication ticket to the service providing server, a connection information transmitting unit for transmitting connection information for connecting to the card issuing server to the service providing server along with the verification result of the authentication ticket, and an authentication information verifying unit for comparing and verifying the access authentication information of the authentication ticket and access authentication information stored in the IC chip of the information processing terminal. | 09-03-2009 |
20110041064 | INFORMATION PROCESSING APPARATUS, PROGRAM, AND INFORMATION PROCESSING SYSTEM - An information processing apparatus includes a reading unit that reads, from a memory area of an IC chip, identification information of a service including at least any one of a wire communication service via an external wire communication or a wireless communication service via an external wireless communication, which use the memory area of the IC chip. The information processing apparatus also includes an acquisition unit that acquires service information to allow a user to use a service from an external server by transmitting the identification information of the service which the reading unit has read to the external server, and includes a display unit that displays to allow the user to use the service based on the service information which the acquisition unit has acquired. | 02-17-2011 |
20130046814 | INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, PROGRAM, AND INFORMATION PROCESSING SYSTEM - Provided is an information processing device including a determination unit that determines, based on process-related information acquired from a first server that provides a service, if a process based on the process-related information is executable; a process control unit that makes, if it is not determined that the process is executable, the process based on the process-related information executable by an application that performs processes corresponding to a plurality of services; and a processing unit that causes the application to execute the process based on the process-related information. The process control unit causes a second server to generate, based on the process-related information, a processing instruction that is based on the process-related information, and the processing unit causes the application to execute a process indicated by the generated processing instruction. | 02-21-2013 |
20150178530 | INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD - Provided is an information processing system including a server device, and a non-contact communication tag readable through NFC. The non-contact communication tag includes an identification information retaining unit that retains identification information for uniquely identifying the tag, an authentication information retaining unit that retains authentication information to be used in authentication of the non-contact communication tag, and a NFC unit that transmits the identification information and the authentication information to another device, which will transmit the received identification information and authentication information to the server device, in NFC with the other device. The server device includes an information acquisition unit that acquires the identification information, the authentication information, and other information transmitted from the other device, an authentication unit that authenticates the non-contact communication tag using the authentication information, and a process execution unit that executes a process according to the other information and the identification information after the authentication. | 06-25-2015 |
20150207861 | INFORMATION PROCESSING DEVICE, SERVER DEVICE, AND INFORMATION PROCESSING SYSTEM - According to an embodiment of the present disclosure, there is provided an information processing device including an activation control unit configured to transmit first information that includes information read through near field communication to a server device, to acquire second information transmitted from the server device according to the first information, and to control activation of an application of the information processing device itself based on the acquired second information. | 07-23-2015 |
Patent application number | Description | Published |
20080294739 | OPERATION MONITORING APPARATUS, OPERATION MONITORING METHOD, AND COMPUTER-READABLE RECORDING MEDIUM STORING OPERATION MONITORING PROGRAM - An operation monitoring apparatus monitors statuses of plural monitoring target apparatus connected to a network, by sending a connection confirmation mail, via a notification server located on the network, receiving the connection confirmation mail and an operation confirmation mail sent from each monitoring target apparatus, storing a scheduled transmission time of a next operation confirmation mail contained in the operation confirmation mail, as part of apparatus information of the monitoring target apparatus and judging, using the scheduled transmission time, whether the next operation confirmation mail has been received. The judgment is not made if a latest connection confirmation mail sent from the operation monitoring apparatus itself has not been received. | 11-27-2008 |
20090287818 | MONITORING APPARATUS AND MONITORING METHOD - A monitoring apparatus for monitoring communication configurations of a plurality of client devices connected to a server, the monitoring apparatus includes: a processor for controlling the communications between the client devices and the server in accordance with a process including: receiving from each of the client devices communication condition information and storing latest communication condition information of each of the client devices; determining at a time interval whether any of client devices became incapable of communication with the server by checking the latest communication condition information of each of client devices; and upon detection of at least one of the client devices for which obsolete communication condition information is stored, issuing a notice indicating that the at least one of the client devices are incapable of communication with the server. | 11-19-2009 |
20100223509 | ELECTRONIC DEVICE, INFORMATION PROCESSING SYSTEM, METHOD OF NOTIFICATION OF A FAULT OF AN ELECTRONIC DEVICE, AND FAULT NOTIFICATION PROGRAM - An information processing system includes an electronic device and an information processing unit. The electronic device includes a fault detection unit; a data generating unit for generating, as data, the content of the detected fault; a data dividing unit for dividing the generated data into plural division data in the case where the data exceeds a predetermined capacity; a data compression unit for compressing each of the plural division data; an identification information adding unit for adding identification information to each of the plural compressed division data; and a data transmission unit for transmitting the plural compressed division data with the identification information. The information processing unit includes a data receiving unit for receiving the plural compressed division data, and a data restoration unit for restoring the plural compressed division data into original data based on the identification information. | 09-02-2010 |
20110119664 | FIRMWARE DISTRIBUTING DEVICE, PROGRAM, AND METHOD - Modified firmware is registered and controlled, and, when a download request is received from a terminal device, unupdated firmware is determined and downloaded to the terminal device. User identification information obtained from the download request is acquired, and, if the user identification information matches the user identification information of another terminal device that is already carrying out download, the download to the terminal device that output the download request is stopped. Even when the user identification information matches the user identification information of the other terminal device that is already carrying out download, if it is determined to be a download request by an operator operation, stopping the download is cancelled so as to execute the download, and a forcible termination notification is transmitted to the other terminal device that is already executing download so as to interrupt the download thereof in the process. | 05-19-2011 |
Patent application number | Description | Published |
20090122738 | Method of broadcasting packets in ad-hoc network - A method for distributing a packet to a plurality of moving nodes comprising receiving a packet containing at least a message, a sender identifier, a location of a sender, an identifier for a relay node and distance from the sender and the relay node, determining if a node receiving the packet is the relay node and immediately distributing the packet to a plurality of moving nodes if the receiving node is the relay node. If the receiving node is not the relay node, the method further comprises steps of waiting a set period of time, determining if a packet is received from a different sender containing the same message, within the period of time and distributing the packet to a plurality of moving nodes if a packet containing the same message is not received within the period of time. The distributed packet includes an identifier for a successive relay node. | 05-14-2009 |
20090129323 | Method for determining transmission channels for a LPG based vehicle communication network - A method for determining a transmission channel for multi-hop transmission of a data packet from a plurality of data channels in an ad-hoc network. The network includes at least one local peer group. Each local peer group has a plurality of moving vehicles as nodes. The method comprises steps of determining available channels for data packet transmission at each node, transmitting a first list of available channels to at least one other node, receiving, from the at least one other node, a second list of available channel for the at least one other node, creating an available channel table including the first and second lists of available channels, selecting a transmitting channel for a data packet based upon information in the available channel table, and advertising the selected channel to the at least one other node. | 05-21-2009 |
20090285197 | METHODS FOR EFFICIENT ORGANIZATION OF VEHICLE PEER GROUPS AND EFFICIENT V2R COMMUNICATIONS - The present invention provides methods for efficient control message distribution in a VANET. Efficient flooding mechanisms are provided to fulfill the objective of flooding (delivering a message to every connected node) with a limited number of re-broadcasting by selected key nodes. A suppression-based efficient flooding mechanism utilizes a Light Suppression (LS) technique to reduce the number of flooding relays by giving up the broadcasting of a flooding message when a node observes downstream relay of the same flooding message. Additionally, a relay-node based efficient flooding mechanism selects Relay Nodes (RN) to form an efficient flooding tree for control message delivery. RNs are nodes that relay at least one control message, for instance a Membership Report (MR) to the upstream node in “k” previous control message cycles The upstream node may be the group header (GH) for the LPG. | 11-19-2009 |
20090285213 | Inter-Local Peer Group (LPG) Routing Method - An on-demand method of routing data between a plurality of local peer groups (LPG). Each LPG includes a plurality of moving nodes. The method comprises transmitting a route request message from a source node, relaying the route request message to a native boundary node; forwarding the route request message to a foreign boundary node, determining if the destination node is within an LPG for the foreign boundary node; relaying the route request message to another boundary node if the destination node is not within the LPG, relaying the route request message to the destination node if the destination node is within the LPG, receiving the routing request message at the destination node, transmitting a routing response to the source node, relaying the routing response to the source node through a path discovered by the route request, receiving the routing response at the source node, and transmitting the data, upon receipt of the routing response. | 11-19-2009 |
20120201167 | Inter-Local Peer Group (LPG) Routing Method - An on-demand method of routing data between a plurality of local peer groups (LPG) of plural moving nodes comprises transmitting a route request message from a source node, relaying the route request message to a native boundary node; forwarding the route request message to a foreign boundary node, determining if the destination node is within an LPG for the foreign boundary node; relaying the route request message to another boundary node if the destination node is not within the LPG, relaying the route request message to the destination node if the destination node is within the LPG, receiving the routing request message at the destination node, transmitting a routing response to the source node, relaying the routing response to the source node through a path discovered by the route request, receiving the routing response at the source node, and transmitting the data, upon receipt of the routing response. | 08-09-2012 |