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Higashi, Yokohama-Shi
Hirohito Higashi, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20120068746 | PHASE-LOCKED LOOP CIRCUIT AND DELAY-LOCKED LOOP CIRCUIT - A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes a resistor and a capacitor and that smoothes the charge pump current and converts the smoothed current into a control voltage; a voltage-controlled oscillator that generates an oscillation signal with a frequency according to the control voltage; and a frequency divider that generates a frequency-divided signal by frequency-dividing the oscillation signal and outputs the frequency-divided signal to the phase comparator as the feedback signal, wherein the resistor in the low-pass filter is a variable resistor that is changed according to the control voltage. | 03-22-2012 |
Masahiro Higashi, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080306321 | PROCESS FOR PRODUCING LIQUID HYDROCARBON WITH HYDROCRACKING CATALYST - Provided is a process and catalyst for hydrocracking paraffinic hydrocarbons which provides satisfactorily high cracking activity and middle distillate yield as well as the low pour point of the resulting gas oil all together. The catalyst of the present invention comprises a crystalline aluminosilicate, alumina-boria and a noble metal of Group VIII of the Periodic Table. | 12-11-2008 |
Shouichi Higashi, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20110195902 | Fusion Protein Composed of Matrix Metalloproteinase-2 Inhibitor Peptide Derived From Amyloid-B Precursor Protein and Tissue Inhibitor of Metalloproteinase-2 - The present invention provides an agent capable of inhibiting MMP-2 specifically. Disclosed is a fusion molecule composed of a β-amyloid precursor protein molecule-derived domain having an activity of selectively inhibiting matrix metalloproteinase-2 and a tissue inhibitor of metalloproteinase capable of binding to latent matrix metalloproteinase. Also disclosed are a pharmaceutical composition, a cancer metastasis and/or angiogenesis inhibitor, a therapeutic and/or prophylactic for cardiovascular diseases, and a matrix metal loproteinase-2 inhibitor, each of which comprises the fusion molecule. | 08-11-2011 |
Tomoki Higashi, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080232181 | SEMICONDUCTOR MEMORY DEVICE - This disclosure concerns a semiconductor memory device comprising: a memory cell array having memory cells arrayed two-dimensionally; word lines connected to the memory cells of rows of the memory cell array; bit lines connected to the memory cells of columns of the memory cell array; sense amplifiers connected to the bit lines, and detecting data stored in the memory cells; a test pad passing a predetermined reference current from a power source, and transmitting a reference voltage based on the reference current; and test circuits connected between the power source and the test pad and intervening between the power source and the bit lines, the test circuits passing test currents according to the reference voltage via the bit lines. | 09-25-2008 |
| 20080251830 | SEMICONDUCTOR STORAGE DEVICE AND DRIVING METHOD THEREOF - This disclosure concerns a semiconductor storage device comprising a semiconductor layer provided on the insulation layer provided on the semiconductor substrate; a source layer and a drain layer provided in the semiconductor layer; a body provided between the source layer and the drain layer, the body being in an electrically floating state; an emitter layer contacting with the source layer, the emitter layer having an opposite conductive type to the source layer; a word line including the source layer, the drain layer, and the body, the word line being provided to memory cells arrayed in a first direction in a plurality of tow-dimensionally arranged memory cells; a source line connected to the source layers of the memory cells arrayed in the first direction; and a bit line connected to the drain layers of the memory cells arrayed in a second direction intersecting the first direction. | 10-16-2008 |
| 20110069556 | NAND FLASH MEMORY - A NAND flash memory has a memory cell transistor, the memory cell transistor including a charge storage layer formed over a well of a semiconductor substrate surface via a first insulation film and insulated from surroundings, and a control gate provided over the charge storage layer via a second insulation film, the memory cell transistor storing information according to a threshold voltage which depends on a charge quantity retained by the charge storage layer; and a control circuit which controls operation of the memory cell transistor by controlling a voltage applied to the control gate and a voltage applied to the well. | 03-24-2011 |
| 20120069660 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device comprises a plurality of memory blocks, each including a plurality of cell units and each configured as a unit of execution of an erase operation. Each of the cell units comprises a memory string, a first transistor, a second transistor, and a diode. The first transistor has one end connected to one end of the memory string. The second transistor is provided between the other end of the memory string and a second line. The diode is provided between the other end of the first transistor and a first line. The diode comprises a second semiconductor layer of a first conductivity type and a third semiconductor layer of a second conductivity type. | 03-22-2012 |
Toshiaki Higashi, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20110074749 | THIN FILM TRANSISTOR ARRAY SUBSTRATE, LIGHT-EMITTING PANEL AND MANUFACTURING METHOD THEREOF AS WELL AS ELECTRONIC DEVICE - A thin film transistor array substrate includes a substrate, thin film transistors formed on the substrate, wirings provided on the substrate. The wirings are subjected to an application of a voltage to drive circuits including the thin film transistors. At least part of the surface of each of the wirings is made of an anodic oxide film. | 03-31-2011 |
Tsukasa Higashi, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080239576 | Suspension for disc drive - A suspension for disc drive includes a base plate, a load beam, and a flexure. The flexure includes a metal base member and a circuit member disposed along the metal base member. The circuit member extends in a longitudinal direction of the load beam. The circuit member includes a resin base member formed of an electrically insulating resin and conductors. The conductors are formed into predetermined circuit patterns by etching a deposited copper layer deposited on the resin base member. Each conductor has a cross section in the shape of a trapezoid such that the width of a surface of the conductor which faces the resin base member is greater than that of a surface of the conductor on the side opposite from the resin base member. | 10-02-2008 |
| 20080247093 | Suspension for disc drive - A suspension for a disc drive includes a base plate, a load beam, and a flexure. The flexure includes a metal base member and a circuit member disposed along the metal base member. The circuit member extends along the load beam. The circuit member includes a resin base member formed of a first polyimide, conductors, and a resin cover member formed of a second polyimide. The resin cover member is lower than the resin base member in humidity expansion coefficient. | 10-09-2008 |