| Patent application number | Description | Published |
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| 20080268569 | PHASE-CHANGE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: a bottom electrode formed on a contact plug; a phase-change layer formed on the bottom electrode and having a shape of a character ‘π’; and a top electrode formed on the phase-change layer. | 10-30-2008 |
| 20090137080 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device reduces the current necessary to cause a phase change of a phase change layer. The phase change memory device includes a first oxide layer formed on a semiconductor substrate; a lower electrode formed inside the first oxide layer; a second oxide layer formed on the first oxide layer including the lower electrode, the second oxide having a hole for exposing a part of the lower electrode; a phase change layer formed on a surface of the hole with a uniform thickness so as to make contact with the lower electrode; and an upper electrode formed in the hole and on a part of the second oxide layer, the part being adjacent to the hole. | 05-28-2009 |
| 20090137081 | PHASE CHANGE RAM DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change RAM device includes a semiconductor substrate having a phase change cell area and a voltage application area; a first oxide layer, a nitride layer and a second oxide layer sequentially formed on the semiconductor substrate; a first plug formed in the first oxide layer, the nitride layer and the second oxide layer of the phase change cell area; a second plug formed in the first oxide layer and the nitride layer of the voltage application area; a conductive line formed in the second oxide layer; a third oxide layer formed on the second oxide layer; a lower electrode shaped like a plug, the lower electrode being formed so as to directly make contact with the first plug; and a phase change layer and an upper electrode sequentially formed on the lower electrode in a pattern form. | 05-28-2009 |
| 20110053317 | PHASE CHANGE RAM DEVICE AND METHOD FOR FABRICATING THE SAME - Disclosed are a phase change RAM device and a method for fabricating a phase change RAM device, which can efficiently lower intensity of current required for changing a phase of a phase change layer. The method includes the steps of providing a semiconductor substrate formed with an insulating interlayer including a tungsten plug, forming a first oxide layer on the semiconductor substrate, forming a pad-type bottom electrode, which makes contact with the tungsten plug, in the first oxide layer, forming a second oxide layer on the first oxide layer including the bottom electrode, and forming a porous polystyrene pattern on the second oxide layer such that a predetermined portion of the second oxide layer corresponding to a center portion of the bottom electrode is covered with the porous polystyrene pattern. | 03-03-2011 |
| Patent application number | Description | Published |
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| 20090101981 | ONE-TRANSISTOR TYPE DRAM - A one-transistor type DRAM simplifies a manufacturing process and reduces the height of a chip. In the one-transistor type DRAM, an active region is defined by a device isolating film. A first word line and a second word line extend across the active region and the device isolating film. A common source region is formed in the portion of the active region between the first and second word lines. Drain regions are formed in the portions of the active region outside of the first and second word lines. A first metal line and a second metal line are connected to the common source region and the drain region, respectively, and a bit line is connected to the second metal line. | 04-23-2009 |
| 20100059731 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device and a corresponding method of manufacturing the same is presented. The phase change memory device includes a silicon substrate, a first insulation layer, cell switching elements, heaters, a gate, a second insulation layer, a barrier layer, a phase change layer and top electrodes. The first insulation layer is in the cell region of the substrate and has a first holes. The cell switching elements are formed in the first holes. The heaters are formed on the cell switching elements. The gate is in the peripheral region of the substrate and is higher than the cell switching elements. The second insulation layer having second holes which expose the heaters, and is defined to expose a hard mask layer of the gate. The barrier layer is on sidewalls of the second holes and on the second insulation layer. The phase change layer is formed in and over the second holes in which the barrier layer is formed. The top electrodes are formed on the phase change layer. | 03-11-2010 |
| 20100059732 | PHASE CHANGE MEMORY DEVICE HAVING HEAT SINKS FORMED UNDER HEATERS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate having a cell region and a peripheral region. A first insulation layer is formed in the cell region and includes a plurality of holes. Cell switching elements are formed in the holes of the first insulation layer and heat sinks are formed on the cell switching elements. The heaters are formed on the center of the heat sinks and spacers are formed on the sidewalls. A gate is formed in the peripheral region of the silicon substrate formed of a gate insulation layer, a first conductive layer, a second conductive layer, and a hard mask layer. A second insulation layer covers the entire surface of the resultant silicon substrate and exposes the spacers and the heaters and the hard mask layer. Finally, a stack pattern of a phase change layer and a top electrode is formed on the heaters. | 03-11-2010 |
