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Hekstra, NL
Andries Hekstra, Eindhoven NL
| Patent application number | Description | Published |
|---|---|---|
| 20110022776 | DATA RELIABILITY IN STORAGE ARCHITECTURES - Among other subject matter, storage architectures are provided that store data reliably in connection with a system. The storage architecture ( | 01-27-2011 |
Andries Pieter Hekstra, Eindhoven NL
| Patent application number | Description | Published |
|---|---|---|
| 20080317140 | Method of Converting a User Bitstream Into Coded Bitstream, Method for Detecting a Synchronization Pattern in a Signal, a Record Carier, a Signal, a Recording Device and a Playback Device - This ID proposes synchronization patterns for RLL codes with a (repeated) minimum transition run (RMTR) constraint, where the synchronization pattern comprises a synchronization pattern-body that contains a characteristic bit-pattern that represents a violation of the RMTR constraint. Using a violation of the RMTR constraint allows for short synchronization patterns. | 12-25-2008 |
| 20090015446 | Coder and a Method of Coding For Codes With a Parity-Complementary Word Assignment Having a Constraint of D1=,R=2 - Presently known d=1 codes have long trains consisting of consecutive 2T runs and an overall high frequency of occurrence of the shortest 2T runs that reduce the performance of the bit detector By using a code with an MTR constraint of 2 an improvement in the bit detection is achieved. A code constructed in a systematic way that provides an MTR constraint of 2 is presented. A variation of such a code is disclosed where one sub-code is used, where coding states are divided into coding classes and where code words are divided into code word types. Then, for a given sub-code, an code word of type t can be concatenated with an code word of the next sub-code if said subsequent code word of said next sub-code belongs to one of coding states of the coding class with index T | 01-15-2009 |
| 20090019332 | SISO DECODER WITH SUB-BLOCK PROCESSING AND SUB-BLOCK BASED STOPPING CRITERION - The present invention relates to SISO decoder for iteratively decoding a block of received information symbols (r), in particular for use in a turbo decoder, said block being divided into a number of windows of information symbols. In order to achieve a significant reduction of power consumption a SISO decoder is proposed comprising: | 01-15-2009 |
| 20090296556 | READING DEVICE FOR A RECORD CARRIER - The invention provides an efficient reading device in which, even if one radiation beam should fail, no information is lost and the information can still be read out without time-consuming recurring operations. The present invention solves this problem by providing a reading device (FIG. | 12-03-2009 |
| 20100188004 | DRIVING A LIGHT SOURCE - A method for driving a light source ( | 07-29-2010 |
| 20110122005 | METHOD TO LINEARIZE THE OUTPUT FROM AN ADC - A method is disclosed of compensating the output of an ADC for non-linearity in the response of the ADC. The method comprises converting an analog input signal to uncorrected digital ADC output samples, applying a vector of correction variables to each of a block of uncorrected ADC output samples to provide a block of corrected ADC samples, and iteratively minimizing a measure of the spectral flatness of the block of corrected ADC samples with response to the vector of correction variables. | 05-26-2011 |
Andries Pieter Hekstra, Eidhoven NL
| Patent application number | Description | Published |
|---|---|---|
| 20110161787 | POWER-REDUCED PRELIMINARY DECODED BITS IN VITERBI DECODERS - Various embodiments relate to a storage unit and a related method in a Viterbi decoder for decoding a binary convolutional code with power efficiency. A storage unit for storing survivor paths may use a register exchange method to append additional information received from an add-compare-select unit onto the end of the survivor path. An exemplary method produces a prediction path after a specified depth in the survivor path processing history and subtracts the prediction path from the survivor path. This may cause a majority of bits that comprise the survivor path to be converted to a low-energy bit, such as a logical “0”. During subsequent copies of a differential survivor path using the register exchange method, less energy is consumed when copying the entire survivor path, as a majority of the bits in the survivor paths are a logical “0”. | 06-30-2011 |
Gerben J. Hekstra, Waalre NL
| Patent application number | Description | Published |
|---|---|---|
| 20110109670 | METHOD AND DEVICE FOR DRIVING AN ACTIVE MATRIX DISPLAY PANEL - An active matrix display panel comprises a substrate, an array of pixel circuits being arranged in a matrix of at least one column and a plurality of rows on the substrate, each pixel circuit comprising a light-emitting element, capable of emitting light of an intensity determined by the value of a current passed through it, and at least one column line, each column line arranged to conduct a reference current, provided by a current driving circuit, when connected to the panel. The pixel circuits in a column are divided into a plurality of groups of at least one pixel circuit. The active matrix display panel comprises at least one current mirror circuit associated with a first group, comprising a first current mirror, arranged to mirror a reference current flowing through a column line to a first current mirror output. Each pixel circuit in the first group comprises at least a first current-memory stage, having an output terminal connected to the light-emitting element, wherein the first current-memory stage is capable of drawing a current determined at least partly by the current mirrored to the first current mirror output through the output terminal. Each current mirror circuit comprises at least one additional current mirror, arranged to mirror a reference current flowing through an associated column line to an additional current mirror output, wherein each additional current mirror output is connected in parallel to the first current mirror output. | 05-12-2011 |
Gerben Johan Hekstra, Waalre NL
| Patent application number | Description | Published |
|---|---|---|
| 20090167995 | LCD WITH IMPROVED CONTRAST RATIO AND APPARATUS UTILIZING THE SAME - An LCD device with an LCD cell. The cell has a liquid crystal layer, a base panel adjacent to the liquid crystal layer and a top panel adjacent to the liquid crystal layer but opposing the base panel. The base panel has a first polarizer arranged to polarize incident light into a first direction. The top panel has a color filter with one or more color filter portions so as to produce light with a predetermined color, a second polarizer on a side of the color filter opposite to the liquid crystal layer and designed to polarize incident light into a second direction perpendicular to the first direction, and a third polarizer located between the color filter and the liquid crystal layer and designed to polarize incident light into the second direction. | 07-02-2009 |
Gerben Johannes Maria Hekstra, Eindhoven NL
| Patent application number | Description | Published |
|---|---|---|
| 20100033494 | GAMUT MAPPING - A color mapping system comprises a detail detector ( | 02-11-2010 |