Patent application number | Description | Published |
20130259033 | GID CAPABLE SWITCHING IN AN INFINIBAND FABRIC - Methods, systems, and apparatus for extending the size of Infiniband subnets using GID switching in an Infiniband fabric. An Infiniband subnet is defined to include multiple local identifier (LID) domains, each including multiple nodes interconnected via one or more LID switches. In turn, the LID domains are interconnected via one or more GID switches. Messages may be transferred between nodes in a given LID domain using LID switches in the domain. Messages may be transferred between nodes in separate LID domains by routing the messages via one or more GID switches. In various embodiments, GID switches may be implemented to also operate as LID switches and perform routing based on selected packet header fields. | 10-03-2013 |
20130262613 | EFFICIENT DISTRIBUTION OF SUBNET ADMINISTRATION DATA OVER AN RDMA NETWORK - One embodiment provides a method for receiving subnet administration (SA) data using a remote direct memory access (RDMA) transfer. The method includes formatting, by a network node element, an SA data query with an RDMA-capable flag; configuring, by the network node element, a reliably-connected queue pair (RCQP) to receive an RDMA transfer from a subnet manager in communication with the network node element on an RDMA-capable network; and allocating, by the network node element, an RDMA write target buffer to receive the SA data using an RDMA transfer from the subnet manager in response to the SA data query. | 10-03-2013 |
20140129635 | LOW LATENCY CLUSTER COMPUTING - An embodiment includes a low-latency mechanism for performing a checkpoint on a distributed application. More specifically, an embodiment of the invention includes processing a first application on a compute node, which is included in a cluster, to produce first computed data and then storing the first computed data in volatile memory included locally in the compute node; halting the processing of the first application, based on an initiated checkpoint, and storing first state data corresponding to the halted first application in the volatile memory; storing the first state information and the first computed data in non-volatile memory included locally in the compute node; and resuming processing of the halted first application and then continuing the processing the first application to produce second computed data while simultaneously pulling the first state information and the first computed data from the non-volatile memory to an input/output (IO) node. | 05-08-2014 |
20140201306 | REMOTE DIRECT MEMORY ACCESS WITH REDUCED LATENCY - The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer. | 07-17-2014 |
20140207896 | CONTINUOUS INFORMATION TRANSFER WITH REDUCED LATENCY - The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer. | 07-24-2014 |
20140250202 | PEER-TO-PEER INTERRUPT SIGNALING BETWEEN DEVICES COUPLED VIA INTERCONNECTS - Methods and apparatus to provide peer-to-peer interrupt signaling between devices coupled via one or more interconnects are described. In one embodiment, a NIC (Network Interface Card such as a Remote Direct Memory Access (RDMA) capable NIC) transfers data directly into or out of the memory of a peer device that is coupled to the NIC via one or more interconnects, bypassing a host computing/processing unit and/or main system memory. Other embodiments are also disclosed. | 09-04-2014 |
Patent application number | Description | Published |
20090296699 | PROGRAMMABLE NETWORK INTERFACE CARD - A computing system comprises a programmable network interface card and a host comprising a memory and a transport handler. The programmable network interface card may process a frame received over a network, and determine whether packet data included in the frame is to be directly placed in a first region in a memory. The programmable network interface may comprise a network direct memory access engine (NDE), which may cause transfer of the packet data directly to the first region in the memory if the packet data is to be directly placed into the first region in the memory. The programmable network interface card may cause transfer of the packet data to the transport handler in response to determining that the packet data is not to be directly placed in the first region in the memory. | 12-03-2009 |
20100146069 | METHOD AND SYSTEM FOR COMMUNICATING BETWEEN MEMORY REGIONS - A method and system are provided for transferring data in a networked system between a local memory in a local system and a remote memory in a remote system. A RDMA request is received and a first buffer region is associated with a first transfer operation. The system determines whether a size of the first buffer region exceeds a maximum transfer size of the networked system. Portions of the second buffer region may be associated with the first transfer operation based on the determination of the size of the first buffer region. The system subsequently performs the first transfer operation. | 06-10-2010 |
20120084380 | METHOD AND SYSTEM FOR COMMUNICATING BETWEEN MEMORY REGIONS - A method and system are provided for transferring data in a networked system between a local memory in a local system and a remote memory in a remote system. A RDMA request is received and a first buffer region is associated with a first transfer operation. The system determines whether a size of the first buffer region exceeds a maximum transfer size of the networked system. Portions of the second buffer region may be associated with the first transfer operation based on the determination of the size of the first buffer region. The system subsequently performs the first transfer operation. | 04-05-2012 |
20120284355 | METHOD AND SYSTEM FOR COMMUNICATING BETWEEN MEMORY REGIONS - A method and system are provided for transferring data in a networked system between a local memory in a local system and a remote memory in a remote system. A RDMA request is received and a first buffer region is associated with a first transfer operation. The system determines whether a size of the first buffer region exceeds a maximum transfer size of the networked system. Portions of the second buffer region may be associated with the first transfer operation based on the determination of the size of the first buffer region. The system subsequently performs the first transfer operation. | 11-08-2012 |
20130275631 | DIRECT I/O ACCESS FOR SYSTEM CO-PROCESSORS - Embodiments of the invention describe systems, apparatuses and methods that enable sharing Remote Direct Memory Access (RDMA) device hardware between a host and a peripheral device including a CPU and memory complex (alternatively referred to herein as a processor add-in card). Embodiments of the invention utilize interconnect hardware such as Peripheral Component Interconnect express (PCIe) hardware for peer-to-peer data transfers between processor add-in cards and RDMA devices. A host system may include modules or logic to map memory and registers to and/or from the RDMA device, thereby enabling I/O to be performed directly to and from user-mode applications on the processor add-in card, concurrently with host system I/O operations. | 10-17-2013 |
Patent application number | Description | Published |
20100108264 | BI-LAYER, TRI-LAYER MASK CD CONTROL - A method for controlling critical dimension (CD) of etch features in an etch layer disposed below a functionalized organic mask layer disposed below an intermediate mask layer, disposed below a patterned photoresist mask, which forms a stack is provided. The intermediate mask layer is opened by selectively etching the intermediate mask layer with respect to the patterned photoresist mask. The functionalized organic mask layer is opened. The functionalized organic mask layer opening comprises flowing an open gas comprising COS, forming a plasma, and stopping the flowing of the open gas. The etch layer is etched. | 05-06-2010 |
20100248485 | METHOD FOR DIELECTRIC MATERIAL REMOVAL BETWEEN CONDUCTIVE LINES - A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with respect to the carbon doped silicon oxide and the metal contacts, which forms recess between the metal contacts. | 09-30-2010 |
20130149869 | SILICON ON INSULATOR ETCH - A method etching features through a stack of a silicon nitride layer over a silicon layer over a silicon oxide layer in a plasma processing chamber is provided. The silicon nitride layer is etched in the plasma processing chamber, comprising; flowing a silicon nitride etch gas; forming the silicon nitride etch gas into a plasma to etch the silicon nitride layer, and stopping the flow of the silicon nitride etch gas. The silicon layer is, comprising flowing a silicon etch gas, wherein the silicon etch gas comprises SF | 06-13-2013 |