| Patent application number | Description | Published |
|---|
| 20090046510 | Apparatus and method for multi-bit programming - Multi-bit programming apparatuses and methods are provided. A multi-bit programming apparatus may include: a first programming unit that stores data corresponding to a number of first bits in at least one first memory cell that may be connected to at least one first bit line; and a second programming unit that stores data corresponding to a number of second bits in at least one second memory cell that may be connected to at least one second bit line. Through this, it may be possible to improve data reliability and increase a number of bits to be stored in the entire memory cell. | 02-19-2009 |
| 20090091990 | Apparatus and method of multi-bit programming - Disclosed are a multi-bit programming apparatus and a multi-bit programming method. The multi-bit programming apparatus may include a first control unit that may generates 2 | 04-09-2009 |
| 20090103359 | Apparatus and method of multi-bit programming - Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may comprise: a multi-bit cell array that includes a first multi-bit cell and a second multi-bit cell; a programming unit for programming first data in the first multi-bit cell, and programming second data in the second multi-bit cell; and a verification unit for verifying whether the first data is programmed in the first multi-bit cell using a first verification voltage, and verifying whether the second data is programmed in the second multi-bit cell using a second verification voltage. The multi-bit programming apparatus may generate better threshold voltage distributions in a multi-bit cell memory. | 04-23-2009 |
| 20090109748 | Apparatus and method of multi-bit programming - Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may include: a first control unit that allocates any one of 2 | 04-30-2009 |
| 20090119569 | Encoding system and method for encoding error control codes within bit streams - An encoding system for encoding error control codes may include a first encoder configured to encode an input bit stream to generate first bit streams of C-bits, where c is an integer greater than zero, and a second encoder may be configured to receive the first bit streams and shuffle data of the received first bit streams to generate second bit streams. The data shuffling of the first bit streams may adjust an error distribution of the second bit streams. An encoding method may include encoding an input bit stream to generate first bit streams of C-bits, and receiving the first bit streams and shuffling data of the received first bit streams to generate second bit streams. An error distribution of the second bit streams may be adjusted based on the data shuffling. | 05-07-2009 |
| 20090190397 | Memory device and data reading method - A memory device and a memory data reading method are provided. The memory device may include: a multi-bit cell array; a programming unit that stores N data pages in a memory page in the multi-bit cell array; and a control unit that divides the N data pages into a first group and second group, reads data of the first group from the memory page, and determines a scheme of reading data of the second group from the memory page based on the read data of the first group. | 07-30-2009 |
| 20090235128 | Data detecting apparatus based on channel information and method thereof - An apparatus and a method for detecting data stored in a memory cell based on channel information of the memory cell are provided. The data detecting apparatus may include a voltage comparison unit that compares a plurality of soft decision reference voltages between neighboring hard decision reference voltages with a threshold voltage of a memory cell to determine a region including the threshold voltage, and a data detection unit that detects data stored in the memory cell based on channel information of the memory cell according to the region. The data detecting apparatus may further include a reference voltage determination unit that determines the plurality of soft decision reference voltages based on the channel information of the memory cell. | 09-17-2009 |
