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Hee-Sung

Hee Sung Cho, Suwon-Si KR

Patent application numberDescriptionPublished
20100155581LASER SCANNING UNIT AND IMAGE-FORMING APPARATUS HAVING THE SAME - A laser scanning unit and an image-forming apparatus employing the laser scanning unit. The laser scanning unit includes an optical source to irradiate a light beam, a deflector to deflect the irradiated light beam to a photosensitive body, an optical imaging device on which the light beam deflected from the deflector is incident and which forms an image on the photosensitive body, and an optical reflective device to deflect the light beam transmitted through the optical imaging device toward the optical imaging device, wherein the light beam incident on the optical imaging device includes P polarized light and S polarized light, such that the proportion of P polarized light is greater than the proportion of S polarized light.06-24-2010
20100166464LIGHT SCANNING UNIT CAPABLE OF COMPENSATING FOR ZIGZAG ERROR, IMAGING APPARATUS HAVING THE SAME, AND METHOD OF COMPENSATING FOR ZIGZAG ERROR OF THE LIGHT SCANNING UNIT - Provided are a light scanning unit capable of compensating for a zigzag error, an imaging apparatus having the same, and a method of compensating for a zigzag error of the light scanning unit. The light scanning unit may scan light beams using an oscillation mirror configured to rotatably oscillate. The light scanning unit may deflect light beams in a sub-scan direction in synchronization with the rotatable oscillation of the oscillation mirror, thereby compensating for a zigzag error caused by reciprocative scanning of the oscillation mirror.07-01-2010
20100182393LIGHT SCANNING UNIT AND IMAGE FORMING APPARATUS INCLUDING THE SAME - A light scanning unit and an image forming apparatus having the same. The light scanning unit to form an electrostatic latent image corresponding to image information on a photosensitive body may include a light source, a deflector to deflect light generated from the light source in a main scanning direction, an imaging lens to focus deflected light to the photosensitive body, and at least a reflection mirror to change a traveling direction of light. A deviation of light quantity generated in a main scanning direction by a light quantity ratio generated by internal absorption of the imaging lens and a light quantity ratio generated by a polarization state of light may be compensated for by the reflection mirror.07-22-2010

Hee Sung Choi, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090154065Solid electrolytic capacitor and method of manufacturing the same - Provided is a solid electrolytic capacitor including a capacitor element with a positive polarity; an anode wire of which one end is inserted into the capacitor element and the other end projects outward from the capacitor element; a cathode extraction layer formed on the capacitor element; a plurality of conductive bumps formed on the cathode extraction layer; a molding portion formed to surround the capacitor element and exposing the projecting end of the anode wire and ends of the conductive bumps; an anode lead terminal provided on the molding portion so as to be electrically connected to the exposed end of the anode wire; and a cathode lead terminal provided on the molding portion so as to be electrically connected to the exposed ends of the conductive bumps.06-18-2009
20090154066Solid electrolytic capacitor and method of manufacturing the same - Provided is a solid electrolytic capacitor including a capacitor element with a positive polarity; an anode wire inserted and connected to a lower portion of the capacitor element; a cathode extraction layer formed on the capacitor element; an anode lead frame provided on one side of the lower surface of the capacitor element so as to be electrically insulated from the cathode extraction layer, the anode lead frame having an insertion portion into which a projecting lower portion of the anode wire is inserted; a cathode lead frame provided on the other side of the lower surface of the capacitor element so as to be electrically connected to the cathode extraction layer; a molding portion formed to surround the capacitor element and exposing the lower end surface of the anode wire, the lower surface of the anode lead frame, and the lower surface of the cathode lead frame; an anode lead terminal provided on the molding portion so as to be electrically connected to the lower end surface of the anode wire and the lower surface of the anode lead frame; and a cathode lead terminal provided on the molding portion so as to be electrically connected to the lower surface of the cathode lead frame.06-18-2009
20090154068Solid electrolytic capacitor and method of manufacturing the same - Provided is a solid electrolytic capacitor including a capacitor element with a positive polarity; an anode wire of which one side is inserted into the capacitor element and the other side projects outward from the capacitor element; a cathode extraction layer formed on the capacitor element; a plurality of conductive bumps formed on the cathode extraction layer; an anode lead frame fixed to the side of the capacitor element, where the anode wire projects outward, and having an insertion portion into which the projecting end of the anode wire is inserted; a molding portion formed to surround the capacitor element and exposing the projecting end of the anode wire, the outer surface of the anode lead frame, and ends of the conductive bumps; an anode lead terminal provided on the molding portion so as to be electrically connected to the exposed end of the anode wire and the anode lead frame; and a cathode lead terminal provided on the molding portion so as to be electrically connected to the exposed ends of the conductive bumps.06-18-2009
20100115746SOLID ELECTROLYTIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME - Provided is a solid electrolytic capacitor including a capacitor element with a positive polarity; an anode wire of which one side is inserted into the capacitor element and the other side projects outward from the capacitor element; a cathode extraction layer formed on the capacitor element; a plurality of conductive bumps formed on the cathode extraction layer; an anode lead frame fixed to the side of the capacitor element, where the anode wire projects outward, and having an insertion portion into which the projecting end of the anode wire is inserted; a molding portion formed to surround the capacitor element and exposing the projecting end of the anode wire, the outer surface of the anode lead frame, and ends of the conductive bumps; an anode lead terminal provided on the molding portion so as to be electrically connected to the exposed end of the anode wire and the anode lead frame; and a cathode lead terminal provided on the molding portion so as to be electrically connected to the exposed ends of the conductive bumps.05-13-2010

Hee Sung Chung, Seoul KR

Patent application numberDescriptionPublished
20110246496INFORMATION SEARCH METHOD AND INFORMATION PROVISION METHOD BASED ON USER'S INTENTION - Disclosed are a method for searching information based on user's intention and a method for providing information. The method for searching information provides an editor meeting searcher's intention detected using analysis results for keywords and searches contents having metadata associated with metadata input through the editor. As a result, a search may be formed by detecting searcher's intention from information input by a searcher, inducing a detailed metadata input based on the detected intention, and using the input metadata.10-06-2011

Hee Sung Kang, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090250429Methods of Forming Dual-Damascene Metal Wiring Patterns for Integrated Circuit Devices and Wiring Patterns Formed Thereby - Methods of forming dual-damascene metal wiring patterns include forming a first metal wiring pattern (e.g., copper wiring pattern) on an integrated circuit substrate and forming an etch-stop layer on the first metal wiring pattern. These steps are followed by the steps of forming an electrically insulating layer on the etch-stop layer and forming an inter-metal dielectric layer on the electrically insulating layer. The inter-metal dielectric layer and the electrically insulating layer are selectively etched in sequence to define an opening therein that exposes a first portion of the etch-stop layer. This opening may include a trench and a via hole extending downward from a bottom of the trench. A first barrier metal layer is formed on a sidewall of the opening and directly on the first portion of the etch-stop layer. A portion of the first barrier metal layer is selectively removed from the first portion of the etch-stop layer. The first portion of the etch-stop layer is then selectively etched for a sufficient duration to expose a portion of the first metal wiring pattern. A second metal wiring pattern is formed in the opening in order to complete a dual-damascene structure.10-08-2009

Hee Sung Kang, Seoul KR

Patent application numberDescriptionPublished
20110203196External Wall Panel Unit for Saving Energy and External Wall Structure System Using the Same - In regards to the invention titled “External Wall Panel Unit for Saving Energy and External Wall Structure System Using the Same,” there are an external wall panel unit and an external wall structure system for saving energy.08-25-2011

Hee Sung Shim, Gangwon-Do KR

Patent application numberDescriptionPublished
20100090093Image Sensor and Method For Manufacturing the Same - An image sensor is provided. The image sensor comprises a readout circuitry, a first image sensing device, an interconnection, and a second image sensing device. The readout circuitry is disposed in a first substrate. The first image sensing device is disposed at one side of the readout circuitry of the first substrate. The interconnection is disposed over the first substrate and electrically connected to the readout circuitry. The second image sensing device is disposed over the interconnection.04-15-2010
20100091154Image Sensor and Method For Manufacturing the Same - An image sensor is provided. The image sensor comprises a readout circuitry, an interconnection, an image sensing device and a via plug. The readout circuitry is disposed in a first substrate. The interconnection is disposed over the first substrate and electrically connected to the readout circuitry. The image sensing device is disposed over the interconnection. The via plug is formed at a pixel boundary and electrically connects the image sensing device and the interconnection.04-15-2010
20100091155Image Sensor and Method for Manufacturing the Same - An image sensor is provided. The image sensor comprises a readout circuitry, an interconnection, an insulating layer, an electrode, and an image sensing device. The readout circuitry is disposed in a first substrate. The interconnection is disposed over the first substrate and electrically connected to the readout circuitry. The insulating layer is disposed over the interconnection. The electrode is disposed on the insulating layer. The image sensing device is disposed on the electrode. The electrode and the interconnection provide a capacitive coupling of the image sensing device to the readout circuitry so that a contact formation process to contact the photodiode to the interconnection can be omitted.04-15-2010
20100148034IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a readout circuitry, an interconnection, an image sensing device, a first conductive-type ion implantation layer, and a via plug. The readout circuitry is formed in a first substrate. The interconnection is formed over the first substrate. The interconnection is electrically connected to the readout circuitry. Then image sensing device is formed over the interconnection. The image sensing device comprises a first conductive-type conductive layer and a second conductive-type conductive layer. The first conductive-type ion implantation layer is formed in a portion of the second conductive-type conductive layer of the image sensing device. The via plug penetrates through the first conductive-type ion implantation layer and the first conductive-type conductive layer to electrically connect the first conductive-type conductive layer to the interconnection.06-17-2010

Hee Sung Shim, Seoul KR

Patent application numberDescriptionPublished
20080210995Image sensor and method for fabricating the same - An image sensor and a method for fabricating the same are disclosed, in which an impurity implantation layer having a predetermined thickness is formed on a source diffusion layer, thereby controlling a substantial contact point between a contact plug and the source diffusion layer upward from a surface of a semiconductor substrate. As a result, it is possible to minimize a length of an open hole, which is a main channel of the contact plug, so that the open hole has the sufficiently large size, thereby inducing the improvement of the contact quality between the contact plug and the source diffusion layer. Also, in case of the CMOS image sensor, in state the impurity implantation layer having the impurity selectively implanted is formed on the source diffusion layer, the impurity implantation layer is electrically connected with the source diffusion layer. Accordingly, without the additional process such as highly-impurity implantation and formation of salicide layer, it is possible for the source diffusion layer to increase the impurity concentration of impurity therein. Eventually, in case of realizing the image sensor according to the present invention, it is possible to the greatest contact quality between the contact plug and the source diffusion layer. In case of realizing the greatest contact quality between the contact plug and the source diffusion layer with the additional formation of the impurity implantation layer, for example, the source diffusion layer normally performs the function of converting the optical charges generated by the photodiode to voltage constituents. Thus, the completed image sensor according to the present invention realizes the great image quality.09-04-2008

Patent applications by Hee Sung Shim, Seoul KR

Hee Sung Shin, Daejeon KR

Patent application numberDescriptionPublished
20090166556Well type neutron counter containing an annular He-3 detector tube - The present invention relates to a well type neutron counter containing a He-3 detector which includes at least one annular gas layer in a polyethylene moderator, which includes a body formed of a neutron moderator and having a sample cavity for inserting a sample of nuclear material therein; and an annular He-3 detector tube including at least one annular gas layer into which at least He-4 or He-3 gas or their mixture is injected and a plurality of anode rods stood in the annular gas layer with an equal spaces, wherein the He-3 detector tube is formed in an inside of the body so as to surround the sample cavity. The neutron counter has a largely reduced size, simplified structure and resultant decreased failure rate as compared to a conventional counter with a large volume.07-02-2009

Hee-Sung Choi, Suwon-Si KR

Patent application numberDescriptionPublished
20080220373Method for forming a photoresist-laminated substrate, method for plating an insulating substrate, method for surface treating of a metal layer of a circuit board, and method for manufacturing a multi layer ceramic condenser using metal nanoparticles aerosol - The present invention relates to a method for forming a photoresist-laminated substrate including: preparing a laminated substrate having an insulating substrate and a metal layer; coating with an aerosol of metal nanoparticles on the metal layer; laminating a photoresist film on the metal layer coated with the aerosol of metal nanoparticles. The method of the present invention is a environmentally friendly method since an aerosol of metal nanoparticles is used, differentiated from the conventional wet process.09-11-2008
20090298251NORMAL PRESSURE AEROSOL SPRAY APPARATUS AND METHOD OF FORMING A FILM USING THE SAME - An aerosol spray apparatus and a method of forming a film using the aerosol spray apparatus are disclosed. The aerosol spray apparatus in accordance with an embodiment of the present invention includes: a carrier gas injection unit, which forms carrier gas by vaporizing liquefied gas and increases the pressure of the carrier gas; an aerosol forming unit, which forms an aerosol by mixing the carrier gas with powder; and a film forming unit, which sprays the aerosol in a normal pressure environment such that the film is formed on the surface of the board. The apparatus can perform a coating process with no restriction of the type and size of powder, simplify the process because the film can be formed in a normal temperature and pressure environment, and control a wide range of film thickness in a short time.12-03-2009
20100273051COMPOSITE ELECTRODE AND METHOD FOR MANUFACTURING THE SAME - A composite electrode and a method for manufacturing the same are disclosed. By using a composite electrode that includes a porous support made of ceramic or metal and a conductive polymer or a metal oxide formed on a surface of the porous support, a capacitor or secondary cell that provides increased charge/discharge capacity and increased energy/output density, as well as high-temperature stability and high reliability, can be manufactured.10-28-2010

Patent applications by Hee-Sung Choi, Suwon-Si KR

Hee-Sung Kang, Sungnam-Si KR

Patent application numberDescriptionPublished
20080261156METHOD OF FORMING A PATTERN IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A GATE USING THE SAME - A method of forming a pattern in a semiconductor device is described. A substrate divided into cell and peripheral regions is provided, and an object layer is formed on a substrate. A buffer pattern is formed on the object layer in the cell region along a first direction. A spacer is formed along a sidewall of the buffer pattern in the cell region, and a hard mask layer remains on the object layer in the peripheral region. The buffer layer is removed, and the spacer is separated along a second direction different from the first direction, thereby forming a cell hard mask pattern. A peripheral hard mask pattern is formed in the peripheral region. A minute pattern is formed using the cell and peripheral hard mask patterns in the substrate. Therefore, a line width variation or an edge line roughness due to the photolithography process is minimized.10-23-2008
20110159443METHOD OF FORMING A PATTERN IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A GATE USING THE SAME - A method of forming a pattern in a semiconductor device is described. A substrate divided into cell and peripheral regions is provided, and an object layer is formed on a substrate. A buffer pattern is formed on the object layer in the cell region along a first direction. A spacer is formed along a sidewall of the buffer pattern in the cell region, and a hard mask layer remains on the object layer in the peripheral region. The buffer layer is removed, and the spacer is separated along a second direction different from the first direction, thereby forming a cell hard mask pattern. A peripheral hard mask pattern is formed in the peripheral region. A minute pattern is formed using the cell and peripheral hard mask patterns in the substrate. Therefore, a line width variation or an edge line roughness due to the photolithography process is minimized.06-30-2011

Patent applications by Hee-Sung Kang, Sungnam-Si KR

Hee-Sung Kim, Suwon-Si KR

Patent application numberDescriptionPublished
20100123823DISPLAY APPARATUS AND CONTROL METHOD THEREOF - Disclosed are a display apparatus and a control method thereof preventing boring and a trouble misunderstanding due to a mute screen supplied in changing an image signal, the display apparatus, including: a display unit which displays an image; an image processing unit which processes an input image signal to be displayed in the display unit, and displays a mute image in the display unit during a mute time when changing the input image signal; and a control unit which controls the image processing unit to gradually convert the total screen of the display unit displaying the input image signal to the mute image before displaying the mute image if a change signal for changing the input image signal is input.05-20-2010

Hee-Sung Kim, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090096014NONVOLATILE MEMORY DEVICES THAT INCLUDE AN INSULATING FILM WITH NANOCRYSTALS EMBEDDED THEREIN AND METHODS OF MANUFACTURING THE SAME - A nonvolatile memory device includes a semiconductor substrate, a charge-trap structure disposed on the semiconductor substrate, which includes an insulating film and a plurality of carbon nanocrystals embedded in the insulating film, and a gate disposed on the charge-trap structure. The nonvolatile memory device may exhibit memory hysteresis characteristics with improved reliability.04-16-2009

Hee-Sung Park, Gwangmyeong-City KR

Patent application numberDescriptionPublished
20100047882METHOD OF RECOVERING L-THREONINE FROM L-THREONINE FERMENTATION BROTH USING NONSOLVENT - Provided are a method of recovering L-threonine from the fermentation broth of an L-threonine producing microorganism, comprising: separating microbial bodies from the L-threonine containing fermentation broth obtained by culturing an L-threonine producing microorganism and filtering the separated fermentation broth to obtain a filtrate; concentrating the filtrate; and reacting the concentrated filtrate with a nonsolvent to obtain crystalline L-threonine, crystalline L-threonine recovered by the method, and a feed additive containing the crystalline L-threonine recovered by the method.02-25-2010

Hee-Sung Park, Gwangiu KR

Patent application numberDescriptionPublished
20100204450Preparation Method for a Protein With New Function Through Simultaneous Incorporation of Functional Elements - Disclosed is a method for preparing a protein having a new function. The method comprises (A) a functional element-designing step of designing functional elements required for a new function desired to impart to an existing protein scaffold; (B) a functional element-inserting step of simultaneously inserting at least two gene fragments corresponding to the designed functional elements into a protein scaffold gene; and (C) a mutant screening and improving step of screening a mutant having a new function from a library of mutants inserted with the mutant genes, and improving and optimizing the function of the screened mutant using a directed evolution technique. The method for preparing can be widely used for the development of therapeutic proteins and the creation of industrial enzymes in the fields of bioengineering and biotechnology.08-12-2010

Hee-Sung Shim, Gangneung-Si KR

Patent application numberDescriptionPublished
20090166779IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - Embodiments relate to an image sensor and a method of manufacturing an image sensor. According to embodiments, an image sensor may include a first substrate, a photodiode, and an ion implantation isolation layer. According to embodiments, circuitry including a metal interconnection may be disposed over the first substrate. A photodiode may be provided in a crystalline semiconductor layer bonded to the first substrate, and electrically connected to the metal interconnection. The ion implantation isolation layer may be provided in the photodiode.07-02-2009
20090166786Image Sensor and Method for Manufacturing the Same - An image sensor includes a metal interconnection and readout circuitry over a first substrate, an image sensing device, and an ion implantation isolation layer. The image sensing device is over the metal interconnection, and an ion implantation isolation layer is in the image sensing device. The image sensing device includes first, second and third color image sensing units, and ion implantation contact layers. The first, second and third color image sensing units are stacked in or on a second substrate. The ion implantation contact layers are electrically connected to the first, second and third color image sensing units, respectively.07-02-2009
20090166789IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - An image sensor includes a first substrate and a photodiode. A circuitry including a metal interconnection is formed over the first substrate. The photodiode is formed over a first substrate, and contacts the metal interconnection. The circuitry of the first substrate includes a transistor over the first substrate, an electrical junction region at a side of the transistor, and a first conduction type region. The first conduction type region is connected to the metal interconnection and contacts the electrical junction region.07-02-2009
20090166792IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - Embodiments relate to an image sensor and a method of forming an image sensor. According to embodiments, an image sensor may include a first substrate and a photodiode. A circuitry including a metal interconnection may be formed on and/or over the first substrate. The photodiode may be formed over a first substrate, and may contact the metal interconnection. The circuitry of the first substrate may include a first transistor, a second transistor, an electrical junction region, and a first conduction type region. The first and second transistors may be formed over the first substrate. According to embodiments, an electrical junction region may be formed between the first transistor and the second transistor. The first conduction type region may be formed at one side of the second transistor, and may be connected to the metal interconnection.07-02-2009

Patent applications by Hee-Sung Shim, Gangneung-Si KR

Hee-Sung Shim, Gangnam-Gu KR

Patent application numberDescriptionPublished
20090127598IMAGE SENSOR AND METHOD OF FABRICATING THE SAME - An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a first impurity region formed in the semiconductor substrate spaced from the photodiode, a second impurity region formed in the semiconductor substrate spaced from the first impurity region, a first gate formed over the semiconductor substrate between the photodiode and the first impurity region, a second gate formed over the semiconductor substrate between the first impurity region and the second impurity region, a spacer formed over the fourth impurity region and a first sidewall of the second gate, and an insulating film formed over the photodiode, the first gate, the first impurity region and a second sidewall and a portion of the uppermost surface of the second gate.05-21-2009

Hee-Sung Yoon, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090308797Hollow fiber membrane module and method for making thereof - The present invention purposes to provide a hollow fiber membrane module that minimizes the error rate in a manufacturing process thereof, disperses weight by separating an enlarged hollow fiber membrane module into a plurality of small modules, and provides a manufacturing method thereof. The present invention includes a central water tube having a plurality of inlets formed in the circumferential direction thereof, a central air tube provided in the central water tube, a plurality of housings longitudinally provided in the circumferential direction of the central water tube, a hollow fiber membrane provided in the respective housing and in which water is treated by difference of pressure, a fixing part fixing the lower part of the hollow fiber membrane to the housing, and a collector provided in the lower part of the housing, a plurality of small modules being provided in the housing.12-17-2009