| Patent application number | Description | Published |
|---|
| 20090284883 | ELECTRONIC DEVICE HAVING ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHODS OF FABRICATING THE SAME - An electronic device having an electrostatic discharge (ESD) protection device and methods of fabricating the same. The electronic device can include an electronic element to be protected from electrostatic discharge. The electronic element can be installed on a substrate. The substrate can include a ground electrode disposed on the substrate, and a first element electrode disposed at a different level from the ground electrode on the substrate to overlap a part of the ground electrode and to electrically connect to the electronic element installed to the substrate. A dielectric layer can be disposed between the ground electrode and the first element electrode, wherein the ground electrode, the first element electrode and the dielectric layer disposed therebetween constitute an electrostatic discharge (ESD) protection device. | 11-19-2009 |
| 20100006869 | SEMICONDUCTOR CHIP, WIRING SUBSTRATE OF A SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE HAVING THE SEMICONDUCTOR CHIP AND DISPLAY DEVICE HAVING THE SEMICONDUCTOR PACKAGE - A semiconductor chip can include a semiconductor substrate, an input portion and an output portion. A circuit element can be formed in the semiconductor substrate. The input portion can be formed on the semiconductor substrate. The input portion can include a first input pad to receive an input signal from the outside and a second input pad spaced apart from the first input pad, the second input pad being electrically connected to the first input pad through an external connection line such that the second input pad inputs the input signal to the circuit element. The output portion can be formed on the semiconductor substrate. The output pad can include an output pad to output an output signal from the circuit element. | 01-14-2010 |
| 20100013066 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip. | 01-21-2010 |
| 20100044851 | Flip chip packages - Flip chip packages and methods of manufacturing the same are provided, the flip chip packages may include a package substrate, a semiconductor chip, conductive bumps, a ground pattern and an underfilling layer. The semiconductor chip may be over the package substrate. The conductive bumps may be between the semiconductor chip and the package substrate to electrically connect the semiconductor chip and the package substrate with each other. The ground pattern may ground one of the package substrate and the semiconductor chip. The underfilling layer may be between the package substrate and the semiconductor chip to surround the conductive bumps. The underfilling layer may have a diode selectively located between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer to protect the semiconductor chip from the electrostatic electricity. | 02-25-2010 |
| 20100258905 | SEMICONDUCTOR PACKAGE TO REMOVE POWER NOISE USING GROUND IMPEDANCE - A semiconductor package removes power noise by using a ground impedance. The semiconductor package includes an analog circuit block, a digital circuit block, an analog ground impedance structure, a digital ground impedance structure, and an integrated ground. The integrated ground and the analog circuit block are electrically connected via the analog ground impedance structure, and the integrated ground and the digital circuit block are electrically connected via the digital ground impedance structure, and an inductance of the analog ground impedance structure is greater than an inductance of the digital ground impedance structure. | 10-14-2010 |
| 20100264524 | SUBSTRATE FOR SEMICONDUCTOR PACKAGE - A substrate for a semiconductor package includes a dielectric substrate, a circuit pattern formed on a first surface of the dielectric substrate, and an electromagnetic band gap (EGB) pattern. The EGB pattern includes multiple unit structures formed on a second surface of the dielectric substrate, where each unit structure includes a flat conductor electrically connected to the circuit pattern through a ground connection, and multiple spiral-patterned conductors electrically connected to the flat conductor. The second surface is formed on an opposite side of the dielectric substrate from the first surface. Each flat conductor is electrically connected to a flat conductor of another one of the unit structures. At least one of the spiral-patterned conductors in each one of the unit structures is electrically connected to another one of the spiral-patterned conductors. | 10-21-2010 |
| 20100276189 | SEMICONDUCTOR PACKAGE INCLUDING POWER BALL MATRIX AND POWER RING HAVING IMPROVED POWER INTEGRITY - In a method of multiple-bit programming of a three-dimensional memory device having arrays of memory cells that extend in horizontal and vertical directions relative to a substrate, the method comprises first programming a memory cell to be programmed to one among a first set of states. At least one neighboring memory cell that neighbors the memory cell to be programmed to one among the first set of states is then first programmed. Following the first programming of the at least one neighboring memory cell, second programming the memory cell to be programmed to one among a second set of states, wherein the second set of states has a number of states that is greater than the number of states in the first set of states. | 11-04-2010 |
| 20110008048 | Optical system using optical signal and solid state drive module using the optical signal - An optical system and an SSD module that maintain optimal SI, PI and EMI characteristics without a shield based on a ground voltage and an impedance match. The optical system includes a solid state drive (SSD) module and an input/output (I/O) interface. The SSD module includes a plurality of solid state memory units. The input/output (I/O) interface receives data to be written to at least one of the solid state memory units from a main memory unit, the input/output (I/O) interface transmits data written in at least one of the solid state memory units to the main memory unit. The SSD module and the I/O interface transmit and receive data using an optical medium. | 01-13-2011 |
